c1_LIRGenerator.cpp revision 1492
1213N/A * Copyright 2005-2010 Sun Microsystems, Inc. All Rights Reserved. 0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 0N/A * This code is free software; you can redistribute it and/or modify it 0N/A * under the terms of the GNU General Public License version 2 only, as 0N/A * published by the Free Software Foundation. 0N/A * This code is distributed in the hope that it will be useful, but WITHOUT 0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 0N/A * version 2 for more details (a copy is included in the LICENSE file that 0N/A * accompanied this code). 0N/A * You should have received a copy of the GNU General Public License version 0N/A * 2 along with this work; if not, write to the Free Software Foundation, 0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 0N/A * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 0N/A * CA 95054 USA or visit www.sun.com if you need additional information or 0N/A * have any questions. 0N/A#
include "incls/_precompiled.incl" 0N/A // Initialize array sizes 0N/A//-------------------------------------------------------------- 0N/A// r1 := r2 becomes temp := r1 0N/A// r2 := r3 becomes r1 := r2 0N/A // reinitialize the shared state arrays 0N/A// Traverse assignment graph in depth first order and generate moves in post order 0N/A// ie. two assignments: b := c, a := b start with node c: 0N/A// Call graph: move(NULL, c) -> move(c, b) -> move(b, a) 0N/A// Generates moves in this order: move b to a and move c to b 0N/A// ie. cycle a := b, b := a start with node a 0N/A// Call graph: move(NULL, a) -> move(a, b) -> move(b, a) 0N/A// Generates moves in this order: move b to temp, move a to b, move temp to a 0N/A // cylce in graph detected 0N/A }
// else dest is a start node 0N/A // resolve any cycles in moves from and to virtual registers 0N/A // generate move for move from non virtual register to abitrary destination 0N/A // Make sure that all virtual operands show up in the list when 0N/A // they are used as the source of a move. 0N/A // tty->print("move "); src->print(); tty->print(" to "); dest->print(); tty->cr(); 0N/A//-------------------------------------------------------------- 0N/A // update the items result 0N/A // moves between different types need an intervening spill slot 0N/A//-------------------------------------------------------------- 0N/A // set up the list of LIR instructions 0N/A // LIR_Opr for unpinned constants shouldn't be referenced by other 0N/A // blocks so clear them out after processing the block. 0N/A // clear our any registers for other local constants 0N/A//-------------------------LIRGenerator----------------------------- 0N/A// This is where the tree-walk starts; instr must be root; 0N/A// This is called for each node in tree; the walk stops if a root is reached 0N/A //stop walk when encounter a root 0N/A // assert(instr->use_count() > 0 || instr->as_Phi() != NULL, "leaf instruction must have a use"); 0N/A // all locals are dead on exit from the synthetic unlocker 0N/A // Degenerate or breakpointed method. 0N/A // NULL out this local so that linear scan can assume that all non-NULL values are live. 0N/A // no patching needed 0N/A// increment a counter returning the incremented value 0N/A // do not need tmp here 0N/A // we couldn't strength reduce so just emit the multiply 0N/A // ldiv and lrem are implemented with a direct runtime call 0N/A // for slow path, use debug info for state after successful locking 0N/A // for handling NullPointerException, use debug info representing just the lock stack before this monitorenter 0N/A // If klass is not loaded we do not know if the klass has finalizers: 0N/A // allocate space for instance 0N/A // first try to identify the likely type of the arrays involved 0N/A // the types exactly match so the type is fully known 0N/A // at least pass along a good guess 0N/A // if a probable array type has been identified, figure out if any 0N/A // of the required checks for a fast case can be elided. 0N/A // try to skip null checks 0N/A // check from incoming constant values 0N/A // see if the range check can be elided, which might also imply 0N/A // that src or dst is non-null. 0N/A // it's the length of the source array 0N/A // it's the length of the destination array 0N/A // moving within a single array so no type checks are needed 0N/A // force into a register 0N/A // create a spill location 0N/A // move from register to spill 0N/A // Use leal instead of add to avoid destroying condition codes on x86 0N/A// This is about passing live values from one basic block to the other. 0N/A// In code generated with Java it is rather rare that more than one 0N/A// value is on the stack from one basic block to the other. 0N/A// We optimize our technique for efficient passing of one value 0N/A// (of type long, int, double..) but it can be extended. 0N/A// When entering or leaving a basic block, all registers and all spill 0N/A// slots are release and empty. We use the released registers 0N/A// and spill slots to pass the live values from one block 0N/A// to the other. The topmost value, i.e., the value on TOS of expression 0N/A// stack is passed in registers. All other values are stored in spilling 0N/A// area. Every Phi has an index which designates its spill slot 0N/A// At exit of a basic block, we fill the register(s) and spill slots. 0N/A// At entry of a basic block, the block_prolog sets up the content of phi nodes 0N/A// and locks necessary registers and spilling slots. 0N/A// move current value to referenced phi function 0N/A // cur_val can be null without phi being null in conjunction with inlining 0N/A "these can be produced lazily");
0N/A// Moves all stack values into their PHI position 0N/A // a block with only one predecessor never has phi functions 0N/A // Inlining may cause the local state not to match up, so walk up 0N/A // the caller state until we get to the same scope as the 0N/A // successor and then start processing from there. 0N/A // add a little fudge factor for the bailout, since the bailout is 0N/A // only checked periodically. This gives a few extra registers to 0N/A // hand out before we really run out, which helps us keep from 0N/A // tripping over assertions. 0N/A// Try to lock using register in hint 0N/A// does an rlock and sets result 0N/A// does an rlock and sets result 0N/A//--------------------------------------------------------------------- 0N/A // no moves are created for phi functions at the begin of exception 0N/A // handlers, so assign operands manually here 0N/A//---------------------------------------------------------------------- 0N/A//---------------------------------------------------------------------- 0N/A//---------------------------------------------------------------------- 0N/A//---------------------------------------------------------------------- 0N/A//---------------------------------------------------------------------- 0N/A//---------------------------------------------------------------------- 0N/A//---------------------------------------------------------------------- 0N/A//---------------------------------------------------------------------- 0N/A // phi functions are never visited directly 0N/A// Code for a constant is generated lazily unless the constant is frequently used and can't be inlined. 0N/A // Any constant with a ValueStack requires patching so emit the patch here 0N/A // unpinned constants are handled specially so that they can be 0N/A // put into registers when they are used multiple times within a 0N/A // block. After the block completes their operand will be 0N/A // cleared so that other blocks can't refer to that register. 0N/A // operand_for_instruction has the side effect of setting the result 0N/A // so there's no need to do it here. 0N/A// Example: object.getClass () 0N/A // need to perform the null check on the rcvr 0N/A//------------------------local access-------------------------------------- 0N/A // allocate a virtual register for this local or phi 0N/A// Block local constant handling. This code is useful for keeping 0N/A// unpinned constants and constants which aren't exposed in the IR in 0N/A// registers. Unpinned Constant instructions have their operands 0N/A// cleared when the block is finished so that other blocks can't end 0N/A// up referring to their registers. 342N/A // Do the pre-write barrier, if any. 342N/A//////////////////////////////////////////////////////////////////////// 342N/A // First we test whether marking is in progress. 342N/A // Read the marking-in-progress flag. 342N/A // If the "new_val" is a constant NULL, no barrier is necessary. 342N/A//////////////////////////////////////////////////////////////////////// 0N/A//------------------------field access-------------------------------------- 0N/A// ---------------------------------------------------------------------------- 0N/A// Volatile variables demand their effects be made known to all CPU's in 0N/A// order. Store buffers on most chips allow reads & writes to reorder; the 0N/A// memory barrier (i.e., it's not sufficient that the interpreter does not 0N/A// reorder volatile references, the hardware also must not reorder them). 0N/A// According to the new Java Memory Model (JMM): 0N/A// (1) All volatiles are serialized wrt to each other. 0N/A// ALSO reads & writes act as aquire & release, so: 0N/A// (2) A read cannot let unrelated NON-volatile memory refs that happen after 0N/A// the read float up to before the read. It's OK for non-volatile memory refs 0N/A// that happen before the volatile read to float down below it. 0N/A// (3) Similar a volatile write cannot let unrelated NON-volatile memory refs 0N/A// that happen BEFORE the write float down to after the write. It's OK for 0N/A// non-volatile memory refs that happen after the volatile write to float up 0N/A// We only put in barriers around volatile refs (they are expensive), not 0N/A// _between_ memory refs (that would require us to track the flavor of the 0N/A// previous memory refs). Requirements (2) and (3) require some barriers 0N/A// before volatile stores and after volatile loads. These nearly cover 0N/A// requirement (1) but miss the volatile-store-volatile-load case. This final 0N/A// case is placed after volatile-stores although it could just as well go 0N/A// before volatile-loads. 0N/A // load item if field is volatile (fewer special cases for volatiles) 0N/A // load item if field not initialized 0N/A // load item if field not constant 0N/A // because of code patching we cannot inline constants 0N/A // emit an explicit null check because the offset is too large 0N/A // we need to patch the offset in the instruction so don't allow 0N/A // generate_address to try to be smart about emitting the -1. 0N/A // Otherwise the patching code won't know how to find the 0N/A // instruction to patch. 342N/A // Do the pre-write barrier, if any. 0N/A "how do we know it's volatile if it's not loaded");
819N/A // Store to object so mark the card of the header 0N/A // emit an explicit null check because the offset is too large 0N/A // we need to patch the offset in the instruction so don't allow 0N/A // generate_address to try to be smart about emitting the -1. 0N/A // Otherwise the patching code won't know how to find the 0N/A // instruction to patch. 0N/A "how do we know it's volatile if it's not loaded");
0N/A // NOTE: by the time we are in checkIndex() we are guaranteed that 0N/A // the buffer is non-null (because checkIndex is package-private and 0N/A // only called from within other methods in the buffer). 0N/A // Just load the index into the result register 0N/A//------------------------array access-------------------------------------- 0N/A // let it be a constant 0N/A // emit array address setup early so it schedules better 0N/A // TODO: use a (modified) version of array_range_check that does not require a 0N/A // constant length to be loaded to a register 0N/A // The range check performs the null check, so clear it out for the load 0N/A // check if the instruction has an xhandler in any of the nested scopes 0N/A // this throw is not inside an xhandler 0N/A // get some idea of the throw type 0N/A // do null check before moving exception oop into fixed register 0N/A // to avoid a fixed interval with an oop during the null check. 0N/A // Use a copy of the CodeEmitInfo because debug information is 0N/A // different for null_check and throw. 0N/A // if the exception object wasn't created using new then it might be null. 0N/A // we need to go through the exception lookup path to get JVMTI 0N/A // notification done 0N/A // move exception oop into fixed register 0N/A // temporary fix (platform dependent code without shift on Intel would be better) 0N/A // let it be a constant 0N/A for (
int i = 0; i <
lng; i++) {
0N/A // still in same range 0N/A // skip tests which explicitly dispatch to the default 0N/A// we expect the keys to be sorted by increasing value 0N/A for (
int i =
1; i <
len; i++) {
0N/A // still in same range 0N/A // skip tests which explicitly dispatch to the default 0N/A // move values into phi locations 0N/A for (
int i = 0; i <
len; i++) {
0N/A // move values into phi locations 0N/A for (
int i = 0; i <
len; i++) {
0N/A // need to free up storage used for OSR entry point 0N/A // increment backedge counter if needed 0N/A // emit phi-instruction move after safepoint since this simplifies 0N/A // describing the state as the safepoint. 0N/A // Emit moves from physical registers / stack slots to virtual registers 0N/A // Types which are smaller than int are passed as int, so 0N/A // correct the type which passed. 0N/A // Assign new location to Local instruction for this local 0N/A // receiver is guaranteed non-NULL so don't need CodeEmitInfo 0N/A // increment invocation counters if needed 0N/A // all blocks with a successor must end with an unconditional jump 0N/A // to the successor even if they are consecutive 0N/A // construct our frame and model the production of incoming pointer 0N/A // to the OSR buffer. 0N/A// Visits all arguments, returns appropriate items without loading them 1295N/A // Insert a dummy for the synthetic MethodHandle argument. 0N/A// The invoke with receiver has following phases: 0N/A// b) traverse all arguments -> item-array (invoke_visit_argument) 0N/A// c) push receiver on stack 0N/A// d) load each of the items and push on stack 0N/A// e) unlock receiver 0N/A// f) move receiver into receiver-register %o0 0N/A// g) lock result registers and emit call operation 0N/A// Before issuing a call, we must spill-save all values on stack 0N/A// that are in caller-save register. "spill-save" moves thos registers 0N/A// either in a free callee-save register or spills them if no free 0N/A// callee save register is available. 0N/A// The problem is where to invoke spill-save. 0N/A// - if invoked between e) and f), we may lock callee save 0N/A// register in "spill-save" that destroys the receiver register 0N/A// before f) is executed 0N/A// - if we rearange the f) to be earlier, by loading %o0, it 0N/A// may destroy a value on the stack that is currently in %o0 0N/A// and is waiting to be spilled 0N/A// - if we keep the receiver locked while doing spill-save, 0N/A// we cannot spill it as it is spill-locked 0N/A // setup result register 1295N/A // invokedynamics can deoptimize. 1484N/A // Preserve the SP over MethodHandle call sites. 0N/A // for final target we still produce an inline cache, in order 0N/A // to be able to call mixed mode 1295N/A // Get CallSite offset from constant pool cache pointer. 1295N/A // If this invokedynamic call site hasn't been executed yet in 1295N/A // the interpreter, the CallSite object in the constant pool 1295N/A // cache is still null and we need to deoptimize. 1295N/A // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 1295N/A // clone all handlers. This is handled transparently in other 1295N/A // places by the CodeEmitInfo cloning logic but is handled 1295N/A // specially here because a stub isn't being used. 1295N/A // Use the receiver register for the synthetic MethodHandle 1295N/A // Load CallSite object from constant pool cache. 1295N/A // Load target MethodHandle from CallSite object. 1484N/A // Restore the SP after MethodHandle call sites. 0N/A // Force rounding of results from non-strictfp when in strictfp 0N/A // scope (or when we don't know the strictness of the callee, to 0N/A// Code for : x->x() {x->cond()} x->y() ? x->tval() : x->fval() 0N/A // sun.misc.AtomicLongCSImpl.attemptUpdate 0N/A // Need recv in a temporary register so it interferes with the other temporaries 0N/A // get a result register 0N/A // move the arguments into the correct location 0N/A// if (!can_store_as_constant(arg)) { 0N/A// LIR_Opr tmp = new_register(arg->type()); 0N/A// __ move(arg, tmp); 0N/A // get a result register 0N/A // move the arguments into the correct location