c1_LIRGenerator.cpp revision 1472
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include "incls/_precompiled.incl" 970N/A // Initialize array sizes //-------------------------------------------------------------- // r1 := r2 becomes temp := r1 // r2 := r3 becomes r1 := r2 // reinitialize the shared state arrays // Traverse assignment graph in depth first order and generate moves in post order // ie. two assignments: b := c, a := b start with node c: // Call graph: move(NULL, c) -> move(c, b) -> move(b, a) // Generates moves in this order: move b to a and move c to b // ie. cycle a := b, b := a start with node a // Call graph: move(NULL, a) -> move(a, b) -> move(b, a) // Generates moves in this order: move b to temp, move a to b, move temp to a // cylce in graph detected }
// else dest is a start node // resolve any cycles in moves from and to virtual registers // generate move for move from non virtual register to abitrary destination // Make sure that all virtual operands show up in the list when // they are used as the source of a move. // tty->print("move "); src->print(); tty->print(" to "); dest->print(); tty->cr(); //-------------------------------------------------------------- // update the items result // moves between different types need an intervening spill slot //-------------------------------------------------------------- // set up the list of LIR instructions // LIR_Opr for unpinned constants shouldn't be referenced by other // blocks so clear them out after processing the block. // clear our any registers for other local constants //-------------------------LIRGenerator----------------------------- // This is where the tree-walk starts; instr must be root; // This is called for each node in tree; the walk stops if a root is reached //stop walk when encounter a root // assert(instr->use_count() > 0 || instr->as_Phi() != NULL, "leaf instruction must have a use"); // all locals are dead on exit from the synthetic unlocker // Degenerate or breakpointed method. bailout(
"Degenerate or breakpointed method");
// NULL out this local so that linear scan can assume that all non-NULL values are live. // increment a counter returning the incremented value // we couldn't strength reduce so just emit the multiply // ldiv and lrem are implemented with a direct runtime call // for slow path, use debug info for state after successful locking // for handling NullPointerException, use debug info representing just the lock stack before this monitorenter // If klass is not loaded we do not know if the klass has finalizers: // allocate space for instance return (c->
value() == 0);
return (c->
value() >= 0);
// first try to identify the likely type of the arrays involved // the types exactly match so the type is fully known // at least pass along a good guess // if a probable array type has been identified, figure out if any // of the required checks for a fast case can be elided. // try to skip null checks // check from incoming constant values // see if the range check can be elided, which might also imply // that src or dst is non-null. // it's the length of the source array // it's the length of the destination array // moving within a single array so no type checks are needed // create a spill location // move from register to spill bailout(
"out of memory building methodDataOop");
// Use leal instead of add to avoid destroying condition codes on x86 // This is about passing live values from one basic block to the other. // In code generated with Java it is rather rare that more than one // value is on the stack from one basic block to the other. // We optimize our technique for efficient passing of one value // (of type long, int, double..) but it can be extended. // When entering or leaving a basic block, all registers and all spill // slots are release and empty. We use the released registers // and spill slots to pass the live values from one block // to the other. The topmost value, i.e., the value on TOS of expression // stack is passed in registers. All other values are stored in spilling // area. Every Phi has an index which designates its spill slot // At exit of a basic block, we fill the register(s) and spill slots. // At entry of a basic block, the block_prolog sets up the content of phi nodes // and locks necessary registers and spilling slots. // move current value to referenced phi function // cur_val can be null without phi being null in conjunction with inlining "these can be produced lazily");
// Moves all stack values into their PHI position // a block with only one predecessor never has phi functions // Inlining may cause the local state not to match up, so walk up // the caller state until we get to the same scope as the // successor and then start processing from there. // add a little fudge factor for the bailout, since the bailout is // only checked periodically. This gives a few extra registers to // hand out before we really run out, which helps us keep from // tripping over assertions. bailout(
"out of virtual registers");
// Try to lock using register in hint // does an rlock and sets result // does an rlock and sets result //--------------------------------------------------------------------- assert(
block()->
next() == x,
"ExceptionObject must be first instruction of block");
// no moves are created for phi functions at the begin of exception // handlers, so assign operands manually here //---------------------------------------------------------------------- //---------------------------------------------------------------------- //---------------------------------------------------------------------- //---------------------------------------------------------------------- //---------------------------------------------------------------------- //---------------------------------------------------------------------- //---------------------------------------------------------------------- //---------------------------------------------------------------------- // phi functions are never visited directly // Code for a constant is generated lazily unless the constant is frequently used and can't be inlined. // Any constant with a ValueStack requires patching so emit the patch here // unpinned constants are handled specially so that they can be // put into registers when they are used multiple times within a // block. After the block completes their operand will be // cleared so that other blocks can't refer to that register. // operand_for_instruction has the side effect of setting the result // so there's no need to do it here. // Example: object.getClass () // need to perform the null check on the rcvr //------------------------local access-------------------------------------- // allocate a virtual register for this local or phi // Block local constant handling. This code is useful for keeping // unpinned constants and constants which aren't exposed in the IR in // registers. Unpinned Constant instructions have their operands // cleared when the block is finished so that other blocks can't end // up referring to their registers. // Do the pre-write barrier, if any. //////////////////////////////////////////////////////////////////////// // First we test whether marking is in progress. // Read the marking-in-progress flag. // If the "new_val" is a constant NULL, no barrier is necessary. //////////////////////////////////////////////////////////////////////// //------------------------field access-------------------------------------- // ---------------------------------------------------------------------------- // Volatile variables demand their effects be made known to all CPU's in // order. Store buffers on most chips allow reads & writes to reorder; the // memory barrier (i.e., it's not sufficient that the interpreter does not // reorder volatile references, the hardware also must not reorder them). // According to the new Java Memory Model (JMM): // (1) All volatiles are serialized wrt to each other. // ALSO reads & writes act as aquire & release, so: // (2) A read cannot let unrelated NON-volatile memory refs that happen after // the read float up to before the read. It's OK for non-volatile memory refs // that happen before the volatile read to float down below it. // (3) Similar a volatile write cannot let unrelated NON-volatile memory refs // that happen BEFORE the write float down to after the write. It's OK for // non-volatile memory refs that happen after the volatile write to float up // We only put in barriers around volatile refs (they are expensive), not // _between_ memory refs (that would require us to track the flavor of the // previous memory refs). Requirements (2) and (3) require some barriers // before volatile stores and after volatile loads. These nearly cover // requirement (1) but miss the volatile-store-volatile-load case. This final // case is placed after volatile-stores although it could just as well go // before volatile-loads. // load item if field is volatile (fewer special cases for volatiles) // load item if field not initialized // load item if field not constant // because of code patching we cannot inline constants tty->
print_cr(
" ###class not loaded at store_%s bci %d",
// emit an explicit null check because the offset is too large // we need to patch the offset in the instruction so don't allow // generate_address to try to be smart about emitting the -1. // Otherwise the patching code won't know how to find the // Do the pre-write barrier, if any. "how do we know it's volatile if it's not loaded");
// Store to object so mark the card of the header tty->
print_cr(
" ###class not loaded at load_%s bci %d",
// emit an explicit null check because the offset is too large // we need to patch the offset in the instruction so don't allow // generate_address to try to be smart about emitting the -1. // Otherwise the patching code won't know how to find the "how do we know it's volatile if it's not loaded");
// NOTE: by the time we are in checkIndex() we are guaranteed that // the buffer is non-null (because checkIndex is package-private and // only called from within other methods in the buffer). // Just load the index into the result register //------------------------array access-------------------------------------- // emit array address setup early so it schedules better // TODO: use a (modified) version of array_range_check that does not require a // constant length to be loaded to a register // The range check performs the null check, so clear it out for the load // check if the instruction has an xhandler in any of the nested scopes // this throw is not inside an xhandler // get some idea of the throw type // do null check before moving exception oop into fixed register // to avoid a fixed interval with an oop during the null check. // Use a copy of the CodeEmitInfo because debug information is // different for null_check and throw. // if the exception object wasn't created using new then it might be null. // we need to go through the exception lookup path to get JVMTI // move exception oop into fixed register // temporary fix (platform dependent code without shift on Intel would be better) for (
int i = 0; i <
lng; i++) {
for (
int i = 0; i <
len; i++,
key++) {
// skip tests which explicitly dispatch to the default // we expect the keys to be sorted by increasing value for (
int i =
1; i <
len; i++) {
// skip tests which explicitly dispatch to the default // move values into phi locations for (
int i = 0; i <
len; i++) {
// move values into phi locations for (
int i = 0; i <
len; i++) {
// need to free up storage used for OSR entry point // increment backedge counter if needed // emit phi-instruction move after safepoint since this simplifies // describing the state as the safepoint. // Emit moves from physical registers / stack slots to virtual registers // Types which are smaller than int are passed as int, so // correct the type which passed. // Assign new location to Local instruction for this local assert(
local !=
NULL,
"Locals for incoming arguments must have been created");
// receiver is guaranteed non-NULL so don't need CodeEmitInfo // increment invocation counters if needed // all blocks with a successor must end with an unconditional jump // to the successor even if they are consecutive // construct our frame and model the production of incoming pointer // Visits all arguments, returns appropriate items without loading them // Insert a dummy for the synthetic MethodHandle argument. // The invoke with receiver has following phases: // b) traverse all arguments -> item-array (invoke_visit_argument) // c) push receiver on stack // d) load each of the items and push on stack // f) move receiver into receiver-register %o0 // g) lock result registers and emit call operation // Before issuing a call, we must spill-save all values on stack // that are in caller-save register. "spill-save" moves thos registers // either in a free callee-save register or spills them if no free // callee save register is available. // The problem is where to invoke spill-save. // - if invoked between e) and f), we may lock callee save // register in "spill-save" that destroys the receiver register // - if we rearange the f) to be earlier, by loading %o0, it // may destroy a value on the stack that is currently in %o0 // and is waiting to be spilled // - if we keep the receiver locked while doing spill-save, // we cannot spill it as it is spill-locked // invokedynamics can deoptimize. // for final target we still produce an inline cache, in order // to be able to call mixed mode // Get CallSite offset from constant pool cache pointer. // If this invokedynamic call site hasn't been executed yet in // the interpreter, the CallSite object in the constant pool // cache is still null and we need to deoptimize. // Cannot re-use same xhandlers for multiple CodeEmitInfos, so // clone all handlers. This is handled transparently in other // places by the CodeEmitInfo cloning logic but is handled // specially here because a stub isn't being used. // Use the receiver register for the synthetic MethodHandle // Load CallSite object from constant pool cache. // Load target MethodHandle from CallSite object. // Force rounding of results from non-strictfp when in strictfp // scope (or when we don't know the strictness of the callee, to // Code for : x->x() {x->cond()} x->y() ? x->tval() : x->fval() // sun.misc.AtomicLongCSImpl.attemptUpdate // Need recv in a temporary register so it interferes with the other temporaries // move the arguments into the correct location // if (!can_store_as_constant(arg)) { // LIR_Opr tmp = new_register(arg->type()); // move the arguments into the correct location