assembler.hpp revision 3932
0N/A/*
2120N/A * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#ifndef SHARE_VM_ASM_ASSEMBLER_HPP
1879N/A#define SHARE_VM_ASM_ASSEMBLER_HPP
1879N/A
1879N/A#include "code/oopRecorder.hpp"
1879N/A#include "code/relocInfo.hpp"
1879N/A#include "memory/allocation.hpp"
1879N/A#include "utilities/debug.hpp"
1879N/A#include "utilities/growableArray.hpp"
1879N/A#include "utilities/top.hpp"
0N/A#ifdef TARGET_ARCH_x86
0N/A# include "register_x86.hpp"
0N/A# include "vm_version_x86.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_sparc
0N/A# include "register_sparc.hpp"
0N/A# include "vm_version_sparc.hpp"
0N/A#endif
1172N/A#ifdef TARGET_ARCH_zero
0N/A# include "register_zero.hpp"
0N/A# include "vm_version_zero.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_arm
0N/A# include "register_arm.hpp"
0N/A# include "vm_version_arm.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_ppc
0N/A# include "register_ppc.hpp"
0N/A# include "vm_version_ppc.hpp"
0N/A#endif
0N/A
0N/A// This file contains platform-independent assembler declarations.
0N/A
0N/Aclass CodeBuffer;
0N/Aclass MacroAssembler;
0N/Aclass AbstractAssembler;
2312N/Aclass Label;
2312N/A
2312N/A/**
2312N/A * Labels represent destinations for control transfer instructions. Such
2312N/A * instructions can accept a Label as their target argument. A Label is
2312N/A * bound to the current location in the code stream by calling the
0N/A * MacroAssembler's 'bind' method, which in turn calls the Label's 'bind'
0N/A * method. A Label may be referenced by an instruction before it's bound
0N/A * (i.e., 'forward referenced'). 'bind' stores the current code offset
0N/A * in the Label object.
0N/A *
0N/A * If an instruction references a bound Label, the offset field(s) within
0N/A * the instruction are immediately filled in based on the Label's code
2312N/A * offset. If an instruction references an unbound label, that
2312N/A * instruction is put on a list of instructions that must be patched
0N/A * (i.e., 'resolved') when the Label is bound.
2312N/A *
2312N/A * 'bind' will call the platform-specific 'patch_instruction' method to
2312N/A * fill in the offset field(s) for each unresolved instruction (if there
2312N/A * are any). 'patch_instruction' lives in one of the
0N/A * cpu/<arch>/vm/assembler_<arch>* files.
0N/A *
0N/A * Instead of using a linked list of unresolved instructions, a Label has
0N/A * an array of unresolved instruction code offsets. _patch_index
0N/A * contains the total number of forward references. If the Label's array
0N/A * overflows (i.e., _patch_index grows larger than the array size), a
0N/A * GrowableArray is allocated to hold the remaining offsets. (The cache
0N/A * size is 4 for now, which handles over 99.5% of the cases)
0N/A *
0N/A * Labels may only be used within a single CodeSection. If you need
0N/A * to create references between code sections, use explicit relocations.
0N/A */
0N/Aclass Label VALUE_OBJ_CLASS_SPEC {
0N/A private:
0N/A enum { PatchCacheSize = 4 };
0N/A
0N/A // _loc encodes both the binding state (via its sign)
0N/A // and the binding locator (via its value) of a label.
0N/A //
0N/A // _loc >= 0 bound label, loc() encodes the target (jump) position
0N/A // _loc == -1 unbound label
2230N/A int _loc;
0N/A
0N/A // References to instructions that jump to this unresolved label.
0N/A // These instructions need to be patched when the label is bound
0N/A // using the platform-specific patchInstruction() method.
0N/A //
0N/A // To avoid having to allocate from the C-heap each time, we provide
0N/A // a local cache and use the overflow only if we exceed the local cache
0N/A int _patches[PatchCacheSize];
2230N/A int _patch_index;
2230N/A GrowableArray<int>* _patch_overflow;
0N/A
0N/A Label(const Label&) { ShouldNotReachHere(); }
0N/A
0N/A public:
0N/A
0N/A /**
0N/A * After binding, be sure 'patch_instructions' is called later to link
0N/A */
2230N/A void bind_loc(int loc) {
0N/A assert(loc >= 0, "illegal locator");
0N/A assert(_loc == -1, "already bound");
0N/A _loc = loc;
0N/A }
0N/A void bind_loc(int pos, int sect); // = bind_loc(locator(pos, sect))
0N/A
0N/A#ifndef PRODUCT
0N/A // Iterates over all unresolved instructions for printing
0N/A void print_instructions(MacroAssembler* masm) const;
0N/A#endif // PRODUCT
0N/A
0N/A /**
0N/A * Returns the position of the the Label in the code buffer
0N/A * The position is a 'locator', which encodes both offset and section.
0N/A */
0N/A int loc() const {
0N/A assert(_loc >= 0, "unbound label");
0N/A return _loc;
0N/A }
0N/A int loc_pos() const; // == locator_pos(loc())
0N/A int loc_sect() const; // == locator_sect(loc())
0N/A
0N/A bool is_bound() const { return _loc >= 0; }
0N/A bool is_unbound() const { return _loc == -1 && _patch_index > 0; }
2312N/A bool is_unused() const { return _loc == -1 && _patch_index == 0; }
2312N/A
0N/A /**
0N/A * Adds a reference to an unresolved displacement instruction to
0N/A * this unbound label
0N/A *
0N/A * @param cb the code buffer being patched
0N/A * @param branch_loc the locator of the branch instruction in the code buffer
0N/A */
0N/A void add_patch_at(CodeBuffer* cb, int branch_loc);
0N/A
0N/A /**
0N/A * Iterate over the list of patches, resolving the instructions
0N/A * Call patch_instruction on each 'branch_loc' value
0N/A */
2312N/A void patch_instructions(MacroAssembler* masm);
0N/A
0N/A void init() {
0N/A _loc = -1;
0N/A _patch_index = 0;
0N/A _patch_overflow = NULL;
0N/A }
0N/A
0N/A Label() {
0N/A init();
0N/A }
0N/A};
0N/A
0N/A// A union type for code which has to assemble both constant and
0N/A// non-constant operands, when the distinction cannot be made
0N/A// statically.
0N/Aclass RegisterOrConstant VALUE_OBJ_CLASS_SPEC {
0N/A private:
0N/A Register _r;
0N/A intptr_t _c;
0N/A
0N/A public:
0N/A RegisterOrConstant(): _r(noreg), _c(0) {}
0N/A RegisterOrConstant(Register r): _r(r), _c(0) {}
0N/A RegisterOrConstant(intptr_t c): _r(noreg), _c(c) {}
0N/A
0N/A Register as_register() const { assert(is_register(),""); return _r; }
0N/A intptr_t as_constant() const { assert(is_constant(),""); return _c; }
0N/A
0N/A Register register_or_noreg() const { return _r; }
0N/A intptr_t constant_or_zero() const { return _c; }
0N/A
0N/A bool is_register() const { return _r != noreg; }
0N/A bool is_constant() const { return _r == noreg; }
0N/A};
0N/A
0N/A// The Abstract Assembler: Pure assembler doing NO optimizations on the
0N/A// instruction level; i.e., what you write is what you get.
0N/A// The Assembler is generating code into a CodeBuffer.
0N/Aclass AbstractAssembler : public ResourceObj {
0N/A friend class Label;
0N/A
2312N/A protected:
2312N/A CodeSection* _code_section; // section within the code buffer
2312N/A address _code_begin; // first byte of code buffer
2312N/A address _code_limit; // first byte after code buffer
2312N/A address _code_pos; // current code generation position
2312N/A OopRecorder* _oop_recorder; // support for relocInfo::oop_type
0N/A
367N/A // Code emission & accessing
367N/A address addr_at(int pos) const { return _code_begin + pos; }
0N/A
0N/A // This routine is called with a label is used for an address.
0N/A // Labels and displacements truck in offsets, but target must return a PC.
0N/A address target(Label& L); // return _code_section->target(L)
2312N/A
2312N/A bool is8bit(int x) const { return -0x80 <= x && x < 0x80; }
2312N/A bool isByte(int x) const { return 0 <= x && x < 0x100; }
2312N/A bool isShiftCount(int x) const { return 0 <= x && x < 32; }
0N/A
2312N/A void emit_byte(int x); // emit a single byte
2312N/A void emit_word(int x); // emit a 16-bit word (not a wordSize word!)
2312N/A void emit_long(jint x); // emit a 32-bit word (not a longSize word!)
2312N/A void emit_address(address x); // emit an address (not a longSize word!)
2312N/A
2312N/A // Instruction boundaries (required when emitting relocatable values).
2312N/A class InstructionMark: public StackObj {
2312N/A private:
0N/A AbstractAssembler* _assm;
0N/A
0N/A public:
0N/A InstructionMark(AbstractAssembler* assm) : _assm(assm) {
0N/A assert(assm->inst_mark() == NULL, "overlapping instructions");
0N/A _assm->set_inst_mark();
0N/A }
0N/A ~InstructionMark() {
0N/A _assm->clear_inst_mark();
0N/A }
0N/A };
0N/A friend class InstructionMark;
0N/A #ifdef ASSERT
0N/A // Make it return true on platforms which need to verify
0N/A // instruction boundaries for some operations.
0N/A inline static bool pd_check_instruction_mark();
0N/A
0N/A // Add delta to short branch distance to verify that it still fit into imm8.
0N/A int _short_branch_delta;
0N/A
0N/A int short_branch_delta() const { return _short_branch_delta; }
0N/A void set_short_branch_delta() { _short_branch_delta = 32; }
0N/A void clear_short_branch_delta() { _short_branch_delta = 0; }
0N/A
0N/A class ShortBranchVerifier: public StackObj {
0N/A private:
0N/A AbstractAssembler* _assm;
0N/A
0N/A public:
0N/A ShortBranchVerifier(AbstractAssembler* assm) : _assm(assm) {
0N/A assert(assm->short_branch_delta() == 0, "overlapping instructions");
0N/A _assm->set_short_branch_delta();
0N/A }
0N/A ~ShortBranchVerifier() {
0N/A _assm->clear_short_branch_delta();
0N/A }
0N/A };
0N/A #else
4321N/A // Dummy in product.
4321N/A class ShortBranchVerifier: public StackObj {
4321N/A public:
4321N/A ShortBranchVerifier(AbstractAssembler* assm) {}
4321N/A };
4321N/A #endif
0N/A
4321N/A // Label functions
4321N/A void print(Label& L);
4321N/A
4321N/A public:
4321N/A
0N/A // Creation
0N/A AbstractAssembler(CodeBuffer* code);
0N/A
0N/A // save end pointer back to code buf.
0N/A void sync();
0N/A
0N/A // ensure buf contains all code (call this before using/copying the code)
0N/A void flush();
0N/A
0N/A // min and max values for signed immediate ranges
0N/A static int min_simm(int nbits) { return -(intptr_t(1) << (nbits - 1)) ; }
0N/A static int max_simm(int nbits) { return (intptr_t(1) << (nbits - 1)) - 1; }
0N/A
0N/A // Define some:
0N/A static int min_simm10() { return min_simm(10); }
0N/A static int min_simm13() { return min_simm(13); }
0N/A static int min_simm16() { return min_simm(16); }
0N/A
0N/A // Test if x is within signed immediate range for nbits
0N/A static bool is_simm(intptr_t x, int nbits) { return min_simm(nbits) <= x && x <= max_simm(nbits); }
0N/A
0N/A // Define some:
0N/A static bool is_simm5( intptr_t x) { return is_simm(x, 5 ); }
2442N/A static bool is_simm8( intptr_t x) { return is_simm(x, 8 ); }
2442N/A static bool is_simm10(intptr_t x) { return is_simm(x, 10); }
2442N/A static bool is_simm11(intptr_t x) { return is_simm(x, 11); }
2442N/A static bool is_simm12(intptr_t x) { return is_simm(x, 12); }
2442N/A static bool is_simm13(intptr_t x) { return is_simm(x, 13); }
2442N/A static bool is_simm16(intptr_t x) { return is_simm(x, 16); }
2442N/A static bool is_simm26(intptr_t x) { return is_simm(x, 26); }
2442N/A static bool is_simm32(intptr_t x) { return is_simm(x, 32); }
2442N/A
2442N/A // Accessors
2442N/A CodeBuffer* code() const; // _code_section->outer()
2442N/A CodeSection* code_section() const { return _code_section; }
2442N/A int sect() const; // return _code_section->index()
2442N/A address pc() const { return _code_pos; }
2442N/A int offset() const { return _code_pos - _code_begin; }
2442N/A int locator() const; // CodeBuffer::locator(offset(), sect())
2442N/A OopRecorder* oop_recorder() const { return _oop_recorder; }
2442N/A void set_oop_recorder(OopRecorder* r) { _oop_recorder = r; }
2442N/A
2442N/A address inst_mark() const;
2442N/A void set_inst_mark();
2442N/A void clear_inst_mark();
0N/A
0N/A // Constants in code
0N/A void a_byte(int x);
0N/A void a_long(jint x);
0N/A void relocate(RelocationHolder const& rspec, int format = 0);
0N/A void relocate( relocInfo::relocType rtype, int format = 0) {
0N/A if (rtype != relocInfo::none)
0N/A relocate(Relocation::spec_simple(rtype), format);
0N/A }
0N/A
0N/A static int code_fill_byte(); // used to pad out odd-sized code buffers
0N/A
0N/A // Associate a comment with the current offset. It will be printed
0N/A // along with the disassembly when printing nmethods. Currently
0N/A // only supported in the instruction section of the code buffer.
0N/A void block_comment(const char* comment);
0N/A
0N/A // Label functions
0N/A void bind(Label& L); // binds an unbound label L to the current code position
0N/A
0N/A // Move to a different section in the same code buffer.
0N/A void set_code_section(CodeSection* cs);
0N/A
0N/A // Inform assembler when generating stub code and relocation info
0N/A address start_a_stub(int required_space);
3986N/A void end_a_stub();
39N/A // Ditto for constants.
39N/A address start_a_const(int required_space, int required_align = sizeof(double));
0N/A void end_a_const();
0N/A
0N/A // constants support
0N/A address long_constant(jlong c) {
0N/A address ptr = start_a_const(sizeof(c), sizeof(c));
3986N/A if (ptr != NULL) {
0N/A *(jlong*)ptr = c;
39N/A _code_pos = ptr + sizeof(c);
0N/A end_a_const();
0N/A }
0N/A return ptr;
0N/A }
0N/A address double_constant(jdouble c) {
0N/A address ptr = start_a_const(sizeof(c), sizeof(c));
0N/A if (ptr != NULL) {
0N/A *(jdouble*)ptr = c;
0N/A _code_pos = ptr + sizeof(c);
0N/A end_a_const();
0N/A }
0N/A return ptr;
0N/A }
0N/A address float_constant(jfloat c) {
0N/A address ptr = start_a_const(sizeof(c), sizeof(c));
0N/A if (ptr != NULL) {
0N/A *(jfloat*)ptr = c;
0N/A _code_pos = ptr + sizeof(c);
0N/A end_a_const();
0N/A }
0N/A return ptr;
0N/A }
0N/A address address_constant(address c) {
0N/A address ptr = start_a_const(sizeof(c), sizeof(c));
0N/A if (ptr != NULL) {
1172N/A *(address*)ptr = c;
1172N/A _code_pos = ptr + sizeof(c);
1172N/A end_a_const();
1172N/A }
401N/A return ptr;
401N/A }
401N/A address address_constant(address c, RelocationHolder const& rspec) {
401N/A address ptr = start_a_const(sizeof(c), sizeof(c));
0N/A if (ptr != NULL) {
401N/A relocate(rspec);
401N/A *(address*)ptr = c;
401N/A _code_pos = ptr + sizeof(c);
0N/A end_a_const();
0N/A }
0N/A return ptr;
0N/A }
0N/A
0N/A // Bootstrapping aid to cope with delayed determination of constants.
0N/A // Returns a static address which will eventually contain the constant.
0N/A // The value zero (NULL) stands instead of a constant which is still uncomputed.
0N/A // Thus, the eventual value of the constant must not be zero.
0N/A // This is fine, since this is designed for embedding object field
0N/A // offsets in code which must be generated before the object class is loaded.
0N/A // Field offsets are never zero, since an object's header (mark word)
0N/A // is located at offset zero.
0N/A RegisterOrConstant delayed_value(int(*value_fn)(), Register tmp, int offset = 0);
0N/A RegisterOrConstant delayed_value(address(*value_fn)(), Register tmp, int offset = 0);
0N/A virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr, Register tmp, int offset) = 0;
0N/A // Last overloading is platform-dependent; look in assembler_<arch>.cpp.
0N/A static intptr_t* delayed_value_addr(int(*constant_fn)());
0N/A static intptr_t* delayed_value_addr(address(*constant_fn)());
0N/A static void update_delayed_values();
0N/A
0N/A // Bang stack to trigger StackOverflowError at a safe location
0N/A // implementation delegates to machine-specific bang_stack_with_offset
0N/A void generate_stack_overflow_check( int frame_size_in_bytes );
0N/A virtual void bang_stack_with_offset(int offset) = 0;
0N/A
0N/A
0N/A /**
0N/A * A platform-dependent method to patch a jump instruction that refers
0N/A * to this label.
0N/A *
0N/A * @param branch the location of the instruction to patch
0N/A * @param masm the assembler which generated the branch
0N/A */
0N/A void pd_patch_instruction(address branch, address target);
0N/A
0N/A#ifndef PRODUCT
2312N/A /**
2312N/A * Platform-dependent method of printing an instruction that needs to be
2312N/A * patched.
0N/A *
0N/A * @param branch the instruction to be patched in the buffer.
0N/A */
0N/A static void pd_print_patched_instruction(address branch);
0N/A#endif // PRODUCT
0N/A};
0N/A
0N/A#ifdef TARGET_ARCH_x86
0N/A# include "assembler_x86.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_sparc
0N/A# include "assembler_sparc.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_zero
0N/A# include "assembler_zero.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_arm
0N/A# include "assembler_arm.hpp"
0N/A#endif
0N/A#ifdef TARGET_ARCH_ppc
605N/A# include "assembler_ppc.hpp"
0N/A#endif
0N/A
0N/A
0N/A#endif // SHARE_VM_ASM_ASSEMBLER_HPP
1172N/A