0N/A//
1999N/A// Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
0N/A// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A//
0N/A// This code is free software; you can redistribute it and/or modify it
0N/A// under the terms of the GNU General Public License version 2 only, as
0N/A// published by the Free Software Foundation.
0N/A//
0N/A// This code is distributed in the hope that it will be useful, but WITHOUT
0N/A// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A// version 2 for more details (a copy is included in the LICENSE file that
0N/A// accompanied this code).
0N/A//
0N/A// You should have received a copy of the GNU General Public License version
0N/A// 2 along with this work; if not, write to the Free Software Foundation,
0N/A// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A//
1472N/A// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A// or visit www.oracle.com if you need additional information or have any
1472N/A// questions.
0N/A//
0N/A//
0N/A
0N/A
0N/A // Support for u8 os::setup_fpu()
0N/A .inline _solaris_raw_setup_fpu,1
0N/A movl 0(%esp), %eax
0N/A fldcw (%eax)
0N/A .end
0N/A
0N/A // The argument size of each inline directive is ignored by the compiler
0N/A // and is set to 0 for compatibility reason.
0N/A
0N/A // Get the raw thread ID from %gs:0
0N/A .inline _raw_thread_id,0
0N/A movl %gs:0, %eax
0N/A .end
0N/A
3574N/A // Get current sp
3574N/A .inline _get_current_sp,0
3574N/A .volatile
3574N/A movl %esp, %eax
3574N/A .end
3574N/A
472N/A // Get current fp
472N/A .inline _get_current_fp,0
472N/A .volatile
0N/A movl %ebp, %eax
0N/A .end
0N/A
3029N/A // Support for os::rdtsc()
3029N/A .inline _raw_rdtsc,0
3029N/A rdtsc
3029N/A .end
3029N/A
0N/A // Support for jint Atomic::add(jint inc, volatile jint* dest)
0N/A // An additional bool (os::is_MP()) is passed as the last argument.
0N/A .inline _Atomic_add,3
0N/A movl 0(%esp), %eax // inc
0N/A movl 4(%esp), %edx // dest
0N/A movl %eax, %ecx
0N/A cmpl $0, 8(%esp) // MP test
1467N/A jne 1f
1467N/A xaddl %eax, (%edx)
1467N/A jmp 2f
1467N/A1: lock
1467N/A xaddl %eax, (%edx)
1467N/A2: addl %ecx, %eax
0N/A .end
0N/A
0N/A // Support for jint Atomic::xchg(jint exchange_value, volatile jint* dest).
0N/A .inline _Atomic_xchg,2
0N/A movl 0(%esp), %eax // exchange_value
0N/A movl 4(%esp), %ecx // dest
0N/A xchgl (%ecx), %eax
0N/A .end
0N/A
0N/A // Support for jint Atomic::cmpxchg(jint exchange_value,
0N/A // volatile jint *dest,
0N/A // jint compare_value)
0N/A // An additional bool (os::is_MP()) is passed as the last argument.
0N/A .inline _Atomic_cmpxchg,4
0N/A movl 8(%esp), %eax // compare_value
0N/A movl 0(%esp), %ecx // exchange_value
0N/A movl 4(%esp), %edx // dest
0N/A cmp $0, 12(%esp) // MP test
1467N/A jne 1f
1467N/A cmpxchgl %ecx, (%edx)
1467N/A jmp 2f
1467N/A1: lock
1467N/A cmpxchgl %ecx, (%edx)
1467N/A2:
0N/A .end
0N/A
0N/A // Support for jlong Atomic::cmpxchg(jlong exchange_value,
0N/A // volatile jlong* dest,
0N/A // jlong compare_value)
0N/A // An additional bool (os::is_MP()) is passed as the last argument.
0N/A .inline _Atomic_cmpxchg_long,6
0N/A pushl %ebx
0N/A pushl %edi
0N/A movl 20(%esp), %eax // compare_value (low)
0N/A movl 24(%esp), %edx // compare_value (high)
0N/A movl 16(%esp), %edi // dest
0N/A movl 8(%esp), %ebx // exchange_value (low)
0N/A movl 12(%esp), %ecx // exchange_high (high)
0N/A cmp $0, 28(%esp) // MP test
1467N/A jne 1f
1467N/A cmpxchg8b (%edi)
1467N/A jmp 2f
1467N/A1: lock
1467N/A cmpxchg8b (%edi)
1467N/A2: popl %edi
0N/A popl %ebx
0N/A .end
0N/A
1999N/A // Support for jlong Atomic::load and Atomic::store.
1999N/A // void _Atomic_move_long(volatile jlong* src, volatile jlong* dst)
1999N/A .inline _Atomic_move_long,2
894N/A movl 0(%esp), %eax // src
894N/A fildll (%eax)
894N/A movl 4(%esp), %eax // dest
894N/A fistpll (%eax)
894N/A .end
894N/A
0N/A // Support for OrderAccess::acquire()
0N/A .inline _OrderAccess_acquire,0
0N/A movl 0(%esp), %eax
0N/A .end
0N/A
0N/A // Support for OrderAccess::fence()
0N/A .inline _OrderAccess_fence,0
0N/A lock
0N/A addl $0, (%esp)
0N/A .end
0N/A
0N/A // Support for u2 Bytes::swap_u2(u2 x)
0N/A .inline _raw_swap_u2,1
0N/A movl 0(%esp), %eax
0N/A xchgb %al, %ah
0N/A .end
0N/A
0N/A // Support for u4 Bytes::swap_u4(u4 x)
0N/A .inline _raw_swap_u4,1
0N/A movl 0(%esp), %eax
0N/A bswap %eax
0N/A .end
0N/A
0N/A // Support for u8 Bytes::swap_u8_base(u4 x, u4 y)
0N/A .inline _raw_swap_u8,2
0N/A movl 4(%esp), %eax // y
0N/A movl 0(%esp), %edx // x
0N/A bswap %eax
0N/A bswap %edx
0N/A .end