1010N/A/*
2128N/A * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
2128N/A * Copyright 2007, 2008, 2011 Red Hat, Inc.
1010N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
1010N/A *
1010N/A * This code is free software; you can redistribute it and/or modify it
1010N/A * under the terms of the GNU General Public License version 2 only, as
1010N/A * published by the Free Software Foundation.
1010N/A *
1010N/A * This code is distributed in the hope that it will be useful, but WITHOUT
1010N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1010N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
1010N/A * version 2 for more details (a copy is included in the LICENSE file that
1010N/A * accompanied this code).
1010N/A *
1010N/A * You should have received a copy of the GNU General Public License version
1010N/A * 2 along with this work; if not, write to the Free Software Foundation,
1010N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
1010N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
1010N/A *
1010N/A */
1010N/A
1879N/A#ifndef OS_CPU_LINUX_ZERO_VM_ATOMIC_LINUX_ZERO_INLINE_HPP
1879N/A#define OS_CPU_LINUX_ZERO_VM_ATOMIC_LINUX_ZERO_INLINE_HPP
1879N/A
1879N/A#include "orderAccess_linux_zero.inline.hpp"
1879N/A#include "runtime/atomic.hpp"
1879N/A#include "runtime/os.hpp"
1879N/A#include "vm_version_zero.hpp"
1879N/A
1010N/A// Implementation of class atomic
1010N/A
1010N/A#ifdef M68K
1010N/A
1010N/A/*
1010N/A * __m68k_cmpxchg
1010N/A *
1010N/A * Atomically store newval in *ptr if *ptr is equal to oldval for user space.
1010N/A * Returns newval on success and oldval if no exchange happened.
1010N/A * This implementation is processor specific and works on
1010N/A * 68020 68030 68040 and 68060.
1010N/A *
1010N/A * It will not work on ColdFire, 68000 and 68010 since they lack the CAS
1010N/A * instruction.
1010N/A * Using a kernelhelper would be better for arch complete implementation.
1010N/A *
1010N/A */
1010N/A
1010N/Astatic inline int __m68k_cmpxchg(int oldval, int newval, volatile int *ptr) {
1010N/A int ret;
1010N/A __asm __volatile ("cas%.l %0,%2,%1"
1010N/A : "=d" (ret), "+m" (*(ptr))
1010N/A : "d" (newval), "0" (oldval));
1010N/A return ret;
1010N/A}
1010N/A
1010N/A/* Perform an atomic compare and swap: if the current value of `*PTR'
1010N/A is OLDVAL, then write NEWVAL into `*PTR'. Return the contents of
1010N/A `*PTR' before the operation.*/
1010N/Astatic inline int m68k_compare_and_swap(volatile int *ptr,
1010N/A int oldval,
1010N/A int newval) {
1010N/A for (;;) {
1010N/A int prev = *ptr;
1010N/A if (prev != oldval)
1010N/A return prev;
1010N/A
1010N/A if (__m68k_cmpxchg (prev, newval, ptr) == newval)
1010N/A // Success.
1010N/A return prev;
1010N/A
1010N/A // We failed even though prev == oldval. Try again.
1010N/A }
1010N/A}
1010N/A
1010N/A/* Atomically add an int to memory. */
1010N/Astatic inline int m68k_add_and_fetch(volatile int *ptr, int add_value) {
1010N/A for (;;) {
1010N/A // Loop until success.
1010N/A
1010N/A int prev = *ptr;
1010N/A
1010N/A if (__m68k_cmpxchg (prev, prev + add_value, ptr) == prev + add_value)
1010N/A return prev + add_value;
1010N/A }
1010N/A}
1010N/A
1010N/A/* Atomically write VALUE into `*PTR' and returns the previous
1010N/A contents of `*PTR'. */
1010N/Astatic inline int m68k_lock_test_and_set(volatile int *ptr, int newval) {
1010N/A for (;;) {
1010N/A // Loop until success.
1010N/A int prev = *ptr;
1010N/A
1010N/A if (__m68k_cmpxchg (prev, newval, ptr) == prev)
1010N/A return prev;
1010N/A }
1010N/A}
1010N/A#endif // M68K
1010N/A
1010N/A#ifdef ARM
1010N/A
1010N/A/*
1010N/A * __kernel_cmpxchg
1010N/A *
1010N/A * Atomically store newval in *ptr if *ptr is equal to oldval for user space.
1010N/A * Return zero if *ptr was changed or non-zero if no exchange happened.
1010N/A * The C flag is also set if *ptr was changed to allow for assembly
1010N/A * optimization in the calling code.
1010N/A *
1010N/A */
1010N/A
1010N/Atypedef int (__kernel_cmpxchg_t)(int oldval, int newval, volatile int *ptr);
1010N/A#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *) 0xffff0fc0)
1010N/A
1010N/A
1010N/A
1010N/A/* Perform an atomic compare and swap: if the current value of `*PTR'
1010N/A is OLDVAL, then write NEWVAL into `*PTR'. Return the contents of
1010N/A `*PTR' before the operation.*/
1010N/Astatic inline int arm_compare_and_swap(volatile int *ptr,
1010N/A int oldval,
1010N/A int newval) {
1010N/A for (;;) {
1010N/A int prev = *ptr;
1010N/A if (prev != oldval)
1010N/A return prev;
1010N/A
1010N/A if (__kernel_cmpxchg (prev, newval, ptr) == 0)
1010N/A // Success.
1010N/A return prev;
1010N/A
1010N/A // We failed even though prev == oldval. Try again.
1010N/A }
1010N/A}
1010N/A
1010N/A/* Atomically add an int to memory. */
1010N/Astatic inline int arm_add_and_fetch(volatile int *ptr, int add_value) {
1010N/A for (;;) {
1010N/A // Loop until a __kernel_cmpxchg succeeds.
1010N/A
1010N/A int prev = *ptr;
1010N/A
1010N/A if (__kernel_cmpxchg (prev, prev + add_value, ptr) == 0)
1010N/A return prev + add_value;
1010N/A }
1010N/A}
1010N/A
1010N/A/* Atomically write VALUE into `*PTR' and returns the previous
1010N/A contents of `*PTR'. */
1010N/Astatic inline int arm_lock_test_and_set(volatile int *ptr, int newval) {
1010N/A for (;;) {
1010N/A // Loop until a __kernel_cmpxchg succeeds.
1010N/A int prev = *ptr;
1010N/A
1010N/A if (__kernel_cmpxchg (prev, newval, ptr) == 0)
1010N/A return prev;
1010N/A }
1010N/A}
1010N/A#endif // ARM
1010N/A
1010N/Ainline void Atomic::store(jint store_value, volatile jint* dest) {
1010N/A *dest = store_value;
1010N/A}
1010N/A
1010N/Ainline void Atomic::store_ptr(intptr_t store_value, intptr_t* dest) {
1010N/A *dest = store_value;
1010N/A}
1010N/A
1010N/Ainline jint Atomic::add(jint add_value, volatile jint* dest) {
1010N/A#ifdef ARM
1010N/A return arm_add_and_fetch(dest, add_value);
1010N/A#else
1010N/A#ifdef M68K
1010N/A return m68k_add_and_fetch(dest, add_value);
1010N/A#else
1010N/A return __sync_add_and_fetch(dest, add_value);
1010N/A#endif // M68K
1010N/A#endif // ARM
1010N/A}
1010N/A
1010N/Ainline intptr_t Atomic::add_ptr(intptr_t add_value, volatile intptr_t* dest) {
1010N/A#ifdef ARM
1010N/A return arm_add_and_fetch(dest, add_value);
1010N/A#else
1010N/A#ifdef M68K
1010N/A return m68k_add_and_fetch(dest, add_value);
1010N/A#else
1010N/A return __sync_add_and_fetch(dest, add_value);
1010N/A#endif // M68K
1010N/A#endif // ARM
1010N/A}
1010N/A
1010N/Ainline void* Atomic::add_ptr(intptr_t add_value, volatile void* dest) {
1010N/A return (void *) add_ptr(add_value, (volatile intptr_t *) dest);
1010N/A}
1010N/A
1010N/Ainline void Atomic::inc(volatile jint* dest) {
1010N/A add(1, dest);
1010N/A}
1010N/A
1010N/Ainline void Atomic::inc_ptr(volatile intptr_t* dest) {
1010N/A add_ptr(1, dest);
1010N/A}
1010N/A
1010N/Ainline void Atomic::inc_ptr(volatile void* dest) {
1010N/A add_ptr(1, dest);
1010N/A}
1010N/A
1010N/Ainline void Atomic::dec(volatile jint* dest) {
1010N/A add(-1, dest);
1010N/A}
1010N/A
1010N/Ainline void Atomic::dec_ptr(volatile intptr_t* dest) {
1010N/A add_ptr(-1, dest);
1010N/A}
1010N/A
1010N/Ainline void Atomic::dec_ptr(volatile void* dest) {
1010N/A add_ptr(-1, dest);
1010N/A}
1010N/A
1010N/Ainline jint Atomic::xchg(jint exchange_value, volatile jint* dest) {
1010N/A#ifdef ARM
1010N/A return arm_lock_test_and_set(dest, exchange_value);
1010N/A#else
1010N/A#ifdef M68K
1010N/A return m68k_lock_test_and_set(dest, exchange_value);
1010N/A#else
1010N/A // __sync_lock_test_and_set is a bizarrely named atomic exchange
1010N/A // operation. Note that some platforms only support this with the
1010N/A // limitation that the only valid value to store is the immediate
1010N/A // constant 1. There is a test for this in JNI_CreateJavaVM().
1010N/A return __sync_lock_test_and_set (dest, exchange_value);
1010N/A#endif // M68K
1010N/A#endif // ARM
1010N/A}
1010N/A
1010N/Ainline intptr_t Atomic::xchg_ptr(intptr_t exchange_value,
1010N/A volatile intptr_t* dest) {
1010N/A#ifdef ARM
1010N/A return arm_lock_test_and_set(dest, exchange_value);
1010N/A#else
1010N/A#ifdef M68K
1010N/A return m68k_lock_test_and_set(dest, exchange_value);
1010N/A#else
1010N/A return __sync_lock_test_and_set (dest, exchange_value);
1010N/A#endif // M68K
1010N/A#endif // ARM
1010N/A}
1010N/A
1010N/Ainline void* Atomic::xchg_ptr(void* exchange_value, volatile void* dest) {
1010N/A return (void *) xchg_ptr((intptr_t) exchange_value,
1010N/A (volatile intptr_t*) dest);
1010N/A}
1010N/A
1010N/Ainline jint Atomic::cmpxchg(jint exchange_value,
1010N/A volatile jint* dest,
1010N/A jint compare_value) {
1010N/A#ifdef ARM
1010N/A return arm_compare_and_swap(dest, compare_value, exchange_value);
1010N/A#else
1010N/A#ifdef M68K
1010N/A return m68k_compare_and_swap(dest, compare_value, exchange_value);
1010N/A#else
1010N/A return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
1010N/A#endif // M68K
1010N/A#endif // ARM
1010N/A}
1010N/A
1010N/Ainline jlong Atomic::cmpxchg(jlong exchange_value,
1010N/A volatile jlong* dest,
1010N/A jlong compare_value) {
1010N/A
1010N/A return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
1010N/A}
1010N/A
1010N/Ainline intptr_t Atomic::cmpxchg_ptr(intptr_t exchange_value,
1010N/A volatile intptr_t* dest,
1010N/A intptr_t compare_value) {
1010N/A#ifdef ARM
1010N/A return arm_compare_and_swap(dest, compare_value, exchange_value);
1010N/A#else
1010N/A#ifdef M68K
1010N/A return m68k_compare_and_swap(dest, compare_value, exchange_value);
1010N/A#else
1010N/A return __sync_val_compare_and_swap(dest, compare_value, exchange_value);
1010N/A#endif // M68K
1010N/A#endif // ARM
1010N/A}
1010N/A
1010N/Ainline void* Atomic::cmpxchg_ptr(void* exchange_value,
1010N/A volatile void* dest,
1010N/A void* compare_value) {
1010N/A
1010N/A return (void *) cmpxchg_ptr((intptr_t) exchange_value,
1010N/A (volatile intptr_t*) dest,
1010N/A (intptr_t) compare_value);
1010N/A}
1879N/A
2128N/Ainline jlong Atomic::load(volatile jlong* src) {
2128N/A volatile jlong dest;
2128N/A os::atomic_copy64(src, &dest);
2128N/A return dest;
2128N/A}
2128N/A
2128N/Ainline void Atomic::store(jlong store_value, jlong* dest) {
2128N/A os::atomic_copy64((volatile jlong*)&store_value, (volatile jlong*)dest);
2128N/A}
2128N/A
2128N/Ainline void Atomic::store(jlong store_value, volatile jlong* dest) {
2128N/A os::atomic_copy64((volatile jlong*)&store_value, dest);
2128N/A}
2128N/A
1879N/A#endif // OS_CPU_LINUX_ZERO_VM_ATOMIC_LINUX_ZERO_INLINE_HPP