1472N/A * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. 0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 0N/A * This code is free software; you can redistribute it and/or modify it 0N/A * under the terms of the GNU General Public License version 2 only, as 0N/A * published by the Free Software Foundation. 0N/A * This code is distributed in the hope that it will be useful, but WITHOUT 0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 0N/A * version 2 for more details (a copy is included in the LICENSE file that 0N/A * accompanied this code). 0N/A * You should have received a copy of the GNU General Public License version 0N/A * 2 along with this work; if not, write to the Free Software Foundation, 0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 0N/A// On i486 the frame looks as follows: 0N/A// +-----------------------------+---------+----------------------------------------+----------------+----------- 0N/A// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling . 0N/A// +-----------------------------+---------+----------------------------------------+----------------+----------- 0N/A// The FPU registers are mapped with their offset from TOS; therefore the 0N/A// status of FPU stack must be updated during code emission. 0N/A // VMReg name for spilled physical FPU stack slot n 1909N/A // Reduce the number of available regs (to free r12) in case of compressed oops 1879N/A#
endif // CPU_X86_VM_C1_FRAMEMAP_X86_HPP