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0N/A * accompanied this code).
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0N/A
1879N/A#ifndef CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP
1879N/A#define CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP
1879N/A
0N/A// Simulates the FPU stack and maintains mapping [fpu-register -> stack offset]
0N/A// FPU registers are described as numbers from 0..nof_fpu_regs-1
0N/A
0N/Aclass Compilation;
0N/A
0N/Aclass FpuStackSim VALUE_OBJ_CLASS_SPEC {
0N/A private:
0N/A Compilation* _compilation;
0N/A int _stack_size;
0N/A int _regs[FrameMap::nof_fpu_regs];
0N/A
0N/A int tos_index() const { return _stack_size - 1; }
0N/A
0N/A int regs_at(int i) const;
0N/A void set_regs_at(int i, int val);
0N/A void dec_stack_size();
0N/A void inc_stack_size();
0N/A
0N/A // unified bailout support
0N/A Compilation* compilation() const { return _compilation; }
0N/A void bailout(const char* msg) const { compilation()->bailout(msg); }
0N/A bool bailed_out() const { return compilation()->bailed_out(); }
0N/A
0N/A public:
0N/A FpuStackSim(Compilation* compilation);
0N/A void pop ();
0N/A void pop (int rnr); // rnr must be on tos
0N/A void push(int rnr);
0N/A void swap(int offset); // exchange tos with tos + offset
0N/A int offset_from_tos(int rnr) const; // return the offset of the topmost instance of rnr from TOS
0N/A int get_slot(int tos_offset) const; // return the entry at the given offset from TOS
0N/A void set_slot(int tos_offset, int rnr); // set the entry at the given offset from TOS
0N/A void rename(int old_rnr, int new_rnr); // rename all instances of old_rnr to new_rnr
0N/A bool contains(int rnr); // debugging support only
0N/A bool is_empty();
0N/A bool slot_is_empty(int tos_offset);
0N/A int stack_size() const { return _stack_size; }
0N/A void clear();
0N/A intArray* write_state();
0N/A void read_state(intArray* fpu_stack_state);
0N/A
0N/A void print() PRODUCT_RETURN;
0N/A};
1879N/A
1879N/A#endif // CPU_X86_VM_C1_FPUSTACKSIM_X86_HPP