icBuffer_sparc.cpp revision 1879
9N/A/*
553N/A * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
9N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9N/A *
9N/A * This code is free software; you can redistribute it and/or modify it
9N/A * under the terms of the GNU General Public License version 2 only, as
553N/A * published by the Free Software Foundation.
9N/A *
553N/A * This code is distributed in the hope that it will be useful, but WITHOUT
9N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
9N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
9N/A * version 2 for more details (a copy is included in the LICENSE file that
9N/A * accompanied this code).
9N/A *
9N/A * You should have received a copy of the GNU General Public License version
9N/A * 2 along with this work; if not, write to the Free Software Foundation,
9N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
9N/A *
9N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
9N/A * or visit www.oracle.com if you need additional information or have any
553N/A * questions.
553N/A *
553N/A */
9N/A
9N/A#include "precompiled.hpp"
9N/A#include "asm/assembler.hpp"
9N/A#include "assembler_sparc.inline.hpp"
9N/A#include "code/icBuffer.hpp"
9N/A#include "gc_interface/collectedHeap.inline.hpp"
9N/A#include "interpreter/bytecodes.hpp"
9N/A#include "memory/resourceArea.hpp"
9N/A#include "nativeInst_sparc.hpp"
9N/A#include "oops/oop.inline.hpp"
9N/A#include "oops/oop.inline2.hpp"
9N/A
9N/Aint InlineCacheBuffer::ic_stub_code_size() {
9N/A#ifdef _LP64
9N/A if (TraceJumps) return 600 * wordSize;
9N/A return (NativeMovConstReg::instruction_size + // sethi;add
9N/A NativeJump::instruction_size + // sethi; jmp; delay slot
9N/A (1*BytesPerInstWord) + 1); // flush + 1 extra byte
9N/A#else
9N/A if (TraceJumps) return 300 * wordSize;
9N/A return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer
9N/A#endif
9N/A}
9N/A
9N/Avoid InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, oop cached_oop, address entry_point) {
9N/A ResourceMark rm;
9N/A CodeBuffer code(code_begin, ic_stub_code_size());
9N/A MacroAssembler* masm = new MacroAssembler(&code);
9N/A // note: even though the code contains an embedded oop, we do not need reloc info
9N/A // because
9N/A // (1) the oop is old (i.e., doesn't matter for scavenges)
9N/A // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
9N/A assert(cached_oop == NULL || cached_oop->is_perm(), "must be old oop");
9N/A AddressLiteral cached_oop_addrlit(cached_oop, relocInfo::none);
9N/A // Force the set to generate the fixed sequence so next_instruction_address works
9N/A masm->patchable_set(cached_oop_addrlit, G5_inline_cache_reg);
9N/A assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");
9N/A assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");
9N/A AddressLiteral entry(entry_point);
9N/A masm->JUMP(entry, G3_scratch, 0);
9N/A masm->delayed()->nop();
9N/A masm->flush();
9N/A}
9N/A
9N/A
9N/Aaddress InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
9N/A NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
9N/A NativeJump* jump = nativeJump_at(move->next_instruction_address());
9N/A return jump->jump_destination();
9N/A}
9N/A
9N/A
9N/Aoop InlineCacheBuffer::ic_buffer_cached_oop(address code_begin) {
9N/A NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
9N/A NativeJump* jump = nativeJump_at(move->next_instruction_address());
9N/A return (oop)move->data();
}