icBuffer_sparc.cpp revision 0
2N/A/*
2N/A * Copyright 1997-2006 Sun Microsystems, Inc. All Rights Reserved.
2N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
2N/A *
2N/A * This code is free software; you can redistribute it and/or modify it
2N/A * under the terms of the GNU General Public License version 2 only, as
2N/A * published by the Free Software Foundation.
2N/A *
2N/A * This code is distributed in the hope that it will be useful, but WITHOUT
2N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
2N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
2N/A * version 2 for more details (a copy is included in the LICENSE file that
2N/A * accompanied this code).
2N/A *
2N/A * You should have received a copy of the GNU General Public License version
2N/A * 2 along with this work; if not, write to the Free Software Foundation,
2N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
2N/A *
2N/A * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
2N/A * CA 95054 USA or visit www.sun.com if you need additional information or
2N/A * have any questions.
2N/A *
2N/A */
2N/A
2N/A#include "incls/_precompiled.incl"
2N/A#include "incls/_icBuffer_sparc.cpp.incl"
2N/A
2N/Aint InlineCacheBuffer::ic_stub_code_size() {
2N/A#ifdef _LP64
2N/A if (TraceJumps) return 600 * wordSize;
2N/A return (NativeMovConstReg::instruction_size + // sethi;add
2N/A NativeJump::instruction_size + // sethi; jmp; delay slot
2N/A (1*BytesPerInstWord) + 1); // flush + 1 extra byte
2N/A#else
2N/A if (TraceJumps) return 300 * wordSize;
2N/A return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer
2N/A#endif
2N/A}
2N/A
2N/Avoid InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, oop cached_oop, address entry_point) {
2N/A ResourceMark rm;
2N/A CodeBuffer code(code_begin, ic_stub_code_size());
2N/A MacroAssembler* masm = new MacroAssembler(&code);
2N/A // note: even though the code contains an embedded oop, we do not need reloc info
// because
// (1) the oop is old (i.e., doesn't matter for scavenges)
// (2) these ICStubs are removed *before* a GC happens, so the roots disappear
assert(cached_oop == NULL || cached_oop->is_perm(), "must be old oop");
Address cached_oop_addr(G5_inline_cache_reg, address(cached_oop));
// Force the sethi to generate the fixed sequence so next_instruction_address works
masm->sethi(cached_oop_addr, true /* ForceRelocatable */ );
masm->add(cached_oop_addr, G5_inline_cache_reg);
assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");
assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");
Address entry(G3_scratch, entry_point);
masm->JUMP(entry, 0);
masm->delayed()->nop();
masm->flush();
}
address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
NativeJump* jump = nativeJump_at(move->next_instruction_address());
return jump->jump_destination();
}
oop InlineCacheBuffer::ic_buffer_cached_oop(address code_begin) {
NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
NativeJump* jump = nativeJump_at(move->next_instruction_address());
return (oop)move->data();
}