0N/A/*
1879N/A * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#include "precompiled.hpp"
1879N/A#include "asm/assembler.hpp"
1879N/A#include "assembler_sparc.inline.hpp"
1879N/A#include "code/icBuffer.hpp"
1879N/A#include "gc_interface/collectedHeap.inline.hpp"
1879N/A#include "interpreter/bytecodes.hpp"
1879N/A#include "memory/resourceArea.hpp"
1879N/A#include "nativeInst_sparc.hpp"
1879N/A#include "oops/oop.inline.hpp"
1879N/A#include "oops/oop.inline2.hpp"
0N/A
0N/Aint InlineCacheBuffer::ic_stub_code_size() {
0N/A#ifdef _LP64
0N/A if (TraceJumps) return 600 * wordSize;
0N/A return (NativeMovConstReg::instruction_size + // sethi;add
0N/A NativeJump::instruction_size + // sethi; jmp; delay slot
0N/A (1*BytesPerInstWord) + 1); // flush + 1 extra byte
0N/A#else
0N/A if (TraceJumps) return 300 * wordSize;
0N/A return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer
0N/A#endif
0N/A}
0N/A
0N/Avoid InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, oop cached_oop, address entry_point) {
0N/A ResourceMark rm;
0N/A CodeBuffer code(code_begin, ic_stub_code_size());
0N/A MacroAssembler* masm = new MacroAssembler(&code);
0N/A // note: even though the code contains an embedded oop, we do not need reloc info
0N/A // because
0N/A // (1) the oop is old (i.e., doesn't matter for scavenges)
0N/A // (2) these ICStubs are removed *before* a GC happens, so the roots disappear
0N/A assert(cached_oop == NULL || cached_oop->is_perm(), "must be old oop");
727N/A AddressLiteral cached_oop_addrlit(cached_oop, relocInfo::none);
727N/A // Force the set to generate the fixed sequence so next_instruction_address works
727N/A masm->patchable_set(cached_oop_addrlit, G5_inline_cache_reg);
0N/A assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");
0N/A assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");
727N/A AddressLiteral entry(entry_point);
727N/A masm->JUMP(entry, G3_scratch, 0);
0N/A masm->delayed()->nop();
0N/A masm->flush();
0N/A}
0N/A
0N/A
0N/Aaddress InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
0N/A NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
0N/A NativeJump* jump = nativeJump_at(move->next_instruction_address());
0N/A return jump->jump_destination();
0N/A}
0N/A
0N/A
0N/Aoop InlineCacheBuffer::ic_buffer_cached_oop(address code_begin) {
0N/A NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
0N/A NativeJump* jump = nativeJump_at(move->next_instruction_address());
0N/A return (oop)move->data();
0N/A}