c1_LIRAssembler_sparc.cpp revision 1297
0N/A# include "incls/_c1_LIRAssembler_sparc.cpp.incl"
0N/A case lir_null_check:
0N/A if (VerifyOops) {
0N/A // On-stack-replacement entry sequence (interpreter frame layout described in interpreter_sparc.cpp):
0N/A // 2. Initialize local variables in the compiled activation. The expression stack must be empty
0N/A { assert(frame::interpreter_frame_monitor_size() == BasicObjectLock::size(), "adjust code below");
0N/A for (int i = 0; i < number_of_locks; i++) {
0N/A// This is the fast version of java.lang.String.compare; it has not
0N/Avoid LIR_Assembler::emit_string_compare(LIR_Opr left, LIR_Opr right, LIR_Opr dst, CodeEmitInfo* info) {
0N/A // Also, get string0.count-string1.count in o7 and get the condition code set
0N/Avoid LIR_Assembler::monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register hdr, int monitor_no) {
0N/A if (!GenerateSynchronizationCode) return;
0N/A if (UseFastLocking) {
0N/A assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
0N/A case lir_cond_less: acond = (is_unordered ? Assembler::f_unorderedOrLess : Assembler::f_less); break;
0N/A case lir_cond_greater: acond = (is_unordered ? Assembler::f_unorderedOrGreater : Assembler::f_greater); break;
0N/A case lir_cond_lessEqual: acond = (is_unordered ? Assembler::f_unorderedOrLessOrEqual : Assembler::f_lessOrEqual); break;
0N/A case lir_cond_greaterEqual: acond = (is_unordered ? Assembler::f_unorderedOrGreaterOrEqual: Assembler::f_greaterOrEqual); break;
0N/A default : ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A int shift = (code == Bytecodes::_i2b) ? (BitsPerInt - T_BYTE_aelem_bytes * BitsPerByte) : (BitsPerInt - BitsPerShort);
0N/A default: ShouldNotReachHere();
0N/Aint LIR_Assembler::load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo *info) {
0N/A default : ShouldNotReachHere();
0N/A default : ShouldNotReachHere();
0N/A return load_offset;
0N/Avoid LIR_Assembler::store(Register value, Register base, int offset, BasicType type, CodeEmitInfo *info) {
0N/A default : ShouldNotReachHere();
0N/A default : ShouldNotReachHere();
0N/Avoid LIR_Assembler::load(Register s, int disp, FloatRegister d, BasicType ld_type, CodeEmitInfo *info) {
0N/A default : ShouldNotReachHere();
0N/Avoid LIR_Assembler::store(FloatRegister value, Register base, int offset, BasicType type, CodeEmitInfo *info) {
0N/A default : ShouldNotReachHere();
0N/Aint LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool unaligned) {
0N/A int store_offset;
0N/A default : ShouldNotReachHere();
0N/A return store_offset;
0N/A default : ShouldNotReachHere();
0N/A return store_offset;
0N/Aint LIR_Assembler::load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool unaligned) {
0N/A int load_offset;
1060N/A __ lduw(base, offset + lo_word_offset_in_bytes, O7); // in case O7 is base or offset, use it last
0N/A default : ShouldNotReachHere();
0N/A return load_offset;
0N/A default : ShouldNotReachHere();
0N/A return load_offset;
0N/Avoid LIR_Assembler::load(const Address& a, Register d, BasicType ld_type, CodeEmitInfo *info, int offset) {
0N/Avoid LIR_Assembler::store(Register value, const Address& dest, BasicType type, CodeEmitInfo *info, int offset) {
0N/Avoid LIR_Assembler::load(const Address& a, FloatRegister d, BasicType ld_type, CodeEmitInfo *info, int offset) {
0N/Avoid LIR_Assembler::store(FloatRegister value, const Address& dest, BasicType type, CodeEmitInfo *info, int offset) {
0N/Avoid LIR_Assembler::store(Register value, LIR_Address* dest, BasicType type, CodeEmitInfo *info) {
0N/Avoid LIR_Assembler::load(LIR_Address* a, FloatRegister d, BasicType ld_type, CodeEmitInfo *info) {
0N/Avoid LIR_Assembler::store(FloatRegister value, LIR_Address* dest, BasicType type, CodeEmitInfo *info) {
0N/Avoid LIR_Assembler::const2reg(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info) {
727N/A Address temp_slot_hi(SP, ((frame::register_save_words) * wordSize) + (longSize/2) + STACK_BIAS);
0N/A if (needs_patching) {
0N/A if (!Assembler::is_simm13(disp_value) && (!unaligned || Assembler::is_simm13(disp_value + 4))) {
0N/A if (needs_patching) {
0N/Avoid LIR_Assembler::reg2stack(LIR_Opr from_reg, LIR_Opr dest, BasicType type, bool pop_fpu_stack) {
0N/A if (needs_patching) {
0N/A if (!Assembler::is_simm13(disp_value) && (!unaligned || Assembler::is_simm13(disp_value + 4))) {
0N/A if (needs_patching) {
0N/A assert(condition == lir_cond_equal || condition == lir_cond_notEqual, "only handles these cases");
0N/Avoid LIR_Assembler::comp_fl2i(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dst, LIR_Op2* op){
0N/A __ float_cmp(true, is_unordered_less ? -1 : 1, left->as_float_reg(), right->as_float_reg(), dst->as_register());
0N/A __ float_cmp(false, is_unordered_less ? -1 : 1, left->as_double_reg(), right->as_double_reg(), dst->as_register());
0N/Avoid LIR_Assembler::cmove(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result) {
0N/A default: ShouldNotReachHere();
0N/Avoid LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) {
0N/A w = FloatRegisterImpl::S;
0N/A w = FloatRegisterImpl::D;
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/Avoid LIR_Assembler::intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr thread, LIR_Opr dest, LIR_Op* op) {
0N/A default: ShouldNotReachHere();
0N/A case lir_logic_and:
0N/A case lir_logic_or:
0N/A case lir_logic_xor:
0N/A default: ShouldNotReachHere();
0N/A case lir_logic_and: __ and3 (left->as_register(), right->as_register(), dest->as_register()); break;
0N/A case lir_logic_or: __ or3 (left->as_register(), right->as_register(), dest->as_register()); break;
0N/A case lir_logic_xor: __ xor3 (left->as_register(), right->as_register(), dest->as_register()); break;
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A case lir_logic_and:
0N/A case lir_logic_or:
0N/A case lir_logic_xor:
0N/A default: ShouldNotReachHere();
0N/Avoid LIR_Assembler::throw_op(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info, bool unwind) {
0N/A BasicType basic_type = default_type != NULL ? default_type->element_type()->basic_type() : T_ILLEGAL;
0N/Avoid LIR_Assembler::shift_op(LIR_Code code, LIR_Opr left, LIR_Opr count, LIR_Opr dest, LIR_Opr tmp) {
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A case lir_shl: __ sllx (left->as_register_lo(), count->as_register(), dest->as_register_lo()); break;
0N/A case lir_shr: __ srax (left->as_register_lo(), count->as_register(), dest->as_register_lo()); break;
0N/A case lir_ushr: __ srlx (left->as_register_lo(), count->as_register(), dest->as_register_lo()); break;
0N/A default: ShouldNotReachHere();
0N/A case lir_shl: __ lshl (left->as_register_hi(), left->as_register_lo(), count->as_register(), dest->as_register_hi(), dest->as_register_lo(), G3_scratch); break;
0N/A case lir_shr: __ lshr (left->as_register_hi(), left->as_register_lo(), count->as_register(), dest->as_register_hi(), dest->as_register_lo(), G3_scratch); break;
0N/A case lir_ushr: __ lushr (left->as_register_hi(), left->as_register_lo(), count->as_register(), dest->as_register_hi(), dest->as_register_lo(), G3_scratch); break;
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A default: ShouldNotReachHere();
0N/A case lir_shl: __ sllx (left->as_pointer_register(), count, dest->as_pointer_register()); break;
0N/A case lir_shr: __ srax (left->as_pointer_register(), count, dest->as_pointer_register()); break;
0N/A case lir_ushr: __ srlx (left->as_pointer_register(), count, dest->as_pointer_register()); break;
0N/A default: ShouldNotReachHere();
0N/A if (UseSlowPath ||
0N/A load(k_RInfo, objArrayKlass::element_klass_offset_in_bytes() + sizeof(oopDesc), k_RInfo, T_OBJECT, NULL);
644N/A __ check_klass_subtype_fast_path(klass_RInfo, k_RInfo, Rtmp1, O7, &done, stub->entry(), NULL);
0N/A int mdo_offset_bias = 0;
0N/A if (!Assembler::is_simm13(md->byte_offset_of_slot(data, DataLayout::header_offset()) + data->size_in_bytes())) {
727N/A Address flags_addr(mdo, md->byte_offset_of_slot(data, DataLayout::flags_offset()) - mdo_offset_bias);
644N/A bool need_slow_path = true;
644N/A if (k->super_check_offset() != sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes())
644N/A need_slow_path = false;
644N/A if (need_slow_path) {
644N/A bool need_slow_path = true;
644N/A if (k->super_check_offset() != sizeof(oopDesc) + Klass::secondary_super_cache_offset_in_bytes())
644N/A need_slow_path = false;
644N/A if (need_slow_path) {
0N/A if (UseFastLocking) {
0N/A assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
0N/A if (UseFastLocking) {
0N/A assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
0N/A int mdo_offset_bias = 0;
727N/A Address counter_addr(mdo, md->byte_offset_of_slot(data, CounterData::count_offset()) - mdo_offset_bias);
727N/A Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
727N/A Address receiver_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_offset(i)) -
727N/A Address data_addr(mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
727N/A __ st_ptr(tmp1, mdo, md->byte_offset_of_slot(data, VirtualCallData::receiver_count_offset(i)) -
0N/A if (VerifyStackAtCalls) {
0N/Avoid LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info) {
0N/A assert(addr->index()->is_illegal() && addr->scale() == LIR_Address::times_1 && Assembler::is_simm13(addr->disp()), "can't handle complex addresses yet");
0N/A case lir_cond_float_branch:
0N/A case lir_branch: {
0N/A if (LIRTracePeephole) {
0N/A case lir_static_call:
0N/A case lir_virtual_call:
0N/A case lir_icvirtual_call:
0N/A case lir_optvirtual_call: {
0N/A if (LIRTracePeephole) {