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0N/A
1879N/A#ifndef CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
1879N/A#define CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
1879N/A
0N/A public:
0N/A
0N/A enum {
0N/A nof_reg_args = 6, // registers o0-o5 are available for parameter passing
0N/A first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord,
0N/A frame_pad_in_bytes = 0
0N/A };
0N/A
0N/A static const int pd_c_runtime_reserved_arg_size;
0N/A
0N/A static LIR_Opr G0_opr;
0N/A static LIR_Opr G1_opr;
0N/A static LIR_Opr G2_opr;
0N/A static LIR_Opr G3_opr;
0N/A static LIR_Opr G4_opr;
0N/A static LIR_Opr G5_opr;
0N/A static LIR_Opr G6_opr;
0N/A static LIR_Opr G7_opr;
0N/A static LIR_Opr O0_opr;
0N/A static LIR_Opr O1_opr;
0N/A static LIR_Opr O2_opr;
0N/A static LIR_Opr O3_opr;
0N/A static LIR_Opr O4_opr;
0N/A static LIR_Opr O5_opr;
0N/A static LIR_Opr O6_opr;
0N/A static LIR_Opr O7_opr;
0N/A static LIR_Opr L0_opr;
0N/A static LIR_Opr L1_opr;
0N/A static LIR_Opr L2_opr;
0N/A static LIR_Opr L3_opr;
0N/A static LIR_Opr L4_opr;
0N/A static LIR_Opr L5_opr;
0N/A static LIR_Opr L6_opr;
0N/A static LIR_Opr L7_opr;
0N/A static LIR_Opr I0_opr;
0N/A static LIR_Opr I1_opr;
0N/A static LIR_Opr I2_opr;
0N/A static LIR_Opr I3_opr;
0N/A static LIR_Opr I4_opr;
0N/A static LIR_Opr I5_opr;
0N/A static LIR_Opr I6_opr;
0N/A static LIR_Opr I7_opr;
0N/A
0N/A static LIR_Opr SP_opr;
0N/A static LIR_Opr FP_opr;
0N/A
0N/A static LIR_Opr G0_oop_opr;
0N/A static LIR_Opr G1_oop_opr;
0N/A static LIR_Opr G2_oop_opr;
0N/A static LIR_Opr G3_oop_opr;
0N/A static LIR_Opr G4_oop_opr;
0N/A static LIR_Opr G5_oop_opr;
0N/A static LIR_Opr G6_oop_opr;
0N/A static LIR_Opr G7_oop_opr;
0N/A static LIR_Opr O0_oop_opr;
0N/A static LIR_Opr O1_oop_opr;
0N/A static LIR_Opr O2_oop_opr;
0N/A static LIR_Opr O3_oop_opr;
0N/A static LIR_Opr O4_oop_opr;
0N/A static LIR_Opr O5_oop_opr;
0N/A static LIR_Opr O6_oop_opr;
0N/A static LIR_Opr O7_oop_opr;
0N/A static LIR_Opr L0_oop_opr;
0N/A static LIR_Opr L1_oop_opr;
0N/A static LIR_Opr L2_oop_opr;
0N/A static LIR_Opr L3_oop_opr;
0N/A static LIR_Opr L4_oop_opr;
0N/A static LIR_Opr L5_oop_opr;
0N/A static LIR_Opr L6_oop_opr;
0N/A static LIR_Opr L7_oop_opr;
0N/A static LIR_Opr I0_oop_opr;
0N/A static LIR_Opr I1_oop_opr;
0N/A static LIR_Opr I2_oop_opr;
0N/A static LIR_Opr I3_oop_opr;
0N/A static LIR_Opr I4_oop_opr;
0N/A static LIR_Opr I5_oop_opr;
0N/A static LIR_Opr I6_oop_opr;
0N/A static LIR_Opr I7_oop_opr;
0N/A
0N/A static LIR_Opr in_long_opr;
0N/A static LIR_Opr out_long_opr;
1703N/A static LIR_Opr g1_long_single_opr;
0N/A
0N/A static LIR_Opr F0_opr;
0N/A static LIR_Opr F0_double_opr;
0N/A
0N/A static LIR_Opr Oexception_opr;
0N/A static LIR_Opr Oissuing_pc_opr;
0N/A
0N/A private:
0N/A static FloatRegister _fpu_regs [nof_fpu_regs];
0N/A
1703N/A static LIR_Opr as_long_single_opr(Register r) {
1703N/A return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
1703N/A }
1703N/A static LIR_Opr as_long_pair_opr(Register r) {
1703N/A return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
1703N/A }
1703N/A
0N/A public:
0N/A
0N/A#ifdef _LP64
0N/A static LIR_Opr as_long_opr(Register r) {
1703N/A return as_long_single_opr(r);
0N/A }
0N/A static LIR_Opr as_pointer_opr(Register r) {
1703N/A return as_long_single_opr(r);
0N/A }
0N/A#else
0N/A static LIR_Opr as_long_opr(Register r) {
1703N/A return as_long_pair_opr(r);
0N/A }
0N/A static LIR_Opr as_pointer_opr(Register r) {
0N/A return as_opr(r);
0N/A }
0N/A#endif
0N/A static LIR_Opr as_float_opr(FloatRegister r) {
0N/A return LIR_OprFact::single_fpu(r->encoding());
0N/A }
0N/A static LIR_Opr as_double_opr(FloatRegister r) {
0N/A return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding());
0N/A }
0N/A
0N/A static FloatRegister nr2floatreg (int rnr);
0N/A
0N/A static VMReg fpu_regname (int n);
0N/A
0N/A static bool is_caller_save_register (LIR_Opr reg);
0N/A static bool is_caller_save_register (Register r);
1879N/A
1909N/A static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
1909N/A static int last_cpu_reg() { return pd_last_cpu_reg; }
1909N/A
1879N/A#endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP