0N/A/*
2053N/A * Copyright (c) 1999, 2011, Oracle and/or its affiliates. All rights reserved.
0N/A * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
0N/A *
0N/A * This code is free software; you can redistribute it and/or modify it
0N/A * under the terms of the GNU General Public License version 2 only, as
0N/A * published by the Free Software Foundation.
0N/A *
0N/A * This code is distributed in the hope that it will be useful, but WITHOUT
0N/A * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
0N/A * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
0N/A * version 2 for more details (a copy is included in the LICENSE file that
0N/A * accompanied this code).
0N/A *
0N/A * You should have received a copy of the GNU General Public License version
0N/A * 2 along with this work; if not, write to the Free Software Foundation,
0N/A * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
0N/A *
1472N/A * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
1472N/A * or visit www.oracle.com if you need additional information or have any
1472N/A * questions.
0N/A *
0N/A */
0N/A
1879N/A#include "precompiled.hpp"
1879N/A#include "c1/c1_CodeStubs.hpp"
1879N/A#include "c1/c1_FrameMap.hpp"
1879N/A#include "c1/c1_LIRAssembler.hpp"
1879N/A#include "c1/c1_MacroAssembler.hpp"
1879N/A#include "c1/c1_Runtime1.hpp"
1879N/A#include "nativeInst_sparc.hpp"
1879N/A#include "runtime/sharedRuntime.hpp"
1879N/A#include "vmreg_sparc.inline.hpp"
1879N/A#ifndef SERIALGC
1879N/A#include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
1879N/A#endif
0N/A
0N/A#define __ ce->masm()->
0N/A
0N/ARangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
0N/A bool throw_index_out_of_bounds_exception)
0N/A : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
0N/A , _index(index)
0N/A{
1739N/A assert(info != NULL, "must have info");
0N/A _info = new CodeEmitInfo(info);
0N/A}
0N/A
0N/A
0N/Avoid RangeCheckStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A
0N/A if (_index->is_register()) {
0N/A __ mov(_index->as_register(), G4);
0N/A } else {
0N/A __ set(_index->as_jint(), G4);
0N/A }
0N/A if (_throw_index_out_of_bounds_exception) {
0N/A __ call(Runtime1::entry_for(Runtime1::throw_index_exception_id), relocInfo::runtime_call_type);
0N/A } else {
0N/A __ call(Runtime1::entry_for(Runtime1::throw_range_check_failed_id), relocInfo::runtime_call_type);
0N/A }
0N/A __ delayed()->nop();
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A#ifdef ASSERT
0N/A __ should_not_reach_here();
0N/A#endif
0N/A}
0N/A
0N/A
0N/Avoid CounterOverflowStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A __ set(_bci, G4);
0N/A __ call(Runtime1::entry_for(Runtime1::counter_overflow_id), relocInfo::runtime_call_type);
1703N/A __ delayed()->mov_or_nop(_method->as_register(), G5);
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A
0N/A __ br(Assembler::always, true, Assembler::pt, _continuation);
0N/A __ delayed()->nop();
0N/A}
0N/A
0N/A
0N/Avoid DivByZeroStub::emit_code(LIR_Assembler* ce) {
0N/A if (_offset != -1) {
0N/A ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
0N/A }
0N/A __ bind(_entry);
0N/A __ call(Runtime1::entry_for(Runtime1::throw_div0_exception_id), relocInfo::runtime_call_type);
0N/A __ delayed()->nop();
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A#ifdef ASSERT
0N/A __ should_not_reach_here();
0N/A#endif
0N/A}
0N/A
0N/A
0N/Avoid ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
0N/A ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
0N/A __ bind(_entry);
0N/A __ call(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id),
0N/A relocInfo::runtime_call_type);
0N/A __ delayed()->nop();
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A#ifdef ASSERT
0N/A __ should_not_reach_here();
0N/A#endif
0N/A}
0N/A
0N/A
0N/A// Implementation of SimpleExceptionStub
0N/A// Note: %g1 and %g3 are already in use
0N/Avoid SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A __ call(Runtime1::entry_for(_stub), relocInfo::runtime_call_type);
0N/A
0N/A if (_obj->is_valid()) {
0N/A __ delayed()->mov(_obj->as_register(), G4); // _obj contains the optional argument to the stub
0N/A } else {
0N/A __ delayed()->mov(G0, G4);
0N/A }
0N/A ce->add_call_info_here(_info);
0N/A#ifdef ASSERT
0N/A __ should_not_reach_here();
0N/A#endif
0N/A}
0N/A
0N/A
0N/A// Implementation of NewInstanceStub
0N/A
0N/ANewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
0N/A _result = result;
0N/A _klass = klass;
0N/A _klass_reg = klass_reg;
0N/A _info = new CodeEmitInfo(info);
0N/A assert(stub_id == Runtime1::new_instance_id ||
0N/A stub_id == Runtime1::fast_new_instance_id ||
0N/A stub_id == Runtime1::fast_new_instance_init_check_id,
0N/A "need new_instance id");
0N/A _stub_id = stub_id;
0N/A}
0N/A
0N/A
0N/Avoid NewInstanceStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A __ call(Runtime1::entry_for(_stub_id), relocInfo::runtime_call_type);
0N/A __ delayed()->mov_or_nop(_klass_reg->as_register(), G5);
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A __ br(Assembler::always, false, Assembler::pt, _continuation);
0N/A __ delayed()->mov_or_nop(O0, _result->as_register());
0N/A}
0N/A
0N/A
0N/A// Implementation of NewTypeArrayStub
0N/ANewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
0N/A _klass_reg = klass_reg;
0N/A _length = length;
0N/A _result = result;
0N/A _info = new CodeEmitInfo(info);
0N/A}
0N/A
0N/A
0N/Avoid NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A
0N/A __ mov(_length->as_register(), G4);
0N/A __ call(Runtime1::entry_for(Runtime1::new_type_array_id), relocInfo::runtime_call_type);
0N/A __ delayed()->mov_or_nop(_klass_reg->as_register(), G5);
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A __ br(Assembler::always, false, Assembler::pt, _continuation);
0N/A __ delayed()->mov_or_nop(O0, _result->as_register());
0N/A}
0N/A
0N/A
0N/A// Implementation of NewObjectArrayStub
0N/A
0N/ANewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
0N/A _klass_reg = klass_reg;
0N/A _length = length;
0N/A _result = result;
0N/A _info = new CodeEmitInfo(info);
0N/A}
0N/A
0N/A
0N/Avoid NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A
0N/A __ mov(_length->as_register(), G4);
0N/A __ call(Runtime1::entry_for(Runtime1::new_object_array_id), relocInfo::runtime_call_type);
0N/A __ delayed()->mov_or_nop(_klass_reg->as_register(), G5);
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A __ br(Assembler::always, false, Assembler::pt, _continuation);
0N/A __ delayed()->mov_or_nop(O0, _result->as_register());
0N/A}
0N/A
0N/A
0N/A// Implementation of MonitorAccessStubs
0N/AMonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
0N/A : MonitorAccessStub(obj_reg, lock_reg) {
0N/A _info = new CodeEmitInfo(info);
0N/A}
0N/A
0N/A
0N/Avoid MonitorEnterStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A __ mov(_obj_reg->as_register(), G4);
0N/A if (ce->compilation()->has_fpu_code()) {
0N/A __ call(Runtime1::entry_for(Runtime1::monitorenter_id), relocInfo::runtime_call_type);
0N/A } else {
0N/A __ call(Runtime1::entry_for(Runtime1::monitorenter_nofpu_id), relocInfo::runtime_call_type);
0N/A }
0N/A __ delayed()->mov_or_nop(_lock_reg->as_register(), G5);
0N/A ce->add_call_info_here(_info);
0N/A ce->verify_oop_map(_info);
0N/A __ br(Assembler::always, true, Assembler::pt, _continuation);
0N/A __ delayed()->nop();
0N/A}
0N/A
0N/A
0N/Avoid MonitorExitStub::emit_code(LIR_Assembler* ce) {
0N/A __ bind(_entry);
0N/A if (_compute_lock) {
0N/A ce->monitor_address(_monitor_ix, _lock_reg);
0N/A }
0N/A if (ce->compilation()->has_fpu_code()) {
0N/A __ call(Runtime1::entry_for(Runtime1::monitorexit_id), relocInfo::runtime_call_type);
0N/A } else {
0N/A __ call(Runtime1::entry_for(Runtime1::monitorexit_nofpu_id), relocInfo::runtime_call_type);
0N/A }
0N/A
0N/A __ delayed()->mov_or_nop(_lock_reg->as_register(), G4);
0N/A __ br(Assembler::always, true, Assembler::pt, _continuation);
0N/A __ delayed()->nop();
0N/A}
0N/A
0N/A// Implementation of patching:
0N/A// - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
0N/A// - Replace original code with a call to the stub
0N/A// At Runtime:
0N/A// - call to stub, jump to runtime
0N/A// - in runtime: preserve all registers (especially objects, i.e., source and destination object)
0N/A// - in runtime: after initializing class, restore original code, reexecute instruction
0N/A
0N/Aint PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
0N/A
0N/Avoid PatchingStub::align_patch_site(MacroAssembler* ) {
0N/A // patch sites on sparc are always properly aligned.
0N/A}
0N/A
0N/Avoid PatchingStub::emit_code(LIR_Assembler* ce) {
0N/A // copy original code here
0N/A assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF,
0N/A "not enough room for call");
0N/A assert((_bytes_to_copy & 0x3) == 0, "must copy a multiple of four bytes");
0N/A
0N/A Label call_patch;
0N/A
0N/A int being_initialized_entry = __ offset();
0N/A
0N/A if (_id == load_klass_id) {
0N/A // produce a copy of the load klass instruction for use by the being initialized case
727N/A#ifdef ASSERT
0N/A address start = __ pc();
727N/A#endif
727N/A AddressLiteral addrlit(NULL, oop_Relocation::spec(_oop_index));
727N/A __ patchable_set(addrlit, _obj);
0N/A
0N/A#ifdef ASSERT
0N/A for (int i = 0; i < _bytes_to_copy; i++) {
0N/A address ptr = (address)(_pc_start + i);
0N/A int a_byte = (*ptr) & 0xFF;
0N/A assert(a_byte == *start++, "should be the same code");
0N/A }
0N/A#endif
0N/A } else {
0N/A // make a copy the code which is going to be patched.
0N/A for (int i = 0; i < _bytes_to_copy; i++) {
0N/A address ptr = (address)(_pc_start + i);
0N/A int a_byte = (*ptr) & 0xFF;
0N/A __ a_byte (a_byte);
0N/A }
0N/A }
0N/A
0N/A address end_of_patch = __ pc();
0N/A int bytes_to_skip = 0;
0N/A if (_id == load_klass_id) {
0N/A int offset = __ offset();
0N/A if (CommentedAssembly) {
0N/A __ block_comment(" being_initialized check");
0N/A }
0N/A
0N/A // static field accesses have special semantics while the class
0N/A // initializer is being run so we emit a test which can be used to
0N/A // check that this code is being executed by the initializing
0N/A // thread.
0N/A assert(_obj != noreg, "must be a valid register");
0N/A assert(_oop_index >= 0, "must have oop index");
2227N/A __ load_heap_oop(_obj, java_lang_Class::klass_offset_in_bytes(), G3);
3042N/A __ ld_ptr(G3, in_bytes(instanceKlass::init_thread_offset()), G3);
2664N/A __ cmp_and_brx_short(G2_thread, G3, Assembler::notEqual, Assembler::pn, call_patch);
0N/A
0N/A // load_klass patches may execute the patched code before it's
0N/A // copied back into place so we need to jump back into the main
0N/A // code of the nmethod to continue execution.
0N/A __ br(Assembler::always, false, Assembler::pt, _patch_site_continuation);
0N/A __ delayed()->nop();
0N/A
0N/A // make sure this extra code gets skipped
0N/A bytes_to_skip += __ offset() - offset;
0N/A }
0N/A
0N/A // Now emit the patch record telling the runtime how to find the
0N/A // pieces of the patch. We only need 3 bytes but it has to be
0N/A // aligned as an instruction so emit 4 bytes.
0N/A int sizeof_patch_record = 4;
0N/A bytes_to_skip += sizeof_patch_record;
0N/A
0N/A // emit the offsets needed to find the code to patch
0N/A int being_initialized_entry_offset = __ offset() - being_initialized_entry + sizeof_patch_record;
0N/A
0N/A // Emit the patch record. We need to emit a full word, so emit an extra empty byte
0N/A __ a_byte(0);
0N/A __ a_byte(being_initialized_entry_offset);
0N/A __ a_byte(bytes_to_skip);
0N/A __ a_byte(_bytes_to_copy);
0N/A address patch_info_pc = __ pc();
0N/A assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
0N/A
0N/A address entry = __ pc();
0N/A NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
0N/A address target = NULL;
0N/A switch (_id) {
0N/A case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
0N/A case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); break;
0N/A default: ShouldNotReachHere();
0N/A }
0N/A __ bind(call_patch);
0N/A
0N/A if (CommentedAssembly) {
0N/A __ block_comment("patch entry point");
0N/A }
0N/A __ call(target, relocInfo::runtime_call_type);
0N/A __ delayed()->nop();
0N/A assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
0N/A ce->add_call_info_here(_info);
0N/A __ br(Assembler::always, false, Assembler::pt, _patch_site_entry);
0N/A __ delayed()->nop();
0N/A if (_id == load_klass_id) {
0N/A CodeSection* cs = __ code_section();
0N/A address pc = (address)_pc_start;
0N/A RelocIterator iter(cs, pc, pc + 1);
0N/A relocInfo::change_reloc_info_for_address(&iter, (address) pc, relocInfo::oop_type, relocInfo::none);
0N/A
0N/A pc = (address)(_pc_start + NativeMovConstReg::add_offset);
0N/A RelocIterator iter2(cs, pc, pc+1);
0N/A relocInfo::change_reloc_info_for_address(&iter2, (address) pc, relocInfo::oop_type, relocInfo::none);
0N/A }
0N/A
0N/A}
0N/A
1295N/A
1295N/Avoid DeoptimizeStub::emit_code(LIR_Assembler* ce) {
1295N/A __ bind(_entry);
2886N/A __ call(Runtime1::entry_for(Runtime1::deoptimize_id), relocInfo::runtime_call_type);
1295N/A __ delayed()->nop();
1295N/A ce->add_call_info_here(_info);
2886N/A DEBUG_ONLY(__ should_not_reach_here());
1295N/A}
1295N/A
1295N/A
0N/Avoid ArrayCopyStub::emit_code(LIR_Assembler* ce) {
0N/A //---------------slow case: call to native-----------------
0N/A __ bind(_entry);
0N/A __ mov(src()->as_register(), O0);
0N/A __ mov(src_pos()->as_register(), O1);
0N/A __ mov(dst()->as_register(), O2);
0N/A __ mov(dst_pos()->as_register(), O3);
0N/A __ mov(length()->as_register(), O4);
0N/A
0N/A ce->emit_static_call_stub();
0N/A
0N/A __ call(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
0N/A __ delayed()->nop();
0N/A ce->add_call_info_here(info());
0N/A ce->verify_oop_map(info());
0N/A
0N/A#ifndef PRODUCT
0N/A __ set((intptr_t)&Runtime1::_arraycopy_slowcase_cnt, O0);
0N/A __ ld(O0, 0, O1);
0N/A __ inc(O1);
0N/A __ st(O1, 0, O0);
0N/A#endif
0N/A
0N/A __ br(Assembler::always, false, Assembler::pt, _continuation);
0N/A __ delayed()->nop();
0N/A}
0N/A
0N/A
342N/A///////////////////////////////////////////////////////////////////////////////////
342N/A#ifndef SERIALGC
342N/A
342N/Avoid G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
2346N/A // At this point we know that marking is in progress.
2346N/A // If do_load() is true then we have to emit the
2346N/A // load of the previous value; otherwise it has already
2346N/A // been loaded into _pre_val.
2346N/A
342N/A __ bind(_entry);
342N/A
342N/A assert(pre_val()->is_register(), "Precondition.");
342N/A Register pre_val_reg = pre_val()->as_register();
342N/A
2346N/A if (do_load()) {
2346N/A ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/);
2346N/A }
2346N/A
1768N/A if (__ is_in_wdisp16_range(_continuation)) {
2722N/A __ br_null(pre_val_reg, /*annul*/false, Assembler::pt, _continuation);
1768N/A } else {
1768N/A __ cmp(pre_val_reg, G0);
1768N/A __ brx(Assembler::equal, false, Assembler::pn, _continuation);
1768N/A }
342N/A __ delayed()->nop();
342N/A
342N/A __ call(Runtime1::entry_for(Runtime1::Runtime1::g1_pre_barrier_slow_id));
342N/A __ delayed()->mov(pre_val_reg, G4);
342N/A __ br(Assembler::always, false, Assembler::pt, _continuation);
342N/A __ delayed()->nop();
342N/A
342N/A}
342N/A
342N/Ajbyte* G1PostBarrierStub::_byte_map_base = NULL;
342N/A
342N/Ajbyte* G1PostBarrierStub::byte_map_base_slow() {
342N/A BarrierSet* bs = Universe::heap()->barrier_set();
342N/A assert(bs->is_a(BarrierSet::G1SATBCTLogging),
342N/A "Must be if we're using this.");
342N/A return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
342N/A}
342N/A
342N/Avoid G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
342N/A __ bind(_entry);
342N/A
342N/A assert(addr()->is_register(), "Precondition.");
342N/A assert(new_val()->is_register(), "Precondition.");
342N/A Register addr_reg = addr()->as_pointer_register();
342N/A Register new_val_reg = new_val()->as_register();
2722N/A
1768N/A if (__ is_in_wdisp16_range(_continuation)) {
2722N/A __ br_null(new_val_reg, /*annul*/false, Assembler::pt, _continuation);
1768N/A } else {
1768N/A __ cmp(new_val_reg, G0);
1768N/A __ brx(Assembler::equal, false, Assembler::pn, _continuation);
1768N/A }
342N/A __ delayed()->nop();
342N/A
342N/A __ call(Runtime1::entry_for(Runtime1::Runtime1::g1_post_barrier_slow_id));
342N/A __ delayed()->mov(addr_reg, G4);
342N/A __ br(Assembler::always, false, Assembler::pt, _continuation);
342N/A __ delayed()->nop();
342N/A}
342N/A
342N/A#endif // SERIALGC
342N/A///////////////////////////////////////////////////////////////////////////////////
342N/A
0N/A#undef __