Temp related Rev Changes - last Update 2012-06-04:

Athlon64/Opteron (00h, 01h, 02h, 03h):

- C: - MSR C001_0043h (ThermTrip_STATUS Register) deleted.

- D: + F3xE4h: Tcasemax (bits 28-25) and DiodeOffsetSignBit (bit 24) added.

0Fh:

- F: % F3xE4h: ThermtpSense (bit 3) renamed ThermtpSense0

+ F3xE4h: TjOffset (bits 28-24), CurTmp (bits 23-16),

ThermSenseSel (bit 6), ThermtpSense1 (bit 4) and ThermSenseCoreSel

(bit2) added.

+ CPUID Fn[8000_0001]_EBX BrandId (bits 15-12) added.

- G: + F3xE4h, CurTmp (bits 15-14) added.

10h:

+ new HTC limts

- C: % F3x64[StcHystLmt] - encoding 1.0 * StcHystLmt (0..15C), previously

0.5 * StcHystLmt (0..7.5C)

- D: % F3xA4[CurTmp].

- D1: % wrt. MultiNodeCPUs - affects F3x64, F3x68, F3xA4[CurTmp]

11h:

- STC (F3x68) n/a

14h:

-

15h:

-