mach_vm_dep.c revision beb1bda06ff6d616abec61793bf882d58a50ec04
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
/* All Rights Reserved */
/*
* Portions of this source code were derived from Berkeley 4.3 BSD
* under license from the Regents of the University of California.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* UNIX machine dependent virtual memory support.
*/
#include <sys/cpu_module.h>
#include <sys/elf_SPARC.h>
#include <sys/archsystm.h>
#include <vm/hat_sfmmu.h>
#include <sys/mem_cage.h>
#include <sys/machsystm.h>
#include <vm/seg_kmem.h>
uint_t page_colors = 0;
uint_t page_colors_mask = 0;
int consistent_coloring;
/*
* A bitmask of the page sizes supported by hardware based upon szc.
* The base pagesize (p_szc == 0) must always be supported by the hardware.
*/
extern uint_t vac_colors_mask;
extern int vac_shift;
hw_pagesize_t hw_page_array[] = {
{0, 0, 0}
};
/*
* Enable usage of 64k/4M pages for text and 64k pages for initdata for
* all sun4v platforms. These variables can be overwritten by the platmod
*/
int use_text_pgsz64k = 1;
int use_text_pgsz4m = 1;
int use_initdata_pgsz64k = 1;
/*
* disable_text_largepages and disable_initdata_largepages bitmaks reflect
* both unconfigured and undesirable page sizes. Current implementation
* supports 64K and 4M page sizes for text and only 64K for data. Rest of
* the page sizes are not currently supported, hence disabled below. In
* future, when support is added for any other page size, it should be
* reflected below.
*
* Note that these bitmask can be set in platform or CPU specific code to
* disable page sizes that should not be used. These variables normally
*
* These bitmasks are also updated within hat_init to reflect unsupported
* page sizes on a sun4v processor per mmu_exported_pagesize_mask global
* variable.
*/
int disable_text_largepages =
(1 << TTE16G);
/*
* Minimum segment size tunables before 64K or 4M large pages
* should be used to map it.
*/
/*
* map_addr_proc() is the routine called when the system is to
* choose an address for the user. We will pick an address
* range which is just below the current stack limit. The
* algorithm used for cache consistency on machines with virtual
* address caches is such that offset 0 in the vnode is always
* on a shm_alignment'ed aligned address. Unfortunately, this
* means that vnodes which are demand paged will not be mapped
* cache consistently with the executable images. When the
* cache alignment for a given object is inconsistent, the
* lower level code must manage the translations so that this
* is not seen here (at the cost of efficiency, of course).
*
* On input it is a hint from the user to be used in a completely
* machine dependent fashion. For MAP_ALIGN, addrp contains the
* minimal alignment.
*
* On output it is NULL if no address can be found in the current
* processes address space or else an address that is currently
* not mapped for len bytes with a page of red zone on either side.
* If vacalign is true, then the selected address will obey the alignment
* constraints of a vac machine based on the given off value.
*/
/*ARGSUSED3*/
void
{
int allow_largepage_alignment = 1;
/*
* This happens when a program wants to map something in
* a range that's accessible to a program in a smaller
* address space. For example, a 64-bit program might
* be calling mmap32(2) to guarantee that the returned
* address is below 4Gbytes.
*/
} else {
& PAGEMASK);
}
/*
* Redzone for each side of the request. This is done to leave
* one page unmapped between segments. This is not required, but
* it's useful for the user because if their program strays across
* a segment boundary, it will catch a fault immediately making
* debugging a little easier.
*/
/*
* If the request is larger than the size of a particular
* mmu level, then we use that level to map the request.
* But this requires that both the virtual and the physical
* addresses be aligned with respect to that level, so we
* do the virtual bit of nastiness here.
*
* For 32-bit processes, only those which have specified
* MAP_ALIGN or an addr will be aligned on a page size > 4MB. Otherwise
* we can potentially waste up to 256MB of the 4G process address
* space just for alignment.
*
* XXXQ Should iterate trough hw_page_array here to catch
* all supported pagesizes
*/
}
if ((mmu_page_sizes == max_mmu_page_sizes) &&
} else if ((mmu_page_sizes == max_mmu_page_sizes) &&
} else {
/*
* Align virtual addresses on a 64K boundary to ensure
* that ELF shared libraries are mapped with the appropriate
* alignment constraints by the run-time linker.
*/
}
/*
* 64-bit processes require 1024K alignment of ELF shared libraries.
*/
if (p->p_model == DATAMODEL_LP64)
#ifdef VAC
#endif
}
len += align_amount;
/*
* Look for a large enough hole starting below the stack limit.
* After finding it, use the upper part. Addition of PAGESIZE is
* for the redzone as described above.
*/
/*
* Round address DOWN to the alignment amount,
* add the offset, and if this address is less
* than the original address, add alignment amount.
*/
addr += align_amount;
}
} else {
}
}
/* Auto large page tunables. */
int auto_lpg_tlb_threshold = 32;
int auto_lpg_minszc = TTE64K;
int auto_lpg_maxszc = TTE256M;
/*
* Number of pages in 1 GB. Don't enable automatic large pages if we have
* fewer than this many pages.
*/
{
uint_t n;
if (remap)
switch (maptype) {
case MAPPGSZ_ISM:
break;
case MAPPGSZ_VA:
if ((pgsz <= MMU_PAGESIZE) ||
break;
case MAPPGSZ_STK:
break;
case MAPPGSZ_HEAP:
break;
}
return (pgsz);
}
/*
* Platform-dependent page scrub call.
* We call hypervisor to scrub the page.
*/
void
{
}
void
{
/* Call memory sync function */
}
{
extern int mmu_exported_pagesize_mask;
if (lpsize == 0) {
} else {
}
return (lpsize);
}
continue;
return (lpsize);
}
return (lpsize);
}
void
{
}
/*ARGSUSED*/
void
{
}
#define QUANTUM_SIZE 64
static vmem_t *contig_mem_slab_arena;
static vmem_t *contig_mem_arena;
static void *
{
int pgflags;
int i = 0;
return (NULL);
}
/* If we ever don't want slab-sized pages, this will panic */
return (NULL);
}
if ((vmflag & VM_NOSLEEP) == 0)
if (vmflag & VM_PUSHPAGE)
pgflags |= PG_PUSHPAGE;
return (NULL);
}
}
/*
* Load the locked entry. It's OK to preload the entry into
* the TSB since we now support large mappings in the kernel TSB.
*/
for (--i; i >= 0; --i) {
page_unlock(ppa[i]);
}
return (addr);
}
void
{
panic("contig_mem_span_free: page not found");
if (--pgs_left == 0) {
/*
* similar logic to segspt_free_pages, but we know we
* have one large page.
*/
}
}
}
static void *
{
}
/*
* conting_mem_alloc_align allocates real contiguous memory with the specified
* alignment upto contig_mem_slab_size. The alignment must be a power of 2.
*/
void *
{
return (NULL);
}
/*
* Allocates size aligned contiguous memory upto contig_mem_slab_size.
* Size must be a power of 2.
*/
void *
{
}
void
{
}
/*
* We create a set of stacked vmem arenas to enable us to
* allocate large >PAGESIZE chucks of contiguous Real Address space
* This is what the Dynamics TSB support does for TSBs.
* The contig_mem_arena import functions are exactly the same as the
* TSB kmem_default arena import functions.
*/
void
contig_mem_init(void)
{
}