mach_sfmmu_asm.s revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* SFMMU primitives. These primitives should only be used by sfmmu
* routines.
*/
#if defined(lint)
#else /* lint */
#include "assym.h"
#endif /* lint */
#include <sys/asm_linkage.h>
#include <sys/machtrap.h>
#include <vm/hat_sfmmu.h>
#include <sys/machparam.h>
#include <sys/privregs.h>
#include <sys/machthread.h>
#include <sys/trapstat.h>
/*
* sfmmu related subroutines
*/
#if defined (lint)
/* ARGSUSED */
void
{}
/* ARGSUSED */
void
{}
int
{ return(0); }
int
{ return(0); }
/* ARGSUSED */
void
sfmmu_setctx_sec(int ctx)
{}
/* ARGSUSED */
void
{
}
#else /* lint */
/*
* 1. If stealing ctx, flush all TLB entries whose ctx is ctx-being-stolen.
* 2. If processor is running in the ctx-being-stolen, set the
* context to the resv context. That is
* If processor in Kernel-mode - pri-ctx is 0, sec-ctx is ctx-being-stolen,
* just change sec-ctx register to resv ctx. When it returns to
* kernel-mode, user_rtt will change pri-ctx.
*
* Note: For multiple page size TLB, no need to set page sizes for
* DEMAP context.
*
* %g1 = ctx being stolen (victim)
* %g2 = invalid ctx to replace victim with
*/
/*
* Flush TLBs.
*/
/* flush context from the tlb via HV call */
/* fall through to the code below */
/*
* We enter here if we're just raising a TSB miss
* exception, without switching MMU contexts. In
* this case, there is no need to flush the TLB.
*/
!
!
! return
! } else {
! } else {
! }
! }
!
/* next instruction is retry so no membar sync */
3:
/* TSB program must be cleared - walkers do not check a context. */
2:
/*
* Set the secondary context register for this process.
* %o0 = context number for this process.
*/
/*
* From resume we call sfmmu_setctx_sec with interrupts disabled.
* But we can also get called from C with interrupts enabled. So,
* we need to check first. Also, resume saves state in %o3 and %o5
* so we can't use those registers here.
*/
/* If interrupts are not disabled, then disable them */
1:
1: retl
/*
* set ktsb_phys to 1 if the processor supports ASI_QUAD_LDD_PHYS.
* returns the detection value in %o0.
*/
/*
* Called to load MMU registers and tsbmiss area
* for the active process. This function should
* only be called from TL=0.
*
* %o0 - hat pointer
*/
/*
* From resume we call sfmmu_load_mmustate with interrupts disabled.
* But we can also get called from C with interrupts enabled. So,
* we need to check first. Also, resume saves state in %o5 and we
* can't use this register here.
*/
/* If interrupts are not disabled, then disable them */
1:
/*
* We need to set up the TSB base register, tsbmiss
* area, and pass the TSB information into the hypervisor
*/
/* make 2nd UTSBREG */
2:
#ifdef DEBUG
/* check if hypervisor/hardware should handle user TSB */
#endif /* DEBUG */
4:
5:
3: retl
#endif /* lint */
#if defined(lint)
/* Prefetch "struct tsbe" while walking TSBs */
/*ARGSUSED*/
void
{}
/* Prefetch the tsbe that we are about to write */
/*ARGSUSED*/
void
{}
#else /* lint */
#endif /* lint */