ncs.h revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_NCS_H
#define _SYS_NCS_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
/* Forward typedefs */
/*
* Modulare Arithmetic Unit (MA) control register definition.
*/
union ma_ctl {
struct {
} bits;
};
/* Values for ma_ctl operation field */
#define MA_OP_LOAD 0x0
#define MA_OP_STORE 0x1
#define MA_OP_MULTIPLY 0x2
#define MA_OP_REDUCE 0x3
#define MA_OP_EXPONENTIATE 0x4
/* The MA memory is 1280 bytes (160 8 byte words) */
#define MA_SIZE 1280
/* Make driver MA buffer the next power of 2 */
#define MA_BUF_SIZE 2048
/* We can only load 64 8 byte words at a time */
#define MA_LOAD_MAX 64
#ifndef _ASM
union ma_mpa {
struct {
} bits;
};
union ma_ma {
struct {
} bits;
};
#endif /* _ASM */
/*
* NCS API definitions
*/
#ifndef _ASM
#endif /* _ASM */
/*
* NCS API definitions
*/
/*
* NCS Crtypo Function Numbers
*/
#define NCS_QCONF 0x1
#define NCS_QTAIL_UPDATE 0x2
/*
* The following are parameters to the NCS_QTAIL_UPDATE call:
*
* NCS_SYNC Perform MA operations synchronously,
* i.e. wait for each enqueued operation
* to complete before progressing to
* next one.
* NCS_ASYNC Perform MA operations asynchronously,
* i.e. kick off the next MA operation
* without waiting for its completion.
* XXX - not supported yet.
*/
#define NCS_SYNC 0
#define NCS_ASYNC 1
typedef struct ncs_qconf_arg {
typedef struct ncs_qtail_update_arg {
#ifndef _ASM
/*
* The interface to the MAU is via the following data structures. The
* structure consists of a copy of all relevant registers required to perform
* the requested operation.
*/
typedef struct ma_regs {
} ma_regs_t;
#define ND_TYPE_UNASSIGNED 0
#define ND_TYPE_MA 1
#define ND_TYPE_SPU 2
#define ND_STATE_FREE 0
#define ND_STATE_PENDING 1
#define ND_STATE_BUSY 2
#define ND_STATE_DONE 3
#define ND_STATE_ERROR 4
/*
* The ncs_hvdesc structure MUST MATCH corresponding one in HV.
* Structure padded to the next power of 2.
*/
typedef struct ncs_hvdesc {
} ncs_hvdesc_t;
#define NCS_HVDESC_SIZE_ACTUAL (sizeof (ncs_hvdesc_t))
#endif /* _ASM */
#ifdef __cplusplus
}
#endif
#endif /* _SYS_NCS_H */