n2cp.h revision 2ae0af4b4ee916466c298494ba6a1e4bf8c0ea86
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2006 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_N2CP_H
#define _SYS_N2CP_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
#define DRIVER "n2cp"
#define N2CP_MANUFACTURER_ID "SUNWn2cp"
#if defined(_KERNEL)
#define FALSE 0
#define TRUE 1
#define BITS2BYTES(b) ((b) >> 3)
#define BYTES2BITS(b) ((b) << 3)
/*
* NCP Structures.
*/
typedef struct n2cp_minor n2cp_minor_t;
typedef struct n2cp_listnode n2cp_listnode_t;
typedef struct n2cp_request n2cp_request_t;
typedef struct n2cp_stat n2cp_stat_t;
typedef struct n2cp_block_ctx n2cp_block_ctx_t;
typedef struct n2cp_hash_ctx n2cp_hash_ctx_t;
typedef struct n2cp_hmac_ctx n2cp_hmac_ctx_t;
#define N2CP_MAX_NCWQS 8
#define N2CP_MAX_CPUS_PER_CWQ 8
/*
* HW limitaions for Data and Key. For an input greater than 64KB, Driver will
* break up the input into 64KB blocks, and send the jobs to the hardware.
*/
#define CW_TYPE_INITIAL 1
#define CW_TYPE_EXTENSION 2
#define CW_TYPE_FINAL 3
#define CW_TYPE_COMPLETE 4
/*
* Defines for fields in Initial Control Word.
*/
#define CW_OP_SSL 16
#define CW_OP_COPY 32
#define CW_OP_ENCRYPT 64
#define CW_OP_MAC_AUTH 65
#define CW_AUTH_MD5 1
#define CW_AUTH_SHA1 2
#define CW_AUTH_SHA256 3
#define CW_AUTH_CRC32 4
#define CW_AUTH_HMAC_MD5 5
#define CW_AUTH_HMAC_SHA1 6
#define CW_AUTH_HMAC_SHA256 7
#define CW_AUTH_TCPCKSUM 8
#define CW_AUTH_SSL_HMAC_MD5 9
#define CW_AUTH_SSL_HMAC_SHA1 10
#define CW_AUTH_SSL_HMAC_SHA256 11
#define CW_ENC_ALGO_RC4WSTRM 0
#define CW_ENC_ALGO_RC4WOSTRM 1
#define CW_ENC_ALGO_DES 2
#define CW_ENC_ALGO_3DES 3
#define CW_ENC_ALGO_AES128 4
#define CW_ENC_ALGO_AES192 5
#define CW_ENC_ALGO_AES256 6
#define CW_ENC_CHAIN_ECB 0
#define CW_ENC_CHAIN_CBC 1
#define CW_ENC_CHAIN_CFB 2
#define CW_ENC_CHAIN_AESCTR 3
/* CWS_ALIGNMENT is used as an alignment parameter to contig_mem_alloc */
#define CWQ_ALIGNMENT 64
#define CWQ_QINDEX_TO_QOFFSET(i) ((i) * sizeof (cwq_cw_t))
#define CWQ_QOFFSET_TO_QINDEX(o) ((o) / sizeof (cwq_cw_t))
#define CWQ_QINDEX_IS_VALID(i) (((i) >= 0) && ((i) < CWQ_NENTRIES))
#define N2CP_QTIMEOUT_SECONDS 15
typedef struct cwq_cwb {
} cwq_cwb_t;
typedef struct cwq_cwjob {
int cj_id;
void *cj_ctx; /* ptr to n2cp_request */
} cwq_cwjob_t;
typedef struct {
int cq_inum;
int cq_id;
int cq_init;
int cq_busy_wait;
void *cq_mem;
int cq_memsize;
int cq_joblistcnt;
struct {
} cq_ks;
} cwq_t;
#define CWQ_STATE_ERROR (-1)
#define CWQ_STATE_OFFLINE 0
#define CWQ_STATE_ONLINE 1
typedef struct {
int mm_cwqid;
int mm_cpulistsz;
int *mm_cpulist;
int mm_ncpus;
int mm_nextcpuidx;
/*
* Only protects mm_nextcpuidx field.
*/
/*
* xxx - maybe need RW lock for mm_state?
*/
int mm_state; /* CWQ_STATE_... */
} cwq_entry_t;
typedef struct {
int mc_cpuid;
int mc_cwqid;
/*
* xxx - maybe need RW lock for mm_state?
* Mirrors mm_state in mau_entry_t. Duplicated
* for speed so we don't have search mau_entry
* table. Field rarely updated.
*/
int mc_state; /* CWQ_STATE_... */
} cpu_entry_t;
typedef struct {
/*
* CWQ stuff
*/
int m_cwqlistsz;
int m_ncwqs;
int m_nextcwqidx;
/*
* Only protects m_nextcwqidx field.
*/
/*
* CPU stuff
*/
int m_cpulistsz;
int m_ncpus;
#define MAX_FIXED_IV_WORDS 8
typedef struct fixed_iv {
int ivsize;
} fixed_iv_t;
#define MAX_DATA_LEN 0x10000
#define DES_KEY_LEN 8
#define DES3_KEY_LEN 24
#define DESBLOCK 8
#define AES_MIN_KEY_LEN 16
#define AES_MAX_KEY_LEN 32
#define AESBLOCK 16
#define MAXVALUE AES_MAX_KEY_LEN
#define RC4_MIN_KEY_LEN 1
#define RC4_MAX_KEY_LEN 256
/*
* We only support up to 64 counter bit
*/
#define MAX_CTR_BITS 64
#define HMAC_MIN_KEY_LEN 1
#define HMAC_MAX_KEY_LEN CW_MAX_KEY_LEN
/*
* Some pkcs#11 defines as there are no pkcs#11 header files included.
*/
#define CKA_VALUE 0x00000011
#define CKA_KEY_TYPE 0x00000100
/*
* Request flags (n2cp_request_t.nr_flags).
*/
#define N2CP_SCATTER 0x01
#define N2CP_GATHER 0x02
#define SUN_CKM_SSL3_MD5_MAC "CKM_SSL3_MD5_MAC"
#define SUN_CKM_SSL3_SHA1_MAC "CKM_SSL3_SHA1_MAC"
#ifdef SSL3_SHA256_MAC_SUPPORT
#define SUN_CKM_SSL3_SHA256_MAC "CKM_SSL3_SHA256_MAC"
#endif
/*
* XXX: Vendor defined version of CKM_AES_CTR. This lets us test AES_CTR
* from PKCS#11. Note: this is temporally added until CKM_AES_CTR is officially
* added to PKCS#11 spec.
*/
#define N2CP_CKM_AES_CTR "0x80001086"
/*
*/
/*
* Kstats.
*/
#define DS_DES 0
#define DS_DES3 1
#define DS_AES 2
#define DS_MD5 3
#define DS_SHA1 4
#define DS_SHA256 5
#define DS_MD5_HMAC 6
#define DS_SHA1_HMAC 7
#define DS_SHA256_HMAC 8
#define DS_SSL_MD5_MAC 9
#define DS_SSL_SHA1_MAC 10
#define DS_SSL_SHA256_MAC 11
#define DS_RC4 12
#define DS_MAX 13
struct n2cp_stat {
struct {
} ns_cwq[N2CP_MAX_NCWQS];
};
/*
* Linked-list linkage.
*/
struct n2cp_listnode {
};
typedef enum n2cp_mech_type {
DES_CBC_MECH_INFO_TYPE, /* CKM_DES_CBC */
DES_ECB_MECH_INFO_TYPE, /* CKM_DES_ECB */
DES_CFB_MECH_INFO_TYPE, /* CKM_DES_CFB */
DES3_CBC_MECH_INFO_TYPE, /* CKM_DES3_CBC */
DES3_ECB_MECH_INFO_TYPE, /* CKM_DES3_ECB */
DES3_CFB_MECH_INFO_TYPE, /* CKM_DES3_CFB */
AES_CBC_MECH_INFO_TYPE, /* CKM_AES_CBC */
AES_ECB_MECH_INFO_TYPE, /* CKM_AES_ECB */
AES_CTR_MECH_INFO_TYPE, /* CKM_AES_CTR */
RC4_WSTRM_MECH_INFO_TYPE, /* CKM_RC4 */
RC4_WOSTRM_MECH_INFO_TYPE, /* CKM_RC4 w/o stream */
MD5_MECH_INFO_TYPE, /* CKM_MD5 */
SHA1_MECH_INFO_TYPE, /* CKM_SHA_1 */
SHA256_MECH_INFO_TYPE, /* CKM_SHA256 */
MD5_HMAC_MECH_INFO_TYPE, /* CKM_MD5_HMAC */
SHA1_HMAC_MECH_INFO_TYPE, /* CKM_SHA_1_HMAC */
SHA256_HMAC_MECH_INFO_TYPE, /* CKM_SHA256_HMAC */
MD5_HMAC_GENERAL_MECH_INFO_TYPE, /* CKM_MD5_HMAC_GENERAL */
SHA1_HMAC_GENERAL_MECH_INFO_TYPE, /* CKM_SHA_1_HMAC_GENERAL */
SHA256_HMAC_GENERAL_MECH_INFO_TYPE, /* CKM_SHA256_HMAC_GENERAL */
SSL3_MD5_MAC_MECH_INFO_TYPE, /* CKM_SSL3_MD5_MAC */
SSL3_SHA1_MAC_MECH_INFO_TYPE, /* CKM_SSL3_SHA1_MAC */
SSL3_SHA256_MAC_MECH_INFO_TYPE, /* CKM_SSL3_SHA256_MAC */
/* Vendor Defined Mechanism */
N2CP_AES_CTR_MECH_INFO_TYPE /* CKM_AES_CTR */
/*
* Operation Flags: These flags are used internally within driver to specify
* the kind of operation for a job.
*/
#define N2CP_CMD_MASK 0x0000ffff
#define N2CP_OP_ENCRYPT 0x00010000
#define N2CP_OP_DECRYPT 0x00020000
#define N2CP_OP_SIGN 0x00040000
#define N2CP_OP_VERIFY 0x00080000
#define N2CP_OP_DIGEST 0x00100000
#define N2CP_OP_SINGLE 0x00200000
#define N2CP_OP_MULTI 0x00400000
/*
* Mechanism Specific Contexts
*/
typedef struct {
uchar_t i, j;
} rc4_key_t;
struct n2cp_block_ctx {
union {
} keystruct;
int keylen;
int ivlen;
int nextivlen;
int ctrbits; /* used for AES_CTR */
int residlen;
int lastblocklen;
};
struct n2cp_hash_ctx {
};
struct n2cp_hmac_ctx {
int keylen;
};
/*
* Work structure.
* Contains everything we need to submit the job, and everything we
* need to notify caller and release resources.
*/
typedef union {
} nr_ctx_t;
struct n2cp_request {
int nr_errno;
/*
* Consumer's I/O buffers.
*/
/*
* CWB
*/
int nr_cwcnt;
int nr_context_sz;
int nr_blocksz;
/*
* Callback.
*/
void (*nr_callback)(n2cp_request_t *);
/*
* Other stuff.
*/
int nr_resultlen;
/*
* Statistics.
*/
int nr_job_stat;
};
struct n2cp {
unsigned n_flags; /* dev state flags */
int n_intr_cid[N2CP_MAX_NCWQS];
int n_intr_cnt;
};
/* CK_AES_CTR_PARAMS provides the parameters to the CKM_AES_CTR mechanism */
typedef struct CK_AES_CTR_PARAMS {
typedef struct CK_AES_CTR_PARAMS32 {
/*
* Priority of task threads used for handling interrupts.
*/
#define N2CP_INTRTASK_PRI 80
#endif /* _KERNEL */
/*
* Miscellaneous defines.
*/
#define ROUNDDOWN(a, n) ((a) & ~((n) - 1))
#define BYTES_TO_UINT64(n) \
#define BYTES_TO_UINT32(n) \
#if defined(_KERNEL)
#if defined(DEBUG)
#define DWARN 0x00000001
#define DMA_ARGS 0x00000002
#define DMA_LDST 0x00000004
#define DNCS_QTAIL 0x00000008
#define DATTACH 0x00000010
#define DMD 0x00000020
#define DHV 0x00000040
#define DINTR 0x00000080
#define DCHATTY 0x00000400
#define DALL 0xFFFFFFFF
void n2cp_dprintf(n2cp_t *, int, const char *, ...);
void n2cp_dumphex(void *, int);
int n2cp_dflagset(int);
#define DBG0 n2cp_dprintf
#define DBG1 n2cp_dprintf
#define DBG2 n2cp_dprintf
#define DBG3 n2cp_dprintf
#define DBG4 n2cp_dprintf
#else /* !defined(DEBUG) */
#endif /* !defined(DEBUG) */
/*
* n2cp.c
*/
void n2cp_cwb_free(cwq_cwb_t *);
void *n2_contig_alloc(int);
void n2_contig_free(void *, int);
/*
*/
void n2cp_error(n2cp_t *, const char *, ...);
void n2cp_diperror(dev_info_t *, const char *, ...);
/*
*/
void n2cp_ksinit(n2cp_t *);
void n2cp_ksdeinit(n2cp_t *);
/*
*/
int n2cp_uninit(n2cp_t *);
void n2cp_rmqueue(n2cp_listnode_t *);
void n2cp_freereq(n2cp_request_t *);
void n2cp_destroyreq(n2cp_request_t *);
int n2cp_gather(crypto_data_t *, char *, int);
int n2cp_scatter(const char *, crypto_data_t *, int);
uint64_t, void **, unsigned int *);
char *n2cp_get_dataaddr(crypto_data_t *);
void n2cp_setresid(crypto_data_t *, int);
void n2cp_getbufbytes(crypto_data_t *, int, int, char *);
uint16_t n2cp_padhalf(int);
uint16_t n2cp_padfull(int);
/*
*/
/*
*/
crypto_key_t *, int);
void n2cp_clean_blockctx(n2cp_request_t *);
int *, int);
/*
*/
void n2cp_clean_hmacctx(n2cp_request_t *);
/*
*/
int n2cp_init_cwq2cpu_map(n2cp_t *);
void n2cp_deinit_cwq2cpu_map(n2cp_t *);
int n2cp_map_cwq_to_cpu(n2cp_t *, int);
int n2cp_map_cpu_to_cwq(n2cp_t *, int);
int n2cp_map_nextcwq(n2cp_t *);
#ifdef N2_ERRATUM_175
typedef struct noncache_info {
int n_workaround_enabled;
/*
* Stats to track how many (4M) slabs get allocated.
* Intended for debugging problems or performance analysis.
*/
/*
* The following are function pointers to switch between
* standard contig_mem_alloc/free and bcopy, and our special
* noncache_contig_mem_alloc/free and noncache_bcopy.
* Set up at driver attach time.
*/
void *(*n_contig_alloc)(size_t);
void (*n_contig_free)(void *, size_t);
extern noncache_info_t n2cp_nc;
#else /* N2_ERRATUM_175 */
#endif /* N2_ERRATUM_175 */
#endif /* _KERNEL */
#ifdef __cplusplus
}
#endif
#endif /* _SYS_N2CP_H */