hypervisor_api.h revision 110e73f9b5ccaa10e26a8f79807001a5da72604e
03831d35f7499c87d51205817c93e9a8d42c4baestevel * CDDL HEADER START
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6def3553daaea99d3558cb94db34178e1617bfe4kd * Common Development and Distribution License (the "License").
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03831d35f7499c87d51205817c93e9a8d42c4baestevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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03831d35f7499c87d51205817c93e9a8d42c4baestevel * CDDL HEADER END
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Use is subject to license terms.
03831d35f7499c87d51205817c93e9a8d42c4baestevel#pragma ident "%Z%%M% %I% %E% SMI"
03831d35f7499c87d51205817c93e9a8d42c4baestevel * sun4v Hypervisor API
6def3553daaea99d3558cb94db34178e1617bfe4kd * Reference: api.pdf Revision 0.12 dated May 12, 2004.
6def3553daaea99d3558cb94db34178e1617bfe4kd * io-api.txt version 1.11 dated 10/19/2004
6def3553daaea99d3558cb94db34178e1617bfe4kdextern "C" {
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Trap types
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Error returns in %o0.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * (Additional result is returned in %o1.)
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define H_EWOULDBLOCK 9 /* Cannot complete operation */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* without blocking */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define H_ENOTSUPPORTED 13 /* Function not supported */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* no translation exists */
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Mondo CPU ID argument processing.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Function numbers for FAST_TRAP.
03831d35f7499c87d51205817c93e9a8d42c4baestevel#endif /* SET_MMU_STATS */
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Bits for MMU functions flags argument:
03831d35f7499c87d51205817c93e9a8d42c4baestevel * arg3 of MMU_MAP_ADDR
03831d35f7499c87d51205817c93e9a8d42c4baestevel * arg3 of MMU_DEMAP_CTX
03831d35f7499c87d51205817c93e9a8d42c4baestevel * arg2 of MMU_DEMAP_ALL
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Interrupt state manipulation definitions.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * TSB description structure for MMU_TSB_CTX0 and MMU_TSB_CTXNON0.
03831d35f7499c87d51205817c93e9a8d42c4baesteveltypedef struct hv_tsb_info {
03831d35f7499c87d51205817c93e9a8d42c4baestevel uint16_t hvtsb_idxpgsz; /* page size used to index TSB */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#endif /* TTE4V_NPGSZ */
03831d35f7499c87d51205817c93e9a8d42c4baestevel * MMU statistics structure for MMU_STAT_AREA
03831d35f7499c87d51205817c93e9a8d42c4baestevel#endif /* SET_MMU_STATS */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#endif /* _ASM */
03831d35f7499c87d51205817c93e9a8d42c4baestevel * CPU States
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define CPU_STATE_GUEST 0x2 /* cpu running guest code */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define CPU_STATE_ERROR 0x3 /* cpu is in the error state */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define CPU_STATE_LAST_PUBLIC CPU_STATE_ERROR /* last valid state */
03831d35f7499c87d51205817c93e9a8d42c4baestevel * MMU fault status area
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define MMFSA_I_TYPE (MMFSA_I_ + MMFSA_TYPE_) /* instruction fault type */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define MMFSA_I_ADDR (MMFSA_I_ + MMFSA_ADDR_) /* instruction fault address */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define MMFSA_I_CTX (MMFSA_I_ + MMFSA_CTX_) /* instruction fault context */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define MMFSA_D_TYPE (MMFSA_D_ + MMFSA_TYPE_) /* data fault type */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define MMFSA_D_ADDR (MMFSA_D_ + MMFSA_ADDR_) /* data fault address */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define MMFSA_D_CTX (MMFSA_D_ + MMFSA_CTX_) /* data fault context */
03831d35f7499c87d51205817c93e9a8d42c4baestevel#define MMFSA_SIZE 0x80 /* in bytes, 64 byte aligned */
03831d35f7499c87d51205817c93e9a8d42c4baestevel * MMU fault status - MMFSA_IFS and MMFSA_DFS
03831d35f7499c87d51205817c93e9a8d42c4baestevel * DMA sync parameter definitions
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Performance counter register definitions.
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_mmu_map_perm_addr(void *, int, uint64_t, int);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_mmu_unmap_perm_addr(void *, int, int);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_mmu_set_stat_area(uint64_t, uint64_t);
03831d35f7499c87d51205817c93e9a8d42c4baestevel#endif /* SET_MMU_STATS */
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_cpu_qconf(int queue, uint64_t paddr, int size);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_cpu_state(uint64_t cpuid, uint64_t *cpu_state);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_mem_scrub(uint64_t real_addr, uint64_t length,
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_mem_sync(uint64_t real_addr, uint64_t length,
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_service_recv(uint64_t s_id, uint64_t buf_pa,
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_service_send(uint64_t s_id, uint64_t buf_pa,
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_service_getstatus(uint64_t s_id, uint64_t *vreg);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_service_setstatus(uint64_t s_id, uint64_t bits);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_service_clrstatus(uint64_t s_id, uint64_t bits);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_mach_desc(uint64_t buffer_ra, uint64_t *buffer_sizep);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_ttrace_buf_info(uint64_t *, uint64_t *);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_ttrace_buf_conf(uint64_t, uint64_t, uint64_t *);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_ttrace_enable(uint64_t, uint64_t *);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_ttrace_freeze(uint64_t, uint64_t *);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hv_dump_buf_update(uint64_t, uint64_t, uint64_t *);
03831d35f7499c87d51205817c93e9a8d42c4baestevelextern uint64_t hvio_intr_devino_to_sysino(uint64_t dev_hdl, uint32_t devino,
6def3553daaea99d3558cb94db34178e1617bfe4kdextern uint64_t hvio_intr_setstate(uint64_t sysino, int intr_state);
6def3553daaea99d3558cb94db34178e1617bfe4kdextern uint64_t hvio_intr_gettarget(uint64_t sysino, uint32_t *cpuid);
6def3553daaea99d3558cb94db34178e1617bfe4kdextern uint64_t hvio_intr_settarget(uint64_t sysino, uint32_t cpuid);
6def3553daaea99d3558cb94db34178e1617bfe4kd#endif /* _SYS_HYPERVISOR_API_H */