mach_startup.c revision 1e45ea5a7676dbeffaf69f37a1280c94eb19a422
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#include <sys/machsystm.h>
#include <sys/archsystm.h>
#include <sys/prom_plat.h>
#include <sys/hypervisor_api.h>
#include <sys/traptrace.h>
#ifdef TRAPTRACE
int mach_htraptrace_enable = 1;
#else
int mach_htraptrace_enable = 0;
#endif
int htrap_tr0_inuse = 0;
extern char htrap_tr0[]; /* prealloc buf for boot cpu */
extern void sfmmu_set_tsbs(void);
/*
*/
static int enable_halt_idle_cpus = 1;
void
setup_trap_table(void)
{
extern caddr_t mmu_fault_status_area;
mmfsa_va =
}
void
phys_install_has_changed(void)
{
}
/*
* Halt the present CPU until awoken via an interrupt
*/
static void
cpu_halt(void)
{
int hset_update = 1;
uint_t s;
/*
* If this CPU is online, and there's multiple CPUs
* in the system, then we should notate our halting
* by adding ourselves to the partition's halted CPU
* work becomes available.
*/
hset_update = 0;
/*
* Add ourselves to the partition's halted CPUs bitmask
* and set our HALTED flag, if necessary.
*
* When a thread becomes runnable, it is placed on the queue
* and then the halted cpuset is checked to determine who
* (if anyone) should be awoken. We therefore need to first
* add ourselves to the halted cpuset, and then check if there
* is any work available.
*/
if (hset_update) {
}
/*
* Check to make sure there's really nothing to do.
* Work destined for this CPU may become available after
* this check. We'll be notified through the clearing of our
* bit in the halted CPU bitmask, and a poke.
*/
if (disp_anywork()) {
if (hset_update) {
}
return;
}
/*
* We're on our way to being halted. Wait until something becomes
* runnable locally or we are awaken (i.e. removed from the halt set).
* Note that the call to hv_cpu_yield() can return even if we have
* nothing to do.
*
* Disable interrupts now, so that we'll awaken immediately
* after halting if someone tries to poke us between now and
* the time we actually halt.
*
* We check for the presence of our bit after disabling interrupts.
* If it's cleared, we'll return. If the bit is cleared after
* we check then the poke will pop us out of the halted state.
* Also, if the offlined CPU has been brought back on-line, then
* we return as well.
*
* The ordering of the poke and the clearing of the bit by cpu_wakeup
* is important.
* cpu_wakeup() must clear, then poke.
* cpu_halt() must disable interrupts, then check for the bit.
*
* The check for anything locally runnable is here for performance
* and isn't needed for correctness. disp_nrunnable ought to be
* in our cache still, so it's inexpensive to check, and if there
* is anything runnable we won't have to wait for the poke.
*
*/
s = disable_vec_intr();
while (*p == 0 &&
(void) hv_cpu_yield();
enable_vec_intr(s);
s = disable_vec_intr();
}
/*
* We're no longer halted
*/
enable_vec_intr(s);
if (hset_update) {
}
}
/*
* If "cpu" is halted, then wake it up clearing its halted bit in advance.
* Otherwise, see if other CPUs in the cpu partition are halted and need to
* be woken up so that they can steal the thread we placed on this CPU.
* This function is only used on MP systems.
*/
static void
{
int result;
/*
* Clear the halted bit for that CPU since it will be
* poked in a moment.
*/
/*
* We may find the current CPU present in the halted cpuset
* if we're in the context of an interrupt that occurred
* before we had a chance to clear our bit in cpu_halt().
* Poking ourself is obviously unnecessary, since if
* we're here, we're not halted.
*/
return;
} else {
/*
* This cpu isn't halted, but it's idle or undergoing a
* context switch. No need to awaken anyone else.
*/
return;
}
/*
* No need to wake up other CPUs if the thread we just enqueued
* is bound.
*/
if (bound)
return;
/*
* See if there's any other halted CPUs. If there are, then
* select one, and awaken it.
* It's possible that after we find a CPU, somebody else
* will awaken it before we get the chance.
* In that case, look again.
*/
do {
if (cpu_found == CPUSET_NOTINSET)
return;
} while (result < 0);
}
void
{
if (enable_halt_idle_cpus) {
}
}
int
{
if (mmu_fault_status_area == NULL)
return (-1);
return (0);
}
void
mach_memscrub(void)
{
/* no memscrub support for sun4v for now */
}
void
{
/* no fpras support for sun4v for now */
}
void
mach_hw_copy_limit(void)
{
/* HW copy limits set by individual CPU module */
}
/*
* We need to enable soft ring functionality on Niagara platform since
* one strand can't handle interrupts for a 1Gb NIC. Set the tunable
* ip_squeue_soft_ring by default on this platform. We can also set
* ip_threads_per_cpu to track number of threads per core. The variables
* themselves are defined in space.c and used by IP module
*/
extern uint_t ip_threads_per_cpu;
extern boolean_t ip_squeue_soft_ring;
void
startup_platform(void)
{
}
/*
* This function sets up hypervisor traptrace buffer
* This routine is called by the boot cpu only
*/
void
{
!htrap_tr0_inuse)) {
"traptrace buffer", cpuid);
} else {
}
}
}
/*
* This function enables or disables the hypervisor traptracing
*/
void
{
if (mach_htraptrace_enable) {
(!htrap_tr0_inuse))) {
"!cpu%d: previous HV traptrace buffer of "
"size 0x%lx at address 0x%lx", cpuid,
}
(sizeof (struct htrap_trace_record)), &size);
ret = hv_ttrace_enable(\
"!cpu%d: HV traptracing not "
"enabled, ta: 0x%x returned error: "
} else {
htrap_tr0_inuse = 1;
}
} else {
"!cpu%d: HV traptrace buffer not "
"configured, ta: 0x%x returned error: %ld",
}
/*
* set hvaddr_base to NULL when traptrace buffer
* registration fails
*/
}
}
} else {
&prev_enable);
htrap_tr0_inuse = 0;
} else
"!cpu%d: HV traptracing is not disabled, "
"ta: 0x%x returned error: %ld",
}
}
}
/*
* This function cleans up the hypervisor traptrace buffer
*/
void
{
if (mach_htraptrace_enable) {
if (httrace_buf_va == htrap_tr0) {
} else if (httrace_buf_va != NULL) {
}
}
}
/*
* Load any required machine class (sun4v) specific drivers.
*/
void
load_mach_drivers(void)
{
/*
* We don't want to load these LDOMs-specific
* modules if domaining is not supported. Also,
* we must be able to run on non-LDOMs firmware.
*/
if (!(domaining_capabilities & DOMAINING_SUPPORTED))
return;
/*
* Load the core domain services module
*/
/*
* Load the rest of the domain services
*/
if ((domaining_capabilities & DOMAINING_ENABLED) &&
/*
* Attempt to attach any virtual device servers. These
* drivers must be loaded at start of day so that they
* can respond to any updates to the machine description.
*
* Since it is quite likely that a domain will not support
* one or more of these servers, failures are ignored.
*/
/* virtual disk server */
(void) i_ddi_attach_hw_nodes("vds");
/* virtual network switch */
(void) i_ddi_attach_hw_nodes("vsw");
/* virtual console concentrator */
(void) i_ddi_attach_hw_nodes("vcc");
}