upa64s.h revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 1999-2002 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_UPA64S_VAR_H
#define _SYS_UPA64S_VAR_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
/*
* the following typedef is used to describe the state
* of a UPA port interrupt.
*/
/*
* INO related macros:
*/
/*
* Interrupt Mapping Registers
*/
#define IMR_MONDO 0x7ff
#define IMR_TID_BIT 26
/*
* The following structure defines the format of UPA64S addresses.
* This structure is used to hold UPA64S "reg" property entries.
*/
typedef struct upa64s_regspec {
/*
* The following structure defines the format of a "ranges"
* property entry for UPA64S bus node.
*/
typedef struct upa64s_ranges {
/*
* per-upa64s soft state structure:
*/
typedef struct upa64s_devstate {
/* as two element array */
int power_level; /* upa64s' power level */
int saved_power_level; /* power level during suspend */
/*
* UPA64S Register Offsets
*/
#define UPA64S_UPA0_CONFIG_OFFSET 0x00
#define UPA64S_UPA1_CONFIG_OFFSET 0x08
#define UPA64S_IF_CONFIG_OFFSET 0x10
#define UPA64S_ESTAR_OFFSET 0x18
/*
* UPA64S Interface Configurations
*/
#define UPA64S_NOT_POK_RST_L 0x0
#define UPA64S_POK_RST_L 0x2
#define UPA64S_POK_NOT_RST_L 0x3
/*
* UPA64S Energy Star Control Register
*/
#define UPA64S_FULL_SPEED 0x01
#define UPA64S_1_2_SPEED 0x02
#define UPA64S_1_64_SPEED 0x40
/*
* Power Management definitions
*/
#define UPA64S_PM_COMP 0 /* power management component */
#define UPA64S_PM_RESET 0 /* power off */
/*
* upa64s soft state macros:
*/
#define get_upa64s_soft_state(i) \
#define alloc_upa64s_soft_state(i) \
#define free_upa64s_soft_state(i) \
/*
* debugging definitions:
*/
#if defined(DEBUG)
#define D_ATTACH 0x00000001
#define D_DETACH 0x00000002
#define D_POWER 0x00000004
#define D_MAP 0x00000008
#define D_CTLOPS 0x00000010
#define D_G_ISPEC 0x00000020
#define D_A_ISPEC 0x00000040
#define D_R_ISPEC 0x00000080
#define D_INIT_CLD 0x00400000
#define D_RM_CLD 0x00800000
#define D_GET_REG 0x01000000
#define D_XLATE_REG 0x02000000
#define D_INTRDIST 0x04000000
#define D_CONT 0x80000000
#else
#endif
#ifdef __cplusplus
}
#endif
#endif /* _SYS_UPA64S_VAR_H */