pci_pbm.h revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_PCI_PBM_H
#define _SYS_PCI_PBM_H
#pragma ident "%Z%%M% %I% %E% SMI"
#include <sys/dditypes.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
* The following structure represents the pci configuration header
* for a psycho or schizo PBM.
*/
typedef struct config_header config_header_t;
struct config_header {
volatile uint16_t ch_vendor_id;
volatile uint16_t ch_device_id;
volatile uint16_t ch_command_reg;
volatile uint16_t ch_status_reg;
volatile uint8_t ch_revision_id_reg;
volatile uint8_t ch_programming_if_code_reg;
volatile uint8_t ch_sub_class_reg;
volatile uint8_t ch_base_class_reg;
volatile uint8_t ch_cache_line_size_reg;
volatile uint8_t ch_latency_timer_reg;
volatile uint8_t ch_header_type_reg;
};
/*
* Bit fields of ch_status_reg for cmn_err's %b
*/
#define PCI_STATUS_BITS "\020\
\11signaled-parity-error\
\14signaled-target-abort\
\15received-target-abort\
\16received-master-abort\
\17signaled-system-error\
\20detected-parity-error"
/*
* pbm block soft state structure:
*
* Each pci node has its own private pbm block structure.
*/
struct pbm {
/*
* PBM control and error registers:
*/
volatile uint64_t *pbm_ctrl_reg;
volatile uint64_t *pbm_async_flt_status_reg;
volatile uint64_t *pbm_async_flt_addr_reg;
volatile uint64_t *pbm_diag_reg;
volatile uint64_t *pbm_estar_reg;
volatile uint64_t *pbm_pcix_err_stat_reg;
volatile uint64_t *pbm_pci_ped_ctrl;
/*
* PCI configuration header block for the PBM:
*/
/*
* Memory address range on this PBM used to determine DMA on this pbm
*/
/*
* pbm Interrupt Mapping Register save area
*/
/* To save CDMA interrupt state across CPR */
/*
* pbm error interrupt priority:
*/
/*
* Consistent Mode DMA Sync
*/
volatile uint32_t pbm_cdma_flag;
/*
* DMA sync lock to serialize access to sync hardware.
* Used for schizo (>= 2.3) and xmits. Tomatillo does not require
* serialization.
*/
/*
* support for ddi_poke:
*/
/*
* Support for cautious IO accesses
*/
/*
*/
/*
* Sun Fire 15k PIO limiting semaphore
*/
volatile uint32_t pbm_pio_counter;
#define PBM_NAMESTR_BUFLEN 64
/* driver name & instance */
/* nodename & node_addr */
char *pbm_nameaddr_str;
};
/*
* forward declarations (object creation and destruction):
*/
extern void pbm_intr_dist(void *arg);
#ifdef __cplusplus
}
#endif
#endif /* _SYS_PCI_PBM_H */