pci_ib.h revision 7851eb825442b34b70077920364eeee5f91c43fa
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_PCI_IB_H
#define _SYS_PCI_IB_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
#include <sys/ddi_subrdefs.h>
#include <sys/pci_tools.h>
typedef uint16_t ib_mondo_t;
typedef struct ib_ino_info ib_ino_info_t;
typedef uint8_t device_num_t;
typedef uint8_t interrupt_t;
/*
* interrupt block soft state structure:
*
* Each pci node may share an interrupt block structure with its peer
* node or have its own private interrupt block structure.
*/
struct ib {
/*
* PCI slot and onboard I/O interrupt mapping register blocks addresses:
*/
/*
* PCI slot and onboard I/O clear interrupt register block addresses:
*/
/*
* UPA expansion slot interrupt mapping register addresses:
*/
/*
* Interrupt retry register address:
*/
volatile uint64_t *ib_intr_retry_timer_reg;
/*
* PCI slot and onboard I/O interrupt state diag register addresses:
*/
volatile uint64_t *ib_slot_intr_state_diag_reg;
volatile uint64_t *ib_obio_intr_state_diag_reg;
/* registers */
};
#define PCI_PULSE_INO 0x80000000
#define PSYCHO_MAX_INO 0x3f
#define SCHIZO_MAX_INO 0x37
/*
* The following structure represents an interrupt entry for an INO.
*/
typedef struct ih {
} ih_t;
/* Only used for fixed or legacy interrupts */
#define PCI_INTR_STATE_DISABLE 0 /* disabled */
/*
* ino structure : one per each psycho slot ino with interrupt registered
*/
struct ib_ino_info {
struct ib_ino_info *ino_next;
int ino_established; /* ino has been associated with a cpu */
};
#define IB_INTR_NOWAIT 0 /* already handling intr, no wait */
#define IB_IMR2MONDO(imr) \
#ifdef _STARFIRE
/*
* returns a uniq ino per interrupt mapping register
* For on board devices, inos are not shared. But for plugin devices,
* return the 1st ino of the 4 that are sharing the same mapping register.
*/
#define IB_GET_MAPREG_INO(ino) \
#endif /* _STARFIRE */
extern int pci_pil[];
#ifdef __cplusplus
}
#endif
#endif /* _SYS_PCI_IB_H */