29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * CDDL HEADER START
29949e866e40b95795203f3ee46f44a197c946e4stevel *
29949e866e40b95795203f3ee46f44a197c946e4stevel * The contents of this file are subject to the terms of the
29949e866e40b95795203f3ee46f44a197c946e4stevel * Common Development and Distribution License (the "License").
29949e866e40b95795203f3ee46f44a197c946e4stevel * You may not use this file except in compliance with the License.
29949e866e40b95795203f3ee46f44a197c946e4stevel *
29949e866e40b95795203f3ee46f44a197c946e4stevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
29949e866e40b95795203f3ee46f44a197c946e4stevel * or http://www.opensolaris.org/os/licensing.
29949e866e40b95795203f3ee46f44a197c946e4stevel * See the License for the specific language governing permissions
29949e866e40b95795203f3ee46f44a197c946e4stevel * and limitations under the License.
29949e866e40b95795203f3ee46f44a197c946e4stevel *
29949e866e40b95795203f3ee46f44a197c946e4stevel * When distributing Covered Code, include this CDDL HEADER in each
29949e866e40b95795203f3ee46f44a197c946e4stevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
29949e866e40b95795203f3ee46f44a197c946e4stevel * If applicable, add the following below this CDDL HEADER, with the
29949e866e40b95795203f3ee46f44a197c946e4stevel * fields enclosed by brackets "[]" replaced with your own identifying
29949e866e40b95795203f3ee46f44a197c946e4stevel * information: Portions Copyright [yyyy] [name of copyright owner]
29949e866e40b95795203f3ee46f44a197c946e4stevel *
29949e866e40b95795203f3ee46f44a197c946e4stevel * CDDL HEADER END
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * Copyright 1998 Sun Microsystems, Inc. All rights reserved.
29949e866e40b95795203f3ee46f44a197c946e4stevel * Use is subject to license terms.
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#ifndef _SYS_ENVCTRL_GEN_H
29949e866e40b95795203f3ee46f44a197c946e4stevel#define _SYS_ENVCTRL_GEN_H
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#pragma ident "%Z%%M% %I% %E% SMI"
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#ifdef __cplusplus
29949e866e40b95795203f3ee46f44a197c946e4stevelextern "C" {
29949e866e40b95795203f3ee46f44a197c946e4stevel#endif
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * envctrl_gen.h
29949e866e40b95795203f3ee46f44a197c946e4stevel *
29949e866e40b95795203f3ee46f44a197c946e4stevel * This header file holds the environmental control definitions that
29949e866e40b95795203f3ee46f44a197c946e4stevel * are common to all workgroup server platforms. Typically, all IOCTLs,
29949e866e40b95795203f3ee46f44a197c946e4stevel * kstat structures, and the generic constants are defined here.
29949e866e40b95795203f3ee46f44a197c946e4stevel * The platform specific definitions belong in header files which contain
29949e866e40b95795203f3ee46f44a197c946e4stevel * the platform name as part of the file name eg. envctrl_ue250.h for the
29949e866e40b95795203f3ee46f44a197c946e4stevel * UltraEnterprise-250 platform.
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_NORMAL_MODE 0x01
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DIAG_MODE 0x02
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CHAR_ZERO 0x00
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PS_550 550
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PS_650 650
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_INIT_TEMPR 20
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_ULTRA1CPU_STRING "SUNW,UltraSPARC"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_ULTRA2CPU_STRING "SUNW,UltraSPARC-II"
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_MAX_CPUS 8
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU0 0
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU1 1
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU2 2
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU3 3
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU4 4
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU5 5
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU6 6
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_CPU7 7
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * I2C Sensor Types
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PCD8584 0x00 /* Bus Controller Master */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PCF8591 0x01 /* Temp Sensor 8bit A/D, D/A */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PCF8574 0x02 /* PS, FAN, LED, Fail and Control */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_TDA8444T 0x03 /* Fan Speed Control, 8 bit D/A */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PCF8574A 0x04 /* 8574A chip */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PCF8583 0x05 /* PCF8583 clock chip */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_LM75 0x06 /* LM75 chip */
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * I2C device address offsets
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV0 0x0
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV1 0x2
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV2 0x4
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV3 0x6
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV4 0x8
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV5 0xA
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV6 0xC
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DEV7 0xE
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * I2C ports
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT0 0x00
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT1 0x01
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT2 0x02
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT3 0x03
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT4 0x04
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT5 0x05
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT6 0x06
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PORT7 0x07
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * Max number of a particular
29949e866e40b95795203f3ee46f44a197c946e4stevel * device on one bus.
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_MAX_DEVS 0x10
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_I2C_NODEV 0xFF
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_INSTANCE_0 0x00
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/* Disk Fault bit fields */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_0 0x01
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_1 0x02
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_2 0x04
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_3 0x08
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_4 0x10
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_5 0x20
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_6 0x40
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_7 0x80
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_4SLOT_BACKPLANE 0x0F
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_8SLOT_BACKPLANE 0xFF
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK4LED_ALLOFF 0xF0
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK6LED_ALLOFF 0xFC
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK8LED_ALLOFF 0xFF
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_MAXSTRLEN 256
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/* Kstat Structures and defines */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_FAN_TYPE_CPU 0x00
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_FAN_TYPE_PS 0x01
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_FAN_TYPE_AFB 0x02
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_FAN_TYPE_UE250 0x03
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_MODULE_NAME "envctrl"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_NUMPS "envctrl_numps"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_PSNAME "envctrl_pwrsupply"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_PSNAME2 "envctrl_pwrsupply2"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_NUMFANS "envctrl_numfans"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_FANSTAT "envctrl_fanstat"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_NUMENCLS "envctrl_numencls"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_ENCL "envctrl_enclosure"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_TEMPERATURE "envctrl_temp"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_KSTAT_DISK "envctrl_disk"
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * Kstat structure definitions (PSARC 1996/159)
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4steveltypedef struct envctrl_ps {
29949e866e40b95795203f3ee46f44a197c946e4stevel int instance; /* instance of this type */
29949e866e40b95795203f3ee46f44a197c946e4stevel ushort_t ps_tempr; /* temperature */
29949e866e40b95795203f3ee46f44a197c946e4stevel int ps_rating; /* type in watts */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t ps_ok; /* normal state or not. */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t curr_share_ok; /* current share imbalance */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t limit_ok; /* overlimit warning */
29949e866e40b95795203f3ee46f44a197c946e4stevel} envctrl_ps_t;
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4steveltypedef struct envctrl_fan {
29949e866e40b95795203f3ee46f44a197c946e4stevel int instance; /* instance of this type */
29949e866e40b95795203f3ee46f44a197c946e4stevel int type; /* CPU, PS or AMBIENT fan */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t fans_ok; /* are the fans okay */
29949e866e40b95795203f3ee46f44a197c946e4stevel int fanflt_num; /* if not okay, which fan faulted */
29949e866e40b95795203f3ee46f44a197c946e4stevel uint_t fanspeed; /* chip to set speed of fans */
29949e866e40b95795203f3ee46f44a197c946e4stevel} envctrl_fan_t;
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4steveltypedef struct envctrl_encl {
29949e866e40b95795203f3ee46f44a197c946e4stevel int instance;
29949e866e40b95795203f3ee46f44a197c946e4stevel int type;
29949e866e40b95795203f3ee46f44a197c946e4stevel uint_t value;
29949e866e40b95795203f3ee46f44a197c946e4stevel} envctrl_encl_t;
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * Kstat structure defintions (PSARC 1997/245)
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4steveltypedef struct envctrl_chip {
29949e866e40b95795203f3ee46f44a197c946e4stevel int type; /* chip type */
29949e866e40b95795203f3ee46f44a197c946e4stevel uchar_t chip_num; /* chip num */
29949e866e40b95795203f3ee46f44a197c946e4stevel uchar_t index; /* chip index */
29949e866e40b95795203f3ee46f44a197c946e4stevel uchar_t val; /* chip reading */
29949e866e40b95795203f3ee46f44a197c946e4stevel} envctrl_chip_t;
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4steveltypedef struct envctrl_ps2 {
29949e866e40b95795203f3ee46f44a197c946e4stevel ushort_t ps_tempr; /* temperature */
29949e866e40b95795203f3ee46f44a197c946e4stevel int ps_rating; /* type in watts */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t ps_ok; /* normal state or not */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t curr_share_ok; /* current share imbalance */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t limit_ok; /* overlimit warning */
29949e866e40b95795203f3ee46f44a197c946e4stevel int type; /* power supply type */
29949e866e40b95795203f3ee46f44a197c946e4stevel int slot; /* power supply slot occupied */
29949e866e40b95795203f3ee46f44a197c946e4stevel} envctrl_ps2_t;
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4steveltypedef struct envctrl_temp {
29949e866e40b95795203f3ee46f44a197c946e4stevel char label[ENVCTRL_MAXSTRLEN]; /* indicates temp. sensor location */
29949e866e40b95795203f3ee46f44a197c946e4stevel int type; /* Temperature sensor type */
29949e866e40b95795203f3ee46f44a197c946e4stevel uint_t value; /* temperature value */
29949e866e40b95795203f3ee46f44a197c946e4stevel uint_t min; /* minimum tolerable temperature */
29949e866e40b95795203f3ee46f44a197c946e4stevel uint_t warning_threshold; /* warning threshold */
29949e866e40b95795203f3ee46f44a197c946e4stevel uint_t shutdown_threshold; /* shutdown threshold */
29949e866e40b95795203f3ee46f44a197c946e4stevel} envctrl_temp_t;
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4steveltypedef struct envctrl_disk {
29949e866e40b95795203f3ee46f44a197c946e4stevel int slot; /* slot number of disk */
29949e866e40b95795203f3ee46f44a197c946e4stevel boolean_t disk_ok; /* disk fault LED off or on */
29949e866e40b95795203f3ee46f44a197c946e4stevel} envctrl_disk_t;
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PANEL_LEDS_PR "panel-leds-present"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_PANEL_LEDS_STA "panel-leds-state"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_LEDS_PR "disk-leds-present"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_DISK_LEDS_STA "disk-leds-state"
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_LED_BLINK "activity-led-blink?"
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * IOCTL defines (PSARC 1996/159)
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_RESETTMPR (int)(_IOW('p', 76, uchar_t))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETMODE (int)(_IOW('p', 77, uchar_t))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETTEMP (int)(_IOW('p', 79, uchar_t))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETFAN (int)(_IOW('p', 80, struct envctrl_tda8444t_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETWDT (int)(_IOW('p', 81, uchar_t))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETFAN (int)(_IOR('p', 81, struct envctrl_tda8444t_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETTEMP (int)(_IOR('p', 82, struct envctrl_pcf8591_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETFANFAIL (int)(_IOR('p', 83, struct envctrl_pcf8574_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETFSP (int)(_IOW('p', 84, uchar_t))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETDSKLED (int)(_IOW('p', 85, struct envctrl_pcf8574_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETDSKLED (int)(_IOR('p', 86, struct envctrl_pcf8574_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel/*
29949e866e40b95795203f3ee46f44a197c946e4stevel * IOCTL defines (PSARC 1997/245)
29949e866e40b95795203f3ee46f44a197c946e4stevel */
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETMODE (int)(_IOR('p', 87, uchar_t))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETTEMP2 (int)(_IOW('p', 88, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETFAN2 (int)(_IOW('p', 89, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETFAN2 (int)(_IOR('p', 90, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETTEMP2 (int)(_IOR('p', 91, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETFSP2 (int)(_IOW('p', 92, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETFSP2 (int)(_IOR('p', 93, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETDSKLED2 (int)(_IOW('p', 94, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETDSKLED2 (int)(_IOR('p', 95, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_SETRAW (int)(_IOW('p', 96, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel#define ENVCTRL_IOC_GETRAW (int)(_IOR('p', 97, struct envctrl_chip))
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#ifdef __cplusplus
29949e866e40b95795203f3ee46f44a197c946e4stevel}
29949e866e40b95795203f3ee46f44a197c946e4stevel#endif
29949e866e40b95795203f3ee46f44a197c946e4stevel
29949e866e40b95795203f3ee46f44a197c946e4stevel#endif /* _SYS_ENVCTRL_GEN_H */