fillsysinfo.c revision fa9e4066f08beec538e775443c5be79dd423fcab
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#include <sys/promimpl.h>
#include <sys/machsystm.h>
#include <sys/spitregs.h>
#include <sys/cheetahregs.h>
#include <sys/cpu_module.h>
/*
* The OpenBoot Standalone Interface supplies the kernel with
*/
/*
* structure describing properties that we are interested in querying the
* OBP for.
*/
struct getprop_info {
char *name;
};
/*
* structure used to convert between a string returned by the OBP & a type
* used within the kernel. We prefer to paramaterize rather than type.
*/
struct convert_info {
char *name;
char *realname;
};
/*
* structure describing nodes that we are interested in querying the OBP for
* properties.
*/
struct node_info {
char *name;
int size;
struct getprop_info *prop;
struct getprop_info *prop_end;
unsigned int *value;
};
/*
* macro definitions for routines that form the OBP interface
*/
#define NEXT prom_nextnode
#define CHILD prom_childnode
#define GETPROP prom_getprop
#define GETPROPLEN prom_getproplen
/* 0=quiet; 1=verbose; 2=debug */
int debug_fillsysinfo = 0;
int ncpunode;
static void check_cpus_ver(void);
static void check_cpus_set(void);
void fill_cpu_ddi(dev_info_t *);
void empty_cpu(int);
void plat_fill_mc(pnode_t);
#pragma weak plat_fill_mc
/*
* list of well known devices that must be mapped, and the variables that
* contain their addresses.
*/
volatile unsigned char *v_rtc_data_reg = NULL;
int niobus = 0;
uint_t niommu_tsbs = 0;
/*
* Hardware watchdog support.
*/
#define CHOSEN_EEPROM "eeprom"
#define WATCHDOG_ENABLE "watchdog-enable"
static pnode_t chosen_eeprom;
/*
* Appropriate tod module will be dynamically selected while booting
* based on finding a device tree node with a "device_type" property value
* of "tod". If such a node describing tod is not found, for backward
* compatibility, a node with a "name" property value of "eeprom" and
* "model" property value of "mk48t59" will be used. Failing to find a
* node matching either of the above criteria will result in no tod module
* being selected; this will cause the boot process to halt.
*/
char *tod_module_name;
/*
* If this variable is non-zero, cpr should return "not supported" when
* it is queried even though it would normally be supported on this platform.
*/
/*
* Some platforms may need to support CPR even in the absence of the
* energystar-v* property (Enchilada server, for example). If this
* variable is non-zero, cpr should proceed even in the absence
* of the energystar-v* property.
*/
int cpr_platform_enable = 0;
/*
* Some nodes have functions that need to be called when they're seen.
*/
static void have_eeprom(pnode_t);
static void have_auxio(pnode_t);
static struct wkdevice {
char *wk_namep;
#define V_OPTIONAL 0x0000
#define V_MUSTHAVE 0x0001
#define V_MAPPED 0x0002
} wkdevice[] = {
{ 0, },
};
static void map_wellknown(pnode_t);
void
{
/*
* if there is a chosen eeprom, note it (for have_eeprom())
*/
sizeof (phandle_t) &&
/*
* Get System clock frequency from root node if it exists.
*/
/*
* See if it worked
*/
}
}
/*
* all sun4u systems must have an IO bus, i.e. sbus or pcibus
*/
if (niobus == 0)
}
/*
* map_wellknown - map known devices & registers
*/
static void
{
extern int status_okay(int, char *, int);
char tmp_name[MAXSYSNAME];
static void fill_address(pnode_t, char *);
int sok;
#ifdef VPRINTF
#endif /* VPRINTF */
/*
* prune subtree if status property indicating not okay
*/
if (!sok) {
char devtype_buf[OBP_MAXPROPNAME];
int size;
#ifdef VPRINTF
VPRINTF("map_wellknown: !okay status property\n");
#endif /* VPRINTF */
/*
* a status property indicating bad memory will be
* associated with a node which has a "device_type"
* property with a value of "memory-controller"
*/
OBP_DEVICETYPE)) == -1)
continue;
if (size > OBP_MAXPROPNAME) {
continue;
}
devtype_buf) == -1) {
continue;
}
continue;
/*
* ...else fall thru and process the node...
*/
}
}
(&plat_fill_mc != NULL))
}
}
static void
{
int size;
continue;
return;
continue;
}
"big\n", namep);
continue;
}
namep);
continue;
}
/* make into a native pointer */
#ifdef VPRINTF
#endif /* VPRINTF */
}
/*
* If this one is optional and there may be more than
* one, don't set V_MAPPED, which would cause us to skip it
* next time around
*/
}
}
int
{
int portid;
char dev_type[OBP_MAXPROPNAME];
*cmpp = OBP_NONODE;
return (portid);
return (portid);
return (-1);
/* On a CMP core, the "portid" is in the parent */
return (portid);
}
}
return (-1);
}
/*
* Adjust page coloring variables based on the physical ecache setsize of
* the configured cpus:
*
* Set ecache_setsize to max ecache set size to be used by
* page_coloring_init() to determine the page colors to configure.
* The adjustment is unlikely to be necessary... For cheetah+ systems,
* ecache_setsize should already be set in cpu_fiximp() to the maximum
* possible ecache setsize of any supported cheetah+ cpus. The adjustment
* is for the off chance that a non-cheetah+ system may have heterogenous
* cpus.
*
* Set cpu_setsize to the actual cpu setsize if the setsize is homogenous
* across all cpus otherwise set it to -1 if heterogenous.
*
* Set cpu_page_colors to -1 to signify heterogeneity of ecache setsizes
* to the page_get routines.
*/
static void
{
if (ecsetsize > ecache_setsize)
switch (cpu_setsize) {
case -1:
break;
case 0:
break;
default:
/* set to -1 if hetergenous cpus */
if (cpu_setsize != ecsetsize) {
if (do_pg_coloring)
cpu_page_colors = -1;
/*
* if page coloring disabled, cpu_page_colors should
* remain 0 to prevent page coloring processing.
*/
cpu_setsize = -1;
}
break;
}
}
void
{
extern int cpu_get_cpu_unum(int, char *, int, int *);
int portid;
int tlbsize;
int size;
char *namebufp;
}
}
return;
}
} else {
}
namebufp += 5;
/* remap mask reg */
}
/*
* If we didn't find it in the CPU node, look in the root node.
*/
clk_freq = 0;
}
/*
* Compute scaling factor based on rate of %tick. This is used
* to convert from ticks derived from %tick to nanoseconds. See
*/
if (cmpnode != OBP_NONODE) {
/*
* If the CPU has a level 3 cache, then it will be the
* external cache. Otherwise the level 2 cache is the
* external cache.
*/
size = 0;
if (size <= 0)
size = 0;
if (size <= 0)
size = 0;
} else {
size = 0;
size = 0;
size = 0;
}
/* by default set msram to non-mirrored one */
}
}
if (ncpunode == 0) {
}
ncpunode++;
}
int
{
int portid;
char dev_type[OBP_MAXPROPNAME];
int len = OBP_MAXPROPNAME;
return (portid);
return (portid);
&len) != 0)
return (-1);
/* On a CMP core, the "portid" is in the parent */
return (portid);
}
}
return (-1);
}
/*
* A hotplug version of fill_cpu(). (Doesn't assume that there's a node
* in the PROM device tree for this CPU.) We still need the PROM version
* since it is called very early in the boot cycle before (before
* setup_ddi()). Sigh...someday this will all be cleaned up.
*/
void
{
extern int cpu_get_cpu_unum(int, char *, int, int *);
int portid;
int len;
int tlbsize;
char *namebufp;
}
}
return;
}
} else {
}
namebufp += 5;
DDI_PROP_DONTPASS, "implementation#", 0);
DDI_PROP_DONTPASS, "mask#", 0);
/* remap mask reg */
}
DDI_PROP_DONTPASS, "clock-frequency", 0);
/*
* Compute scaling factor based on rate of %tick. This is used
* to convert from ticks derived from %tick to nanoseconds. See
*/
DDI_PROP_DONTPASS, "#itlb-entries", 0);
DDI_PROP_DONTPASS, "#dtlb-entries", 0);
/*
* If the CPU has a level 3 cache, then that is it's
* external cache. Otherwise the external cache must
* be the level 2 cache.
*/
if (cpunode->ecache_size == 0)
if (cpunode->ecache_linesize == 0)
DDI_PROP_DONTPASS, "l2-cache-line-size", 0);
} else {
}
/* by default set msram to non-mirrored one */
"msram-observed")) {
}
ncpunode++;
}
void
{
ncpunode--;
}
#ifdef SF_ERRATA_30 /* call causes fp-disabled */
int spitfire_call_bug = 0;
#endif
#ifdef SF_V9_TABLE_28 /* fp over/underflow traps may cause wrong fsr.cexc */
int spitfire_bb_fsr_bug = 0;
#endif
#ifdef JALAPENO_ERRATA_85
/*
* Set the values here assuming we're running 2.4 or later Jalapenos. If
* not, they'll be reset below. Either way, the default can be overridden
*/
int jp_errata_85_allow_slow_scrub = 1;
int jp_errata_85_enable = 0;
#endif /* JALAPENO_ERRATA_85 */
static void
check_cpus_ver(void)
{
int i;
int min_supported_rev;
switch (impl) {
default:
min_supported_rev = 0;
break;
case SPITFIRE_IMPL:
break;
case CHEETAH_IMPL:
break;
}
for (i = 0; i < NCPU; i++) {
continue;
if (IS_SPITFIRE(impl)) {
"UltraSPARC versions older than %d.%d"
" are no longer supported (cpu #%d)",
}
/*
* Min supported rev is 2.1 but we've seen problems
* with that so we still want to warn if we see one.
*/
"UltraSPARC versions older than "
"2.2 are not supported (cpu #%d)", i);
#ifdef SF_ERRATA_30 /* call causes fp-disabled */
spitfire_call_bug = 1;
#endif /* SF_ERRATA_30 */
}
}
#ifdef SF_V9_TABLE_28 /* fp over/underflow traps may cause wrong fsr.cexc */
spitfire_bb_fsr_bug = 1;
#endif /* SF_V9_TABLE_28 */
if (IS_CHEETAH(impl)) {
"UltraSPARC-III versions older than %d.%d"
" are no longer supported (cpu #%d)",
}
}
#ifdef JALAPENO_ERRATA_85
jp_errata_85_enable = 1;
}
#endif /* JALAPENO_ERRATA_85 */
}
}
/*
* Check for a legal set of CPUs.
*/
static void
check_cpus_set(void)
{
int i;
int impl;
int npanther = 0;
switch (impl) {
case CHEETAH_PLUS_IMPL:
case JAGUAR_IMPL:
case PANTHER_IMPL:
/*
* Check for a legal heterogeneous set of CPUs.
*/
for (i = 0; i < NCPU; i++) {
continue;
npanther += 1;
}
use_mp = 0;
break;
}
}
break;
default:
/*
* Check for a homogeneous set of CPUs.
*/
for (i = 0; i < NCPU; i++) {
continue;
use_mp = 0;
break;
}
}
break;
}
/*
* Change from mmu_page_sizes from 4 to 6 for totally-Panther domains,
* where npanther == ncpunode. Also, set ecache_alignsize (and a few
* other globals) to the correct value for totally-Panther domains.
*/
if (&mmu_init_mmu_page_sizes) {
(void) mmu_init_mmu_page_sizes(npanther);
}
}
/*
* Set max cpus we can have based on ncpunode and use_mp
*/
if (use_mp) {
int (*set_max_ncpus)(void);
set_max_ncpus = (int (*)(void))
kobj_getsymvalue("set_platform_max_ncpus", 0);
if (set_max_ncpus) {
max_ncpus = set_max_ncpus();
} else {
}
} else {
" booting UP only");
for (i = 0; i < NCPU; i++) {
continue;
}
max_ncpus = 1;
}
}
/*
* The first sysio must always programmed up for the system clock and error
* handling purposes, referenced by v_sysio_addr in machdep.c.
*/
static void
{
int size;
niobus++;
/*
* need one physical TSB
*/
niommu_tsbs++;
}
#define IOMMU_PER_SCHIZO 2
/*
* The first psycho must always programmed up for the system clock and error
* handling purposes.
*/
static void
{
int size;
char compatible[OBP_MAXDRVNAME];
if (size == -1)
return;
niobus++;
/*
* Need two physical TSBs for Schizo compatible nodes,
* one otherwise.
*/
compatible[0] = '\0';
else
niommu_tsbs++;
}
/*
* The first eeprom is used as the TOD clock, referenced
* by v_eeprom_addr in locore.s.
*/
static void
{
int size;
/*
* "todmostek" module will be selected based on finding a "model"
* property value of "mk48t59" in the "eeprom" node.
*/
if (tod_module_name == NULL) {
char buf[MAXSYSNAME];
tod_module_name = "todmostek";
}
/*
* If we have found two distinct eeprom's, then we're done.
*/
return;
/*
* multiple eeproms may exist but at least
* one must have an "address" property
*/
return;
/*
* If we have a chosen eeprom and it is not this node, keep looking.
*/
return;
}
/*
* If we don't find an I/O board to use to check the clock,
* we'll fall back on whichever TOD is available.
*/
if (v_timecheck_addr == NULL)
/*
* Does this eeprom have watchdog support?
*/
watchdog_available = 1;
}
static void
{
int size;
/*
* "ds1287" module will be selected based on finding a "model"
* property value of "ds1287" in the "rtc" node.
*/
if (tod_module_name == NULL) {
char buf[MAXSYSNAME];
tod_module_name = "todm5823";
tod_module_name = "todds1287";
}
}
/*
* XXX - drives on if address prop doesn't exist, later falls
* over in tod module
*/
return;
/*
* Does this rtc have watchdog support?
*/
watchdog_available = 1;
}
static void
{
/*
* Watchdog property is in the root node.
*/
/*
* The hardware watchdog timer resides within logical
* unit 8 of SuperI/O. The address property of the node
* contains the virtual address that we use to program
* the timer.
*/
watchdog_available = 0;
return;
}
watchdog_available = 1;
}
}
static void
{
/*
* Get the size of the auzio's address property.
* On some platforms, the address property contains one
* entry and on others it contains five entries.
* In all cases, the first entries are compatible.
*
* This routine gets the address property for the auxio
* node and stores the first entry in v_auxio_addr which
*/
case 1:
break;
case 5:
break;
default:
}
}
static void
{
static char tod_name[MAXSYSNAME];
/*
* This is a node with "device_type" property value of "tod".
* Name of the tod module is the name from the node.
*/
}