scfreg.h revision c2c6897e1a5682452b38f92bc27270708f1e033c
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* All Rights Reserved, Copyright (c) FUJITSU LIMITED 2006
*/
#ifndef _SCFREG_H
#define _SCFREG_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
/*
* register map count
*/
/*
* register and SRAM max size
*/
/*
* SCF registers
*/
typedef struct scf_regs {
} scf_regs_t;
/*
* SCF control registers
*/
typedef struct scf_regs_c {
} scf_regs_c_t;
/*
* System buffer (SRAM)
*/
typedef struct scf_sys_sram {
/*
* DSCP buffer (SRAM)
*/
typedef struct scf_dscp_sram {
/*
* Interface buffer hedder (SRAM)
*/
typedef struct scf_interface {
/*
* SCF driver trace table
*/
#define DRV_ID_SIZE 16
typedef struct scf_if_drvtrc {
/*
* SRAM driver trace entry
*/
typedef struct scf_drvtrc_ent {
/*
* SRAM trace log ID
*/
/* interface error */
/* not support */
/* parameter error */
/* SCFI path error */
/* RCI access error */
/* sequence error */
/* SRAM trace define */
#define SCF_SRAM_TRACE(a, b) scf_sram_trace(a, b)
#define SCF_SET_SRAM_DATA1_2(a, b, c) \
#define SCF_SET_SRAM_DATA2_1(a, b) \
#define SCF_SET_SRAM_DATA2_2(a, b, c) \
#define SCF_SET_SRAM_DATA4_1(a, b) \
#define SCF_SET_SRAM_DATA4_3(a, b, c, d) \
/*
* SCF registers define
*/
/* COMMAND : SCF command register define */
#define SUB_SYSTEM_STATUS_RPT_NOPATH 0x51
/* System status (no path check) */
/* STATUS : SCF status register define */
/* secure mode status */
/* boot mode status */
/* STATUS_CMD_RTN_CODE : Command return value */
/* COMMAND_ExR : SCF command extended register define */
/* STATUS_ExR : SCF status extended register define */
/* ACR : Alive check register define */
/* ATR : Alive timer register define */
/* DCR : DSCP Buffer Control Register */
/* Domain to SCF data transfer request isuued */
/* SCF to domain data transfer request accepted */
#define DCR_RxACK 0x40
/* SCF to domain data transfer request end */
#define DCR_RxEND 0x20
/* DSR : DSCP Buffer Status Register */
/* SCF to domain data transfer request issued */
/* domain to SCF data transfer request accepted */
#define DSR_TxACK 0x40
/* domain to SCF data transfer request end */
#define DSR_TxEND 0x20
/* Length border conversion */
/*
* SCF registers define
*/
/* SCF Path Change Interrupt enable */
#define CONTROL_PATHCHGIE 0x8000
/* SCF Interrupt enable */
#define CONTROL_SCFIE 0x4000
/* DSCP Communication Buffer Interrupt enable */
#define CONTROL_IDBCIE 0x2000
/* Alive Interrupt enable */
#define CONTROL_ALIVEINE 0x1000
/* interrupt enable */
#define CONTROL_ENABLE \
/* interrupt disable */
#define CONTROL_DISABLE 0x0000
/* SCF Path Change Interrupt */
#define INT_ST_PATHCHGIE 0x8000
/* SCF interrupt */
#define INT_ST_SCFINT 0x4000
/* DSCP Communication Buffer Interrupt */
#define INT_ST_IDBCINT 0x2000
/* Alive Interrupt */
#define INT_ST_ALIVEINT 0x1000
/* All Interrupt */
#define INT_ST_ALL \
/* Machine address */
/* status */
/* POFF ID */
#define POFF_ID_MASK 0xf0
/* category type */
/* Remote Device Control */
#define RMT_DEV_CLASS_START_SHIFT 16
/* sense */
#define DEV_SENSE_UPS_MASK 0x0f
#define DEV_SENSE_PWRSR_MASK 0x0f
/*
* SCF command send control
*/
typedef struct scf_cmd {
} scf_cmd_t;
/* SCF interrupt error status make */
/* SCF comannd buff type */
#define SCF_USE_S_BUF 0 /* Tx : -/S Rx : - */
#define SCF_USE_STOP 0x7e
#define SCF_USE_START 0x7f
/* SCF command size */
#define SCF_L_CNT_MAX SRAM_MAX_SYSTEM
/* Command buffer max size (64Kyte) */
/* INT_REASON max size (128yte) */
/* CMD_RCI_CTL SUB_RCI_PATH_4* value */
/* Alive check function value */
#define SCF_ALIVE_STOP 0 /* Alive check stop */
/* Alive check timer value (10s) */
/* Short buffer structure */
typedef union scf_short_buffer {
/* Event information structure */
typedef union scf_int_reason {
#ifdef __cplusplus
}
#endif
#endif /* _SCFREG_H */