opl.c revision 31f6f5ee98526c6119cd0a39fb1ace69897209fa
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER START
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The contents of this file are subject to the terms of the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Common Development and Distribution License (the "License").
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You may not use this file except in compliance with the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * See the License for the specific language governing permissions
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and limitations under the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * When distributing Covered Code, include this CDDL HEADER in each
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If applicable, add the following below this CDDL HEADER, with the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * fields enclosed by brackets "[]" replaced with your own identifying
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * information: Portions Copyright [yyyy] [name of copyright owner]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER END
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Use is subject to license terms.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#pragma ident "%Z%%M% %I% %E% SMI"
25cf1a301a396c38e8adf52c15f537b80d2483f7jlint (*opl_get_mem_unum)(int, uint64_t, char *, int, int *);
0cc8ae8667155d352d327b5c92b62899a7e05bcdavint (*opl_get_mem_sid)(char *unum, char *buf, int buflen, int *lenp);
0cc8ae8667155d352d327b5c92b62899a7e05bcdavint (*opl_get_mem_offset)(uint64_t paddr, uint64_t *offp);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/* Memory for fcode claims. 16k times # maximum possible IO units */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define EFCODE_SIZE (OPL_MAX_BOARDS * OPL_MAX_IO_UNITS_PER_BOARD * 0x4000)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define OPL_MC_MEMBOARD_SHIFT 38 /* Boards on 256BG boundary */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/* Set the maximum number of boards for DR */
25cf1a301a396c38e8adf52c15f537b80d2483f7jlint opl_tsb_spares = (OPL_MAX_BOARDS) * (OPL_MAX_PCICH_UNITS_PER_BOARD) *
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuahstatic int opl_num_models = sizeof (opl_models)/sizeof (opl_model_info_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic struct memlist *opl_memlist_per_board(struct memlist *ml);
0cc8ae8667155d352d327b5c92b62899a7e05bcdavstatic enum {
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuahstatic void
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah * Get model name from the root node.
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah * We are using the prom device tree since, at this point,
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah * the Solaris device tree is not yet setup.
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah (void) prom_getprop(prom_rootnode(), "model", (caddr_t)name);
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah for (i = 0; i < opl_num_models; i++) {
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah if (strncmp(name, opl_models[i].model_name, MAXSYSNAME) == 0) {
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah "Set max_mmu_ctxdoms to the default.");
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuahstatic void
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah * From the model, get the maximum number of boards
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah * supported and set the value accordingly. If the model
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah * could not be determined or recognized, we assume the max value.
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah * On OPL, cores and MMUs are one-to-one.
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuah max_mmu_ctxdoms = OPL_MAX_CORE_UNITS_PER_BOARD * max_boards;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl extern char *tod_module_name;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl extern void cpu_sgn_update(ushort_t, uchar_t, uchar_t, int);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Set the CPU signature function pointer */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Set appropriate tod module for OPL platform */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Use the alternate TS dispatch table, which is better tuned
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * for large servers.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Convert logical a board number to a physical one.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This function is called on early stage of bootup when the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * kernel device tree is not initialized yet, and also
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * later on when the device tree is up. We want to try
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the fast track first.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Get from devinfo node */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * We do not have the kernel device tree, or we did not
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * find the node for some reason (let's say the kernel
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * device tree was modified), let's try the OBP tree.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if ((prom_getprop(pnode, "name", (caddr_t)pname) == -1) ||
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (prom_getprop(pnode, LSBPROP, (caddr_t)&lsb_id) == -1)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (-1);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * For OPL it's possible that memory from two or more successive boards
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * will be contiguous across the boards, and therefore represented as a
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * single chunk.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This function splits such chunks down the board boundaries.
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic struct memlist *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Note: we are assuming that post has load the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * whole show in to the high end of memory. Having
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * taken this leap, we copy the whole of phys_avail
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the glist and arrange for the cage to grow
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * downward (descending pfns).
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* free the memlist */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (int (*)(struct cpu *))kobj_getsymvalue("drmach_cpu_poweron", 0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (int (*)(struct cpu *))kobj_getsymvalue("drmach_cpu_poweroff", 0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/* ARGSUSED */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * OPL mem slices are always aligned on a 256GB boundary.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mem_node_pfn_shift = OPL_MC_MEMBOARD_SHIFT - MMU_PAGESHIFT;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Boot install lists are arranged <addr, len>, <addr, len>, ...
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Find the CPU associated with a slice at boot-time.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (prom_getprop(nodeid, "board#", (caddr_t)&board) < 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl panic("Can not find board# property in mc node %x", nodeid);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (prom_getprop(nodeid, "sb-mem-ranges", (caddr_t)&mem_range) < 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl panic("Can not find sb-mem-ranges property in mc node %x",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Return the platform handle for the lgroup containing the given CPU
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * For OPL, lgroup platform handle == board #.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Return the real platform handle for the CPU until
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * such time as we know that MPO should be disabled.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * At that point, we set the "mpo_disabled" flag to true,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and from that point on, return the default handle.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * By the time we know that MPO should be disabled, the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * first CPU will have already been added to a leaf
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * lgroup, but that's ok. The common lgroup code will
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * double check that the boot CPU is in the correct place,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and in the case where mpo should be disabled, will move
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * it to the root if necessary.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* If MPO is disabled, return the default (UMA) handle */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Platform specific lgroup initialization
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Set tuneables for the OPL architecture
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * lgrp_expand_proc_thresh is the minimum load on the lgroups
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * this process is currently running on before considering
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * expanding threads to another lgroup.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * lgrp_expand_proc_diff determines how much less the remote lgroup
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * must be loaded before expanding to it.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Since remote latencies can be costly, attempt to keep 3 threads
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * within the same lgroup before expanding to the next lgroup.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Platform notification of lgroup (re)configuration changes
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl switch (evt) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Establish the lgroup handle to memnode translation.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mnode = plat_pfn_to_mem_node(umb->u_base >> MMU_PAGESHIFT);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Special handling for possible memory holes.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * During a DR copy-rename operation, all of the memory
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * on one board is moved to another board -- but the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * addresses/pfns and memnodes don't change. This means
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the memory has changed locations without changing identity.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Source is where we are copying from and target is where we
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * are copying to. After source memnode is copied to target
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * memnode, the physical addresses of the target memnode are
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * renamed to match what the source memnode had. Then target
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * memnode can be removed and source memnode can take its
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * To do this, swap the lgroup handle to memnode mappings for
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the boards, so target lgroup will have source memnode and
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * source lgroup will have empty target memnode which is where
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * its memory will go (if any is added to it later).
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Then source memnode needs to be removed from its lgroup
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and added to the target lgroup where the memory was living
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * but under a different name/memnode. The memory was in the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * target memnode and now lives in the source memnode with
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * different physical addresses even though it is the same
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Special handling for possible memory holes.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Remove source memnode of copy rename from its lgroup
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and add it to its new target lgroup
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Return latency between "from" and "to" lgroups
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This latency number can only be used for relative comparison
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * between lgroups on the running system, cannot be used across platforms,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and may not reflect the actual latency. It is platform and implementation
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * specific, so platform gets to decide its value. It would be nice if the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * number was at least proportional to make comparisons more meaningful though.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * NOTE: The numbers below are supposed to be load latencies for uncached
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * memory divided by 10.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * XXX latency values for Columbus, not Columbus2. Should be fixed later when
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we know the actual numbers for Columbus2.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Return min remote latency when there are more than two lgroups
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * (root and child) and getting latency between two different lgroups
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * or root is involved
25cf1a301a396c38e8adf52c15f537b80d2483f7jl from == LGRP_DEFAULT_HANDLE || to == LGRP_DEFAULT_HANDLE))
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (27);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (25);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Return platform handle for root lgroup
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * No platform drivers on this platform
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlcpu_sgn_update(ushort_t sgn, uchar_t state, uchar_t sub_state, int cpuid)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl static void (*scf_panic_callback)(int);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl static void (*scf_shutdown_callback)(int);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This is for notifing system panic/shutdown to SCF.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * In case of shutdown and panic, SCF call back
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * function should be called.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * <SCF call back functions>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * scf_panic_callb() : panicsys()->panic_quiesce_hw()
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * scf_shutdown_callb(): halt() or power_down() or reboot_machine()
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * cpuid should be -1 and state should be SIGST_EXIT.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * find the symbol for the SCF panic callback routine in driver
25cf1a301a396c38e8adf52c15f537b80d2483f7jl scf_panic_callback = (void (*)(int))
25cf1a301a396c38e8adf52c15f537b80d2483f7jl scf_shutdown_callback = (void (*)(int))
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "scf_panic_callb not found\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "scf_shutdown_callb not found\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "scf_shutdown_callb not found\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "scf_shutdown_callb not found\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlplat_get_mem_unum(int synd_code, uint64_t flt_addr, int flt_bus_id,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * check if it's a Memory error.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlplat_get_cpu_unum(int cpuid, char *buf, int buflen, int *lenp)
0cc8ae8667155d352d327b5c92b62899a7e05bcdav /* determine the platform model once */
0cc8ae8667155d352d327b5c92b62899a7e05bcdav plen = snprintf(buf, buflen, "/%s%02d/CPUM%d", "CMU", sb,
0cc8ae8667155d352d327b5c92b62899a7e05bcdav /* This should never happen */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define SCF_PUTINFO(f, s, p) \
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * find the symbol for the SCF put routine in driver
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If the symbol was found, call it. Otherwise, log a note (but not to
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * the console).
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "!plat_nodename_set: scf_service_putinfo not found\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (struct utsname *)kmem_zalloc(sizeof (struct utsname), KM_SLEEP);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sizeof (struct utsname), datap) == EBUSY) && (counter-- > 0)) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "!plat_nodename_set: "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "scf_service_putinfo not responding\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Preallocate enough memory for fcode claims.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl caddr_t efcode_alloc_base = (caddr_t)roundup((uintptr_t)alloc_base,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * allocate the physical memory for the Oberon fcode.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if ((vaddr = (caddr_t)BOP_ALLOC(bootops, efcode_alloc_base,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl (caddr_t)roundup((uintptr_t)tmp_alloc_base, ecache_alignsize);
1e2e7a75ddb1eedcefa449ce98fd5862749b72eehuahplat_cpuid_to_mmu_ctx_info(processorid_t cpuid, mmu_ctx_info_t *info)
0cc8ae8667155d352d327b5c92b62899a7e05bcdavplat_get_mem_sid(char *unum, char *buf, int buflen, int *lenp)