25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER START
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The contents of this file are subject to the terms of the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Common Development and Distribution License (the "License").
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You may not use this file except in compliance with the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * or http://www.opensolaris.org/os/licensing.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * See the License for the specific language governing permissions
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and limitations under the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * When distributing Covered Code, include this CDDL HEADER in each
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If applicable, add the following below this CDDL HEADER, with the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * fields enclosed by brackets "[]" replaced with your own identifying
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * information: Portions Copyright [yyyy] [name of copyright owner]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER END
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
07d06da50d310a325b457d6330165aebab1e0064Surya Prakki
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
07d06da50d310a325b457d6330165aebab1e0064Surya Prakki * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Use is subject to license terms.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This file is through cpp before being used as
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * an inline. It contains support routines used
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * only by DR for the copy-rename sequence.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/types.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include "assym.h"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include "drmach_offsets.h"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/asm_linkage.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/param.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/privregs.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/spitregs.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/mmu.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/machthread.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/pte.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/stack.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/vis.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/intreg.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/cheetahregs.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <sys/drmach.h>
b307f191031b69156225d50e36c406311441051abm#include <sys/sbd_ioctl.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if !defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * turn off speculative mode to prevent unwanted memory access
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * when we are in the FMEM loops
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define FJSV_SPECULATIVE_OFF(reg, tmp1, tmp2) \
25cf1a301a396c38e8adf52c15f537b80d2483f7jl rdpr %pstate, reg ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl andn reg, PSTATE_IE, tmp1 ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl wrpr %g0, tmp1, %pstate ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%g0]ASI_MCNTL, tmp1 ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl set 1, tmp2 ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sllx tmp2, MCNTL_SPECULATIVE_SHIFT, tmp2 ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl or tmp1, tmp2, tmp1 ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stxa tmp1, [%g0]ASI_MCNTL ;\
25cf1a301a396c38e8adf52c15f537b80d2483f7jl membar #Sync
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlvoid
25cf1a301a396c38e8adf52c15f537b80d2483f7jldrmach_fmem_loop_script(caddr_t critical, int size, caddr_t stat)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{ return; }
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl .align 8
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(drmach_fmem_loop_script)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* turn off speculative mode */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FJSV_SPECULATIVE_OFF(%o5, %o3, %o4);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* read the critical region to get everything in the cache */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %o0, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl0:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o3], %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sub %o1, 8, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl brnz %o1, 0b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %o3, 8, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* clear L2_CTRL_UGE_TRAP error bit */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov ASI_L2_CTRL_RW_ADDR, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%o1]ASI_L2_CTRL, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(ASI_L2_CTRL_UGE_TRAP), %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %o3, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bz,pn %xcc, 1f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stxa %o4, [%o1]ASI_L2_CTRL
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* now tell the master CPU that we are ready */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl1:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl set FMEM_LOOP_FMEM_READY, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stb %o3, [%o2]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl membar #Sync
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba 5f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * note that we branch to 5f, which branches right back to 2 here.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The trick is that when that branch instruction has already been
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * patched to a branch to itself - an infinite loop.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The master thread will patch it back to "ba 2b" when it
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * completes.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Once we are back, we first check if there has been any
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * L2_CTRL_UGE_TRAP errors, if so we have to fail the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * operation. This will cause a panic because the system
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * is already in inconsistent state.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl2:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov ASI_L2_CTRL_RW_ADDR, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%o3]ASI_L2_CTRL, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(ASI_L2_CTRL_UGE_TRAP), %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %o3, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bz,pn %xcc, 3f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %g0, %o4
b307f191031b69156225d50e36c406311441051abm set EOPL_FMEM_HW_ERROR, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* set error code and stat code */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl3:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl set FMEM_LOOP_DONE, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stb %o3, [%o2]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* turn on speculative mode again */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%g0]ASI_MCNTL, %o0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl set 1, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sllx %o1, MCNTL_SPECULATIVE_SHIFT, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl andn %o0, %o1, %o0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba 4f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl.align 32
25cf1a301a396c38e8adf52c15f537b80d2483f7jl4:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stxa %o0, [%g0]ASI_MCNTL
25cf1a301a396c38e8adf52c15f537b80d2483f7jl membar #Sync
25cf1a301a396c38e8adf52c15f537b80d2483f7jl wrpr %g0, %o5, %pstate
25cf1a301a396c38e8adf52c15f537b80d2483f7jl retl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %o4, %o0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl.align 8
25cf1a301a396c38e8adf52c15f537b80d2483f7jl5:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ALTENTRY(drmach_fmem_loop_script_rtn)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * busy wait will affect sibling strands so
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we put sleep instruction in the delay slot
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba 2b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl.word 0x81b01060
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(drmach_fmem_loop_script)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlvoid
25cf1a301a396c38e8adf52c15f537b80d2483f7jldrmach_flush_icache(void)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{ return; }
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl .align 8
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(drmach_flush_icache)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stxa %g0, [%g0]ASI_ALL_FLUSH_L1I
25cf1a301a396c38e8adf52c15f537b80d2483f7jl membar #Sync
25cf1a301a396c38e8adf52c15f537b80d2483f7jl retl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(drmach_flush_icache)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlint
25cf1a301a396c38e8adf52c15f537b80d2483f7jldrmach_fmem_exec_script(caddr_t critical, int size)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{ return (0); }
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl.align 32
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(drmach_fmem_exec_script)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* turn off speculative mode */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FJSV_SPECULATIVE_OFF(%o5, %o3, %o4);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* save locals to save area */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %o0, SAVE_LOCAL, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l0, [%o2+8*0]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l1, [%o2+8*1]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l2, [%o2+8*2]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l3, [%o2+8*3]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l4, [%o2+8*4]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l5, [%o2+8*5]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l6, [%o2+8*6]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l7, [%o2+8*7]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %o5, %l6
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* l7 is set only when FMEM cmd is issued to SCF */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %g0, %l7
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* read the critical region to put everything in the cache */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %o0, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl0:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o2], %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sub %o1, 8, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl brnz %o1, 0b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %o2, 8, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba 4f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* we branch to 4f but eventually we branch back here to finish up */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl1:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %l6, %o5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * save some registers for debugging
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * l0 - SCF_REG_BASE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * l1 - SCF_TD
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * l2 - SCF_TD + 8
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * l5 - DELAY
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %o0, SAVE_LOG, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l0, [%o1+8*0]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l1, [%o1+8*1]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l2, [%o1+8*2]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %l5, [%o1+8*3]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %o0, FMEM_ISSUED, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl st %l7, [%o1]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Check for L2_CTRL_UGE_TRAP error */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov ASI_L2_CTRL_RW_ADDR, %l0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%l0]ASI_L2_CTRL, %l1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(ASI_L2_CTRL_UGE_TRAP), %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %l1, %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bz,pn %xcc, 2f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
b307f191031b69156225d50e36c406311441051abm set EOPL_FMEM_HW_ERROR, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl2:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* restore all locals */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %o0, SAVE_LOCAL, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*0], %l0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*1], %l1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*2], %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*3], %l3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*4], %l4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*5], %l5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*6], %l6
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o1+8*7], %l7
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* turn on speculative mode */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%g0]ASI_MCNTL, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl set 1, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sllx %o2, MCNTL_SPECULATIVE_SHIFT, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl andn %o1, %o2, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba 3f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl.align 32
25cf1a301a396c38e8adf52c15f537b80d2483f7jl3:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stxa %o1, [%g0]ASI_MCNTL
25cf1a301a396c38e8adf52c15f537b80d2483f7jl membar #Sync
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* return error code here */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %o4, %o0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl retl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl wrpr %g0, %o5, %pstate
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* clear L2_CTRL_UGE_TRAP error bit */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl4:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov ASI_L2_CTRL_RW_ADDR, %l0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%l0]ASI_L2_CTRL, %l1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(ASI_L2_CTRL_UGE_TRAP), %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %l1, %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bz,pn %xcc, 5f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stxa %l2, [%l0]ASI_L2_CTRL
25cf1a301a396c38e8adf52c15f537b80d2483f7jl5:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* set up the register locations and parameters */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o0 + SCF_REG_BASE], %l0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o0 + SCF_TD], %l1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o0 + SCF_TD+8], %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o0 + DELAY], %l5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson /* check if SCF is ONLINE */
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson add %l0, SCF_STATUS_EX, %o1
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson lduwa [%o1]ASI_IO, %o2
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson sethi %hi(SCF_STATUS_EX_ONLINE), %o3
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson btst %o2, %o3
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson bne %xcc, 6f
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson nop
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson set EOPL_FMEM_SCF_OFFLINE, %o4
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson ba 1b
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson nop
4fe85d41bb4eb0db41934722f4b06c8acec2d25aJames Anderson
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* check if SCF is busy */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l0, SCF_COMMAND, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl lduha [%o1]ASI_IO, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(SCF_CMD_BUSY), %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %o2, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl be %xcc, 6f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
b307f191031b69156225d50e36c406311441051abm set EOPL_FMEM_SCF_BUSY, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba 1b
b307f191031b69156225d50e36c406311441051abm nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* clear STATUS bit */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl6:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l0, SCF_STATUS, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl lduha [%o1]ASI_IO, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(SCF_STATUS_READY), %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %o2, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl be %xcc, 7f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stha %o3, [%o1]ASI_IO
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* clear CMD_COMPLETE bit */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl7:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov SCF_STATUS_CMD_COMPLETE, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %o2, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl be,a %xcc, 8f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stha %o3, [%o1]ASI_IO
25cf1a301a396c38e8adf52c15f537b80d2483f7jl8:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l0, (SCF_TDATA+0xe), %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %l2, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov SCF_RETRY_CNT, %o5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(0xffff), %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl or %l2, %lo(0xffff), %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl and %o4, %l2, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * o1 points to SCFBASE.SCF_TDATA[0xe]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * l0 points to SCFBASE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * crticial->SCF_TD[0] = source board #
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * crticial->SCF_TD[1] = target board #
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * l1 = critical->SCF_TD[0 - 7]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * l2 = 0xffff
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * o4 = critical->SCF_TD[8 - 15]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * o3 = (*o4) & 0xffff
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Because there is no parity protection on the ebus
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we read the data back after the write to verify
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * we write 2 bytes at a time.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If the data read is not the same as data written
b307f191031b69156225d50e36c406311441051abm * we retry up to a limit of SCF_RETRY_CNT
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl9:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stha %o3, [%o1]ASI_IO
25cf1a301a396c38e8adf52c15f537b80d2483f7jl lduha [%o1]ASI_IO, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sub %o5, 1, %o5
b307f191031b69156225d50e36c406311441051abm brnz %o5, 7f
b307f191031b69156225d50e36c406311441051abm nop
b307f191031b69156225d50e36c406311441051abm set EOPL_FMEM_RETRY_OUT, %o4
b307f191031b69156225d50e36c406311441051abm ba 1b
b307f191031b69156225d50e36c406311441051abm nop
b307f191031b69156225d50e36c406311441051abm7:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmp %o2, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bne,a 9b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sub %o1, %l0, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmp %o2, (SCF_TDATA+0x8)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bne %xcc, 2f
25cf1a301a396c38e8adf52c15f537b80d2483f7jl srlx %o4, 16, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %l1, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* if we have reach TDATA+8, we switch to l1 */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* XXX: Why we need 2 loops??? */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl2:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sub %o1, 2, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov SCF_RETRY_CNT, %o5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl and %o4, %l2, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sub %o1, %l0, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmp %o2, (SCF_TDATA)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bge,a 9b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* if we reach TDATA, we are done */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* read from SCF back to our buffer for debugging */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l0, (SCF_TDATA), %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%o1]ASI_IO, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %o2, [%o0+SCF_TD]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l0, (SCF_TDATA+8), %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldxa [%o1]ASI_IO, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stx %o2, [%o0+SCF_TD+8]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
b307f191031b69156225d50e36c406311441051abm /* The following code conforms to the FMEM
b307f191031b69156225d50e36c406311441051abm sequence (4) as described in the Columbus2
b307f191031b69156225d50e36c406311441051abm logical spec section 4.6
b307f191031b69156225d50e36c406311441051abm */
b307f191031b69156225d50e36c406311441051abm
b307f191031b69156225d50e36c406311441051abm /* read from SCF SB INFO register */
b307f191031b69156225d50e36c406311441051abm sethi %hi(SCF_SB_INFO_OFFSET), %o2
b307f191031b69156225d50e36c406311441051abm or %o2, %lo(SCF_SB_INFO_OFFSET), %o2
b307f191031b69156225d50e36c406311441051abm add %l0, %o2, %o1
b307f191031b69156225d50e36c406311441051abm lduba [%o1]ASI_IO, %o2
b307f191031b69156225d50e36c406311441051abm
b307f191031b69156225d50e36c406311441051abm /* If BUSY bit is set, abort */
b307f191031b69156225d50e36c406311441051abm or %g0, (SCF_SB_INFO_BUSY), %o1
b307f191031b69156225d50e36c406311441051abm btst %o1, %o2
b307f191031b69156225d50e36c406311441051abm set EOPL_FMEM_SCF_BUSY, %o4
b307f191031b69156225d50e36c406311441051abm bne 1b
b307f191031b69156225d50e36c406311441051abm nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl rd STICK, %l1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l5, %l1, %l5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Now tell SCF to do it */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l0, SCF_COMMAND, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* 0x10A6 is the magic command */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(0x10A6), %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl or %o2, %lo(0x10A6), %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stha %o2, [%o1]ASI_IO
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov 1, %l7 ! FMEM is issued
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %l0, SCF_STATUS, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sethi %hi(SCF_STATUS_READY), %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov SCF_STATUS_CMD_COMPLETE, %o3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* read STATUS_READY bit and clear it only if it is set */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* XXX: this STATUS_READY checking seems meaningless */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl3:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl lduha [%o1]ASI_IO, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %o2, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl be %xcc, 4f ! STATUS_READY is not set
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stha %o2, [%o1]ASI_IO ! Clear if the bit is set
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* check CMD_COMPLETE bit and clear */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl4:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl btst %o3, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl be %xcc, 5f ! CMD_COMPLETE is not set
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl stha %o3, [%o1]ASI_IO ! Now we are done and clear it
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba %xcc, 6f
b307f191031b69156225d50e36c406311441051abm mov ESBD_NOERROR, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* timeout delay checking */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl5:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl rd STICK, %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl cmp %l5, %l2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl bge %xcc, 3b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
b307f191031b69156225d50e36c406311441051abm set EOPL_FMEM_TIMEOUT, %o4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* we are done or timed out */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl6:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ba,a 1b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(drmach_fmem_exec_script)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlvoid
25cf1a301a396c38e8adf52c15f537b80d2483f7jldrmach_fmem_exec_script_end(caddr_t critical, int size)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{ return; }
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(drmach_fmem_exec_script_end)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(drmach_fmem_exec_script_end)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jluint64_t
25cf1a301a396c38e8adf52c15f537b80d2483f7jlpatch_inst(uint64_t *x, uint64_t y)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *x = y;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl}
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(patch_inst)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o0], %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl casx [%o0], %o2, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl flush %o0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl membar #Sync
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ldx [%o0], %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl retl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %o2, %o0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(patch_inst)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jlvoid
25cf1a301a396c38e8adf52c15f537b80d2483f7jldrmach_sys_trap()
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{
25cf1a301a396c38e8adf52c15f537b80d2483f7jl}
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(drmach_sys_trap)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov -1, %g4
25cf1a301a396c38e8adf52c15f537b80d2483f7jl set sys_trap, %g5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl jmp %g5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(drmach_sys_trap)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jluint64_t
25cf1a301a396c38e8adf52c15f537b80d2483f7jldrmach_get_stick()
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl}
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(drmach_get_stick)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl retl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl rd STICK, %o0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(drmach_get_stick)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#if defined(lint)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlvoid
07d06da50d310a325b457d6330165aebab1e0064Surya Prakkidrmach_flush(drmach_copy_rename_critical_t *x, uint_t y)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl{}
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#else /* lint */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl ENTRY_NP(drmach_flush)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mov %o0, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl0:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl flush %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sub %o1, 8, %o1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl brnz %o1, 0b
25cf1a301a396c38e8adf52c15f537b80d2483f7jl add %o2, 8, %o2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl retl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nop
25cf1a301a396c38e8adf52c15f537b80d2483f7jl SET_SIZE(drmach_flush)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* lint */