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25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Use is subject to license terms.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#pragma ident "%Z%%M% %I% %E% SMI"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CMU-CH PBM implementation:
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * initialization
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Bus error interrupt handler
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/* The nexus interrupt priority values */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Allocate a state structure for the PBM and cross-link it
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * to its per pci node state structure.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcbm_p = (pcmu_pbm_t *)kmem_zalloc(sizeof (pcmu_pbm_t), KM_SLEEP);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sizeof (pcbm_p->pcbm_nameinst_str), "%s%d", NAMEINST(dip));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcbm_p->pcbm_nameaddr_str = pcbm_p->pcbm_nameinst_str + ++len;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sizeof (pcbm_p->pcbm_nameinst_str) - len, "%s@%s", NAMEADDR(dip));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "pcmu_pbm_create: ctrl=%x, afsr=%x, afar=%x, diag=%x\n",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcbm_p->pcbm_ctrl_reg, pcbm_p->pcbm_async_flt_status_reg,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl PCMU_DBG1(PCMU_DBG_ATTACH, dip, "pcmu_pbm_create: conf=%x\n",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Register a function to disable pbm error interrupts during a panic.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * create the interrupt-priorities property if it doesn't
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * already exist to provide a hint as to the PIL level for
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * our interrupt.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Create the interrupt-priorities property. */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcmu_ib_nintr_clear(pcmu_p->pcmu_ib_p, pcmu_p->pcmu_inos[CBNINTR_PBM]);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Install the PCI error interrupt handler.
b0fc0e77220f1fa4c933fd58a4e1dedcd650b0f1govinda (intrfunc)pcmu_pbm_error_intr, (caddr_t)pcmu_p, NULL, NULL) == 0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcbm_p->pcbm_iblock_cookie = (void *)(uintptr_t)pcmu_pil[CBNINTR_PBM];
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Create the pokefault mutex at the PIL below the error interrupt.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl mutex_init(&pcbm_p->pcbm_pokeflt_mutex, NULL, MUTEX_DRIVER,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl return (PCMU_ATTACH_RETCODE(PCMU_PBM_OBJ, PCMU_OBJ_INTR_ADD, r));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl PCMU_DBG0(PCMU_DBG_DETACH, pcmu_p->pcmu_dip, "pcmu_pbm_destroy:\n");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Free the pokefault mutex.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Remove the error interrupt.
b0fc0e77220f1fa4c933fd58a4e1dedcd650b0f1govinda VERIFY(rem_ivintr(mondo, pcmu_pil[CBNINTR_PBM]) == 0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Remove the error disable function.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Free the pbm state structure.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * ddi_poke protection, check nexus and children for
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * expected errors.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * unprotected error, check for all errors.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcmu_ib_nintr_clear(pcmu_p->pcmu_ib_p, pcmu_p->pcmu_inos[CBNINTR_PBM]);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcbm_p->pcbm_imr_save = *ib_intr_map_reg_addr(pcmu_p->pcmu_ib_p, ino);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *ib_intr_map_reg_addr(pcmu_p->pcmu_ib_p, ino) = pcbm_p->pcbm_imr_save;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcmu_ib_intr_dist_nintr(pib_p, ino, ib_intr_map_reg_addr(pib_p, ino));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Function used to log PBM AFSR register bits and to lookup and fault
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * handle associated with PBM AFAR register. Called by
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * pcmu_pbm_err_handler with pcmu_err_mutex held.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* LINTED variable */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl pcmu_t *pcmu_p = get_pcmu_soft_state(ddi_get_instance(dip));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * We are currently not dealing with the multiple error
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * case, for any secondary errors we will panic.