pcicmu.c revision 193974072f41a843678abf5f61979c748687e66b
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * CDDL HEADER START
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * The contents of this file are subject to the terms of the
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Common Development and Distribution License (the "License").
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * You may not use this file except in compliance with the License.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * or http://www.opensolaris.org/os/licensing.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * See the License for the specific language governing permissions
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * and limitations under the License.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * When distributing Covered Code, include this CDDL HEADER in each
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * If applicable, add the following below this CDDL HEADER, with the
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * fields enclosed by brackets "[]" replaced with your own identifying
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * information: Portions Copyright [yyyy] [name of copyright owner]
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * CDDL HEADER END
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Use is subject to license terms.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * OPL CMU-CH PCI nexus driver.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/types.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/sysmacros.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/systm.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/intreg.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/intr.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/machsystm.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/conf.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/stat.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/kmem.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/async.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/ivintr.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/sunddi.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/sunndi.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/ndifm.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/ontrap.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/ddi_impldefs.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/ddi_subrdefs.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/epm.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/spl.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/fm/util.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/fm/util.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/fm/protocol.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/fm/io/pci.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/fm/io/sun4upci.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/pcicmu/pcicmu.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/cmn_err.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/time.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/pci.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/modctl.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/open.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/errno.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#include <sys/file.h>
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint32_t pcmu_spurintr_duration = 60000000; /* One minute */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * The variable controls the default setting of the command register
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * for pci devices. See pcmu_init_child() for details.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * This flags also controls the setting of bits in the bridge control
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * register pci to pci bridges. See pcmu_init_child() for details.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterushort_t pcmu_command_default = PCI_COMM_SERR_ENABLE |
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCI_COMM_WAIT_CYC_ENAB |
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCI_COMM_PARITY_DETECT |
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCI_COMM_ME |
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCI_COMM_MAE |
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCI_COMM_IO;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * The following driver parameters are defined as variables to allow
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * patching for debugging and tuning. Flags that can be set on a per
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * PBM basis are bit fields where the PBM device instance number maps
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * to the bit position.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#ifdef DEBUG
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint64_t pcmu_debug_flags = 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#endif
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint_t ecc_error_intr_enable = 1;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint_t pcmu_ecc_afsr_retries = 100; /* XXX - what's a good value? */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint_t pcmu_intr_retry_intv = 5; /* for interrupt retry reg */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint_t pcmu_panic_on_fatal_errors = 1; /* should be 1 at beta */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterhrtime_t pcmu_intrpend_timeout = 5ll * NANOSEC; /* 5 seconds in nanoseconds */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint64_t pcmu_errtrig_pa = 0x0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * The following value is the number of consecutive unclaimed interrupts that
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * will be tolerated for a particular ino_p before the interrupt is deemed to
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * be jabbering and is blocked.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosteruint_t pcmu_unclaimed_intr_max = 20;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * function prototypes for dev ops routines:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_info(dev_info_t *dip, ddi_info_cmd_t infocmd,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster void *arg, void **result);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_open(dev_t *devp, int flags, int otyp, cred_t *credp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_close(dev_t dev, int flags, int otyp, cred_t *credp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_ioctl(dev_t dev, int cmd, intptr_t arg, int mode,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster cred_t *credp, int *rvalp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int flags, char *name, caddr_t valuep, int *lengthp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_ctlops_poke(pcmu_t *pcmu_p, peekpoke_ctlops_t *in_args);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_ctlops_peek(pcmu_t *pcmu_p, peekpoke_ctlops_t *in_args,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster void *result);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int map_pcmu_registers(pcmu_t *, dev_info_t *);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void unmap_pcmu_registers(pcmu_t *);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void pcmu_pbm_clear_error(pcmu_pbm_t *);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_ctlops(dev_info_t *, dev_info_t *, ddi_ctl_enum_t,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster void *, void *);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_map(dev_info_t *, dev_info_t *, ddi_map_req_t *,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster off_t, off_t, caddr_t *);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_intr_ops(dev_info_t *, dev_info_t *, ddi_intr_op_t,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_intr_handle_impl_t *, void *);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic uint32_t pcmu_identity_init(pcmu_t *pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_intr_setup(pcmu_t *pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void pcmu_pbm_errstate_get(pcmu_t *pcmu_p,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_pbm_errstate_t *pbm_err_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_obj_setup(pcmu_t *pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void pcmu_obj_destroy(pcmu_t *pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void pcmu_obj_resume(pcmu_t *pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void pcmu_obj_suspend(pcmu_t *pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void u2u_ittrans_init(pcmu_t *, u2u_ittrans_data_t **);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void u2u_ittrans_resume(u2u_ittrans_data_t **);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic void u2u_ittrans_uninit(u2u_ittrans_data_t *);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic pcmu_ksinfo_t *pcmu_name_kstat;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * bus ops and dev ops structures:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic struct bus_ops pcmu_bus_ops = {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster BUSO_REV,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_map,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster i_ddi_map_fault,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_ctlops,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_bus_prop_op,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ndi_busop_get_eventcookie, /* (*bus_get_eventcookie)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ndi_busop_add_eventcall, /* (*bus_add_eventcall)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ndi_busop_remove_eventcall, /* (*bus_remove_eventcall)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ndi_post_event, /* (*bus_post_event)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_intr_ctl)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_config)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_unconfig)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_fm_init)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_fm_fini)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_fm_access_enter)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_fm_access_fini)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* (*bus_power)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_intr_ops /* (*bus_intr_op)(); */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster};
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstruct cb_ops pcmu_cb_ops = {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_open, /* open */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_close, /* close */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* strategy */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* print */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* dump */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* read */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* write */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_ioctl, /* ioctl */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* devmap */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* mmap */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* segmap */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nochpoll, /* poll */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_prop_op, /* cb_prop_op */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster NULL, /* streamtab */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster CB_REV, /* rev */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev, /* int (*cb_aread)() */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev /* int (*cb_awrite)() */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster};
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic struct dev_ops pcmu_ops = {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster DEVO_REV,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_info,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nulldev,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_attach,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_detach,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster nodev,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster &pcmu_cb_ops,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster &pcmu_bus_ops,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster 0,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_quiesce_not_needed, /* quiesce */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster};
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * module definitions:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterextern struct mod_ops mod_driverops;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic struct modldrv modldrv = {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster &mod_driverops, /* Type of module - driver */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "OPL CMU-CH PCI Nexus driver", /* Name of module. */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster &pcmu_ops, /* driver ops */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster};
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic struct modlinkage modlinkage = {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster MODREV_1, (void *)&modldrv, NULL
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster};
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * driver global data:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fostervoid *per_pcmu_state; /* per-pbm soft state pointer */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterkmutex_t pcmu_global_mutex; /* attach/detach common struct lock */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fostererrorq_t *pcmu_ecc_queue = NULL; /* per-system ecc handling queue */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterextern void pcmu_child_cfg_save(dev_info_t *dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterextern void pcmu_child_cfg_restore(dev_info_t *dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterint
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster_init(void)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int e;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Initialize per-pci bus soft state pointer.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster e = ddi_soft_state_init(&per_pcmu_state, sizeof (pcmu_t), 1);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (e != 0)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (e);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Initialize global mutexes.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_init(&pcmu_global_mutex, NULL, MUTEX_DRIVER, NULL);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Create the performance kstats.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_kstat_init();
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Install the module.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster e = mod_install(&modlinkage);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (e != 0) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_soft_state_fini(&per_pcmu_state);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_destroy(&pcmu_global_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (e);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterint
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster_fini(void)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int e;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Remove the module.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster e = mod_remove(&modlinkage);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (e != 0) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (e);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Destroy pcmu_ecc_queue, and set it to NULL.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_ecc_queue) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster errorq_destroy(pcmu_ecc_queue);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_ecc_queue = NULL;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Destroy the performance kstats.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_kstat_fini();
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Free the per-pci and per-CMU-CH soft state info and destroy
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * mutex for per-CMU-CH soft state.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_soft_state_fini(&per_pcmu_state);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_destroy(&pcmu_global_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (e);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterint
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster_info(struct modinfo *modinfop)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (mod_info(&modlinkage, modinfop));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*ARGSUSED*/
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int instance = getminor((dev_t)arg) >> 8;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p = get_pcmu_soft_state(instance);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (infocmd) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INFO_DEVT2INSTANCE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *result = (void *)(uintptr_t)instance;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INFO_DEVT2DEVINFO:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p == NULL)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *result = (void *)pcmu_p->pcmu_dip;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster default:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/* device driver entry points */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * attach entry point:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int instance = ddi_get_instance(dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (cmd) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_ATTACH:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_ATTACH, dip, "DDI_ATTACH\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Allocate and get the per-pci soft state structure.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (alloc_pcmu_soft_state(instance) != DDI_SUCCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster cmn_err(CE_WARN, "%s%d: can't allocate pci state",
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_driver_name(dip), instance);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster goto err_bad_pcmu_softstate;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p = get_pcmu_soft_state(instance);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_dip = dip;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_init(&pcmu_p->pcmu_mutex, NULL, MUTEX_DRIVER, NULL);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_soft_state = PCMU_SOFT_STATE_CLOSED;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_open_count = 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Get key properties of the pci bridge node.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (get_pcmu_properties(pcmu_p, dip) == DDI_FAILURE) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster goto err_bad_pcmu_prop;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Map in the registers.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (map_pcmu_registers(pcmu_p, dip) == DDI_FAILURE) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster goto err_bad_reg_prop;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_obj_setup(pcmu_p) != DDI_SUCCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster goto err_bad_objs;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (ddi_create_minor_node(dip, "devctl", S_IFCHR,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster (uint_t)instance<<8 | 0xff,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster DDI_NT_NEXUS, 0) != DDI_SUCCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster goto err_bad_devctl_node;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Due to unresolved hardware issues, disable PCIPM until
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * the problem is fully understood.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * pcmu_pwr_setup(pcmu_p, dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_report_dev(dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_state = PCMU_ATTACHED;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_ATTACH, dip, "attach success\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fostererr_bad_objs:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_remove_minor_node(dip, "devctl");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fostererr_bad_devctl_node:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster unmap_pcmu_registers(pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fostererr_bad_reg_prop:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster free_pcmu_properties(pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fostererr_bad_pcmu_prop:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_destroy(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster free_pcmu_soft_state(instance);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fostererr_bad_pcmu_softstate:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_RESUME:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_ATTACH, dip, "DDI_RESUME\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Make sure the CMU-CH control registers
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * are configured properly.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p = get_pcmu_soft_state(instance);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_enter(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Make sure this instance has been suspended.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p->pcmu_state != PCMU_SUSPENDED) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_ATTACH, dip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "instance NOT suspended\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_obj_resume(pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_state = PCMU_ATTACHED;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_child_cfg_restore(dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster default:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_ATTACH, dip, "unsupported attach op\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * detach entry point:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int instance = ddi_get_instance(dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p = get_pcmu_soft_state(instance);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int len;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Make sure we are currently attached
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p->pcmu_state != PCMU_ATTACHED) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_ATTACH, dip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "failed - instance not attached\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_enter(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (cmd) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_DETACH:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_DETACH, dip, "DDI_DETACH\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_obj_destroy(pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Free the pci soft state structure and the rest of the
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * resources it's using.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster free_pcmu_properties(pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster unmap_pcmu_registers(pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_destroy(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster free_pcmu_soft_state(instance);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* Free the interrupt-priorities prop if we created it. */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (ddi_getproplen(DDI_DEV_T_ANY, dip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster DDI_PROP_NOTPROM | DDI_PROP_DONTPASS,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "interrupt-priorities", &len) == DDI_PROP_SUCCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster (void) ddi_prop_remove(DDI_DEV_T_NONE, dip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "interrupt-priorities");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_SUSPEND:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_child_cfg_save(dip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_obj_suspend(pcmu_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_state = PCMU_SUSPENDED;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster default:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_DETACH, dip, "unsupported detach op\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/* ARGSUSED3 */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_open(dev_t *devp, int flags, int otyp, cred_t *credp)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (otyp != OTYP_CHR) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (EINVAL);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Get the soft state structure for the device.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p = DEV_TO_SOFTSTATE(*devp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p == NULL) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (ENXIO);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Handle the open by tracking the device state.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG2(PCMU_DBG_OPEN, pcmu_p->pcmu_dip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "devp=%x: flags=%x\n", devp, flags);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_enter(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (flags & FEXCL) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p->pcmu_soft_state != PCMU_SOFT_STATE_CLOSED) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_OPEN, pcmu_p->pcmu_dip, "busy\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (EBUSY);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_soft_state = PCMU_SOFT_STATE_OPEN_EXCL;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster } else {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p->pcmu_soft_state == PCMU_SOFT_STATE_OPEN_EXCL) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_OPEN, pcmu_p->pcmu_dip, "busy\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (EBUSY);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_soft_state = PCMU_SOFT_STATE_OPEN;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_open_count++;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (0);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/* ARGSUSED */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_close(dev_t dev, int flags, int otyp, cred_t *credp)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (otyp != OTYP_CHR) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (EINVAL);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p = DEV_TO_SOFTSTATE(dev);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p == NULL) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (ENXIO);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG2(PCMU_DBG_CLOSE, pcmu_p->pcmu_dip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "dev=%x: flags=%x\n", dev, flags);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_enter(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_soft_state = PCMU_SOFT_STATE_CLOSED;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p->pcmu_open_count = 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcmu_p->pcmu_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (0);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/* ARGSUSED */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_ioctl(dev_t dev, int cmd, intptr_t arg, int mode,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster cred_t *credp, int *rvalp)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster dev_info_t *dip;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster struct devctl_iocdata *dcp;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster uint_t bus_state;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int rv = 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_p = DEV_TO_SOFTSTATE(dev);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (pcmu_p == NULL) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (ENXIO);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster dip = pcmu_p->pcmu_dip;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG2(PCMU_DBG_IOCTL, dip, "dev=%x: cmd=%x\n", dev, cmd);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * We can use the generic implementation for these ioctls
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (cmd) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_DEVICE_GETSTATE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_DEVICE_ONLINE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_DEVICE_OFFLINE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_BUS_GETSTATE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (ndi_devctl_ioctl(dip, cmd, arg, mode, 0));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * read devctl ioctl data
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (EFAULT);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (cmd) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_DEVICE_RESET:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_IOCTL, dip, "DEVCTL_DEVICE_RESET\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rv = ENOTSUP;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_BUS_QUIESCE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_IOCTL, dip, "DEVCTL_BUS_QUIESCE\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (bus_state == BUS_QUIESCED) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster (void) ndi_set_bus_state(dip, BUS_QUIESCED);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_BUS_UNQUIESCE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_IOCTL, dip, "DEVCTL_BUS_UNQUIESCE\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (bus_state == BUS_ACTIVE) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster (void) ndi_set_bus_state(dip, BUS_ACTIVE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_BUS_RESET:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_IOCTL, dip, "DEVCTL_BUS_RESET\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rv = ENOTSUP;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DEVCTL_BUS_RESETALL:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_IOCTL, dip, "DEVCTL_BUS_RESETALL\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rv = ENOTSUP;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster default:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rv = ENOTTY;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ndi_dc_freehdl(dcp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (rv);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int pcmu_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int flags, char *name, caddr_t valuep, int *lengthp)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (ddi_prop_op(dev, dip, prop_op, flags, name, valuep, lengthp));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/* bus driver entry points */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * bus map entry point:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * if map request is for an rnumber
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * get the corresponding regspec from device node
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * build a new regspec in our parent's format
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * build a new map_req with the new regspec
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * call up the tree to complete the mapping
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster off_t off, off_t len, caddr_t *addrp)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p = get_pcmu_soft_state(ddi_get_instance(dip));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster struct regspec p_regspec;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_map_req_t p_mapreq;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int reglen, rval, r_no;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pci_regspec_t reloc_reg, *rp = &reloc_reg;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG2(PCMU_DBG_MAP, dip, "rdip=%s%d:",
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_driver_name(rdip), ddi_get_instance(rdip));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (mp->map_flags & DDI_MF_USER_MAPPING) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_ME_UNIMPLEMENTED);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (mp->map_type) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_MT_REGSPEC:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster reloc_reg = *(pci_regspec_t *)mp->map_obj.rp; /* dup whole */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_MT_RNUMBER:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster r_no = mp->map_obj.rnumber;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG1(PCMU_DBG_MAP | PCMU_DBG_CONT, dip, " r#=%x", r_no);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (ddi_getlongprop(DDI_DEV_T_NONE, rdip, DDI_PROP_DONTPASS,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "reg", (caddr_t)&rp, &reglen) != DDI_SUCCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_ME_RNUMBER_RANGE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (r_no < 0 || r_no >= reglen / sizeof (pci_regspec_t)) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster kmem_free(rp, reglen);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_ME_RNUMBER_RANGE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rp += r_no;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster default:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_ME_INVAL);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG0(PCMU_DBG_MAP | PCMU_DBG_CONT, dip, "\n");
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* use "assigned-addresses" to relocate regspec within pci space */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (rval = pcmu_reloc_reg(dip, rdip, pcmu_p, rp)) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster goto done;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* adjust regspec according to mapping request */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (len) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rp->pci_size_low = (uint_t)len;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rp->pci_phys_low += off;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* use "ranges" to translate relocated pci regspec into parent space */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (rval = pcmu_xlate_reg(pcmu_p, rp, &p_regspec)) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster goto done;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster p_mapreq = *mp; /* dup the whole structure */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster p_mapreq.map_type = DDI_MT_REGSPEC;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster p_mapreq.map_obj.rp = &p_regspec;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster rval = ddi_map(dip, &p_mapreq, 0, 0, addrp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterdone:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (mp->map_type == DDI_MT_RNUMBER) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster kmem_free(rp - r_no, reglen);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (rval);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#ifdef DEBUG
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterint pcmu_peekfault_cnt = 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterint pcmu_pokefault_cnt = 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#endif /* DEBUG */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_do_poke(pcmu_t *pcmu_p, peekpoke_ctlops_t *in_args)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_pbm_t *pcbm_p = pcmu_p->pcmu_pcbm_p;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int err = DDI_SUCCESS;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster on_trap_data_t otd;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_enter(&pcbm_p->pcbm_pokeflt_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcbm_p->pcbm_ontrap_data = &otd;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* Set up protected environment. */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (!on_trap(&otd, OT_DATA_ACCESS)) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster uintptr_t tramp = otd.ot_trampoline;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster otd.ot_trampoline = (uintptr_t)&poke_fault;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster err = do_poke(in_args->size, (void *)in_args->dev_addr,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster (void *)in_args->host_addr);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster otd.ot_trampoline = tramp;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster } else {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster err = DDI_FAILURE;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Read the async fault register for the PBM to see it sees
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * a master-abort.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_pbm_clear_error(pcbm_p);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (otd.ot_trap & OT_DATA_ACCESS) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster err = DDI_FAILURE;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* Take down protected environment. */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster no_trap();
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcbm_p->pcbm_ontrap_data = NULL;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster mutex_exit(&pcbm_p->pcbm_pokeflt_mutex);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#ifdef DEBUG
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (err == DDI_FAILURE)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_pokefault_cnt++;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#endif
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (err);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_ctlops_poke(pcmu_t *pcmu_p, peekpoke_ctlops_t *in_args)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (pcmu_do_poke(pcmu_p, in_args));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/* ARGSUSED */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_do_peek(pcmu_t *pcmu_p, peekpoke_ctlops_t *in_args)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int err = DDI_SUCCESS;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster on_trap_data_t otd;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (!on_trap(&otd, OT_DATA_ACCESS)) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster uintptr_t tramp = otd.ot_trampoline;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster otd.ot_trampoline = (uintptr_t)&peek_fault;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster err = do_peek(in_args->size, (void *)in_args->dev_addr,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster (void *)in_args->host_addr);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster otd.ot_trampoline = tramp;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster } else
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster err = DDI_FAILURE;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster no_trap();
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#ifdef DEBUG
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster if (err == DDI_FAILURE)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_peekfault_cnt++;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster#endif
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (err);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_ctlops_peek(pcmu_t *pcmu_p, peekpoke_ctlops_t *in_args, void *result)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster result = (void *)in_args->host_addr;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (pcmu_do_peek(pcmu_p, in_args));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * control ops entry point:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Requests handled completely:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_INITCHILD see pcmu_init_child() for details
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_UNINITCHILD
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_REPORTDEV see report_dev() for details
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_XLATE_INTRS nothing to do
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_IOMIN cache line size if streaming otherwise 1
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_REGSIZE
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_NREGS
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_NINTRS
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_DVMAPAGESIZE
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_POKE
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_PEEK
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_QUIESCE
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * DDI_CTLOPS_UNQUIESCE
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * All others passed to parent.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_ctlops(dev_info_t *dip, dev_info_t *rdip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_ctl_enum_t op, void *arg, void *result)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p = get_pcmu_soft_state(ddi_get_instance(dip));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (op) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_INITCHILD:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (pcmu_init_child(pcmu_p, (dev_info_t *)arg));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_UNINITCHILD:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (pcmu_uninit_child(pcmu_p, (dev_info_t *)arg));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_REPORTDEV:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (pcmu_report_dev(rdip));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_IOMIN:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * If we are using the streaming cache, align at
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * least on a cache line boundary. Otherwise use
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * whatever alignment is passed in.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_REGSIZE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *((off_t *)result) = pcmu_get_reg_set_size(rdip, *((int *)arg));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_NREGS:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *((uint_t *)result) = pcmu_get_nreg_set(rdip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_DVMAPAGESIZE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *((ulong_t *)result) = 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_SUCCESS);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_POKE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (pcmu_ctlops_poke(pcmu_p, (peekpoke_ctlops_t *)arg));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_PEEK:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (pcmu_ctlops_peek(pcmu_p, (peekpoke_ctlops_t *)arg,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster result));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_AFFINITY:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_QUIESCE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_CTLOPS_UNQUIESCE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (DDI_FAILURE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster default:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster }
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /*
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster * Now pass the request up to our parent.
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_DBG2(PCMU_DBG_CTLOPS, dip,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster "passing request to parent: rdip=%s%d\n",
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_driver_name(rdip), ddi_get_instance(rdip));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster return (ddi_ctlops(dip, rdip, op, arg, result));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster}
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster/* ARGSUSED */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterstatic int
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Fosterpcmu_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ddi_intr_handle_impl_t *hdlp, void *result)
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster{
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster pcmu_t *pcmu_p = get_pcmu_soft_state(ddi_get_instance(dip));
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster int ret = DDI_SUCCESS;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster switch (intr_op) {
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_GETCAP:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* GetCap will always fail for all non PCI devices */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster (void) pci_intx_get_cap(rdip, (int *)result);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_SETCAP:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = DDI_ENOTSUP;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_ALLOC:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *(int *)result = hdlp->ih_scratch1;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_FREE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_GETPRI:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *(int *)result = hdlp->ih_pri ? hdlp->ih_pri : 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_SETPRI:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_ADDISR:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = pcmu_add_intr(dip, rdip, hdlp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_REMISR:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = pcmu_remove_intr(dip, rdip, hdlp);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_ENABLE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = pcmu_ib_update_intr_state(pcmu_p, rdip, hdlp,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_INTR_STATE_ENABLE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_DISABLE:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = pcmu_ib_update_intr_state(pcmu_p, rdip, hdlp,
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster PCMU_INTR_STATE_DISABLE);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_SETMASK:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = pci_intx_set_mask(rdip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_CLRMASK:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = pci_intx_clr_mask(rdip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_GETPENDING:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster ret = pci_intx_get_pending(rdip, (int *)result);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_NINTRS:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_NAVAIL:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *(int *)result = i_ddi_get_intx_nintrs(rdip);
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster case DDI_INTROP_SUPPORTED_TYPES:
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster /* PCI nexus driver supports only fixed interrupts */
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster *(int *)result = i_ddi_get_intx_nintrs(rdip) ?
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster DDI_INTR_TYPE_FIXED : 0;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster break;
a688bcbb4bcff5398fdd29b86f83450257dc0df4Allan Foster default:
ret = DDI_ENOTSUP;
break;
}
return (ret);
}
/*
* CMU-CH specifics implementation:
* interrupt mapping register
* PBM configuration
* ECC and PBM error handling
*/
/* called by pcmu_attach() DDI_ATTACH to initialize pci objects */
static int
pcmu_obj_setup(pcmu_t *pcmu_p)
{
int ret;
mutex_enter(&pcmu_global_mutex);
pcmu_p->pcmu_rev = ddi_prop_get_int(DDI_DEV_T_ANY, pcmu_p->pcmu_dip,
DDI_PROP_DONTPASS, "module-revision#", 0);
pcmu_ib_create(pcmu_p);
pcmu_cb_create(pcmu_p);
pcmu_ecc_create(pcmu_p);
pcmu_pbm_create(pcmu_p);
pcmu_err_create(pcmu_p);
if ((ret = pcmu_intr_setup(pcmu_p)) != DDI_SUCCESS)
goto done;
/*
* Due to a hardware bug, do not create kstat for DC systems
* with PCI hw revision less than 5.
*/
if ((strncmp(ddi_binding_name(pcmu_p->pcmu_dip),
PCICMU_OPL_DC_BINDING_NAME, strlen(PCICMU_OPL_DC_BINDING_NAME))
!= 0) || (pcmu_p->pcmu_rev > 4)) {
pcmu_kstat_create(pcmu_p);
}
done:
mutex_exit(&pcmu_global_mutex);
if (ret != DDI_SUCCESS) {
cmn_err(CE_NOTE, "Interrupt register failure, returning 0x%x\n",
ret);
}
return (ret);
}
/* called by pcmu_detach() DDI_DETACH to destroy pci objects */
static void
pcmu_obj_destroy(pcmu_t *pcmu_p)
{
mutex_enter(&pcmu_global_mutex);
pcmu_kstat_destroy(pcmu_p);
pcmu_pbm_destroy(pcmu_p);
pcmu_err_destroy(pcmu_p);
pcmu_ecc_destroy(pcmu_p);
pcmu_cb_destroy(pcmu_p);
pcmu_ib_destroy(pcmu_p);
pcmu_intr_teardown(pcmu_p);
mutex_exit(&pcmu_global_mutex);
}
/* called by pcmu_attach() DDI_RESUME to (re)initialize pci objects */
static void
pcmu_obj_resume(pcmu_t *pcmu_p)
{
mutex_enter(&pcmu_global_mutex);
pcmu_ib_configure(pcmu_p->pcmu_ib_p);
pcmu_ecc_configure(pcmu_p);
pcmu_ib_resume(pcmu_p->pcmu_ib_p);
u2u_ittrans_resume((u2u_ittrans_data_t **)
&(pcmu_p->pcmu_cb_p->pcb_ittrans_cookie));
pcmu_pbm_configure(pcmu_p->pcmu_pcbm_p);
pcmu_cb_resume(pcmu_p->pcmu_cb_p);
pcmu_pbm_resume(pcmu_p->pcmu_pcbm_p);
mutex_exit(&pcmu_global_mutex);
}
/* called by pcmu_detach() DDI_SUSPEND to suspend pci objects */
static void
pcmu_obj_suspend(pcmu_t *pcmu_p)
{
mutex_enter(&pcmu_global_mutex);
pcmu_pbm_suspend(pcmu_p->pcmu_pcbm_p);
pcmu_ib_suspend(pcmu_p->pcmu_ib_p);
pcmu_cb_suspend(pcmu_p->pcmu_cb_p);
mutex_exit(&pcmu_global_mutex);
}
static int
pcmu_intr_setup(pcmu_t *pcmu_p)
{
dev_info_t *dip = pcmu_p->pcmu_dip;
pcmu_pbm_t *pcbm_p = pcmu_p->pcmu_pcbm_p;
pcmu_cb_t *pcb_p = pcmu_p->pcmu_cb_p;
int i, no_of_intrs;
/*
* Get the interrupts property.
*/
if (ddi_getlongprop(DDI_DEV_T_NONE, dip, DDI_PROP_DONTPASS,
"interrupts", (caddr_t)&pcmu_p->pcmu_inos,
&pcmu_p->pcmu_inos_len) != DDI_SUCCESS) {
cmn_err(CE_PANIC, "%s%d: no interrupts property\n",
ddi_driver_name(dip), ddi_get_instance(dip));
}
/*
* figure out number of interrupts in the "interrupts" property
* and convert them all into ino.
*/
i = ddi_getprop(DDI_DEV_T_ANY, dip, 0, "#interrupt-cells", 1);
i = CELLS_1275_TO_BYTES(i);
no_of_intrs = pcmu_p->pcmu_inos_len / i;
for (i = 0; i < no_of_intrs; i++) {
pcmu_p->pcmu_inos[i] =
PCMU_IB_MONDO_TO_INO(pcmu_p->pcmu_inos[i]);
}
pcb_p->pcb_no_of_inos = no_of_intrs;
if (i = pcmu_ecc_register_intr(pcmu_p)) {
goto teardown;
}
intr_dist_add(pcmu_cb_intr_dist, pcb_p);
pcmu_ecc_enable_intr(pcmu_p);
if (i = pcmu_pbm_register_intr(pcbm_p)) {
intr_dist_rem(pcmu_cb_intr_dist, pcb_p);
goto teardown;
}
intr_dist_add(pcmu_pbm_intr_dist, pcbm_p);
pcmu_ib_intr_enable(pcmu_p, pcmu_p->pcmu_inos[CBNINTR_PBM]);
intr_dist_add_weighted(pcmu_ib_intr_dist_all, pcmu_p->pcmu_ib_p);
return (DDI_SUCCESS);
teardown:
pcmu_intr_teardown(pcmu_p);
return (i);
}
/*
* pcmu_fix_ranges - fixes the config space entry of the "ranges"
* property on CMU-CH platforms
*/
void
pcmu_fix_ranges(pcmu_ranges_t *rng_p, int rng_entries)
{
int i;
for (i = 0; i < rng_entries; i++, rng_p++) {
if ((rng_p->child_high & PCI_REG_ADDR_M) == PCI_ADDR_CONFIG)
rng_p->parent_low |= rng_p->child_high;
}
}
/*
* map_pcmu_registers
*
* This function is called from the attach routine to map the registers
* accessed by this driver.
*
* used by: pcmu_attach()
*
* return value: DDI_FAILURE on failure
*/
static int
map_pcmu_registers(pcmu_t *pcmu_p, dev_info_t *dip)
{
ddi_device_acc_attr_t attr;
attr.devacc_attr_version = DDI_DEVICE_ATTR_V0;
attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC;
attr.devacc_attr_endian_flags = DDI_NEVERSWAP_ACC;
if (ddi_regs_map_setup(dip, 0, &pcmu_p->pcmu_address[0], 0, 0,
&attr, &pcmu_p->pcmu_ac[0]) != DDI_SUCCESS) {
cmn_err(CE_WARN, "%s%d: unable to map reg entry 0\n",
ddi_driver_name(dip), ddi_get_instance(dip));
return (DDI_FAILURE);
}
/*
* We still use pcmu_address[2]
*/
if (ddi_regs_map_setup(dip, 2, &pcmu_p->pcmu_address[2], 0, 0,
&attr, &pcmu_p->pcmu_ac[2]) != DDI_SUCCESS) {
cmn_err(CE_WARN, "%s%d: unable to map reg entry 2\n",
ddi_driver_name(dip), ddi_get_instance(dip));
ddi_regs_map_free(&pcmu_p->pcmu_ac[0]);
return (DDI_FAILURE);
}
/*
* The second register set contains the bridge's configuration
* header. This header is at the very beginning of the bridge's
* configuration space. This space has litte-endian byte order.
*/
attr.devacc_attr_endian_flags = DDI_STRUCTURE_LE_ACC;
if (ddi_regs_map_setup(dip, 1, &pcmu_p->pcmu_address[1], 0,
PCI_CONF_HDR_SIZE, &attr, &pcmu_p->pcmu_ac[1]) != DDI_SUCCESS) {
cmn_err(CE_WARN, "%s%d: unable to map reg entry 1\n",
ddi_driver_name(dip), ddi_get_instance(dip));
ddi_regs_map_free(&pcmu_p->pcmu_ac[0]);
return (DDI_FAILURE);
}
PCMU_DBG2(PCMU_DBG_ATTACH, dip, "address (%p,%p)\n",
pcmu_p->pcmu_address[0], pcmu_p->pcmu_address[1]);
return (DDI_SUCCESS);
}
/*
* unmap_pcmu_registers:
*
* This routine unmap the registers mapped by map_pcmu_registers.
*
* used by: pcmu_detach()
*
* return value: none
*/
static void
unmap_pcmu_registers(pcmu_t *pcmu_p)
{
ddi_regs_map_free(&pcmu_p->pcmu_ac[0]);
ddi_regs_map_free(&pcmu_p->pcmu_ac[1]);
ddi_regs_map_free(&pcmu_p->pcmu_ac[2]);
}
/*
* These convenience wrappers relies on map_pcmu_registers() to setup
* pcmu_address[0-2] correctly at first.
*/
static uintptr_t
get_reg_base(pcmu_t *pcmu_p)
{
return ((uintptr_t)pcmu_p->pcmu_address[2]);
}
/* The CMU-CH config reg base is always the 2nd reg entry */
static uintptr_t
get_config_reg_base(pcmu_t *pcmu_p)
{
return ((uintptr_t)(pcmu_p->pcmu_address[1]));
}
uint64_t
ib_get_map_reg(pcmu_ib_mondo_t mondo, uint32_t cpu_id)
{
return ((mondo) | (cpu_id << PCMU_INTR_MAP_REG_TID_SHIFT) |
PCMU_INTR_MAP_REG_VALID);
}
uint32_t
ib_map_reg_get_cpu(volatile uint64_t reg)
{
return ((reg & PCMU_INTR_MAP_REG_TID) >>
PCMU_INTR_MAP_REG_TID_SHIFT);
}
uint64_t *
ib_intr_map_reg_addr(pcmu_ib_t *pib_p, pcmu_ib_ino_t ino)
{
uint64_t *addr;
ASSERT(ino & 0x20);
addr = (uint64_t *)(pib_p->pib_obio_intr_map_regs +
(((uint_t)ino & 0x1f) << 3));
return (addr);
}
uint64_t *
ib_clear_intr_reg_addr(pcmu_ib_t *pib_p, pcmu_ib_ino_t ino)
{
uint64_t *addr;
ASSERT(ino & 0x20);
addr = (uint64_t *)(pib_p->pib_obio_clear_intr_regs +
(((uint_t)ino & 0x1f) << 3));
return (addr);
}
uintptr_t
pcmu_ib_setup(pcmu_ib_t *pib_p)
{
pcmu_t *pcmu_p = pib_p->pib_pcmu_p;
uintptr_t a = get_reg_base(pcmu_p);
pib_p->pib_ign = PCMU_ID_TO_IGN(pcmu_p->pcmu_id);
pib_p->pib_max_ino = PCMU_MAX_INO;
pib_p->pib_obio_intr_map_regs = a + PCMU_IB_OBIO_INTR_MAP_REG_OFFSET;
pib_p->pib_obio_clear_intr_regs =
a + PCMU_IB_OBIO_CLEAR_INTR_REG_OFFSET;
return (a);
}
/*
* Return the cpuid to to be used for an ino.
*
* On multi-function pci devices, functions have separate devinfo nodes and
* interrupts.
*
* This function determines if there is already an established slot-oriented
* interrupt-to-cpu binding established, if there is then it returns that
* cpu. Otherwise a new cpu is selected by intr_dist_cpuid().
*
* The devinfo node we are trying to associate a cpu with is
* ino_p->pino_ih_head->ih_dip.
*/
uint32_t
pcmu_intr_dist_cpuid(pcmu_ib_t *pib_p, pcmu_ib_ino_info_t *ino_p)
{
dev_info_t *rdip = ino_p->pino_ih_head->ih_dip;
dev_info_t *prdip = ddi_get_parent(rdip);
pcmu_ib_ino_info_t *sino_p;
dev_info_t *sdip;
dev_info_t *psdip;
char *buf1 = NULL, *buf2 = NULL;
char *s1, *s2, *s3;
int l2;
int cpu_id;
/* must be CMU-CH driver parent (not ebus) */
if (strcmp(ddi_driver_name(prdip), "pcicmu") != 0)
goto newcpu;
/*
* From PCI 1275 binding: 2.2.1.3 Unit Address representation:
* Since the "unit-number" is the address that appears in on Open
* Firmware 'device path', it follows that only the DD and DD,FF
* forms of the text representation can appear in a 'device path'.
*
* The rdip unit address is of the form "DD[,FF]". Define two
* unit address strings that represent same-slot use: "DD" and "DD,".
* The first compare uses strcmp, the second uses strncmp.
*/
s1 = ddi_get_name_addr(rdip);
if (s1 == NULL) {
goto newcpu;
}
buf1 = kmem_alloc(MAXNAMELEN, KM_SLEEP); /* strcmp */
buf2 = kmem_alloc(MAXNAMELEN, KM_SLEEP); /* strncmp */
s1 = strcpy(buf1, s1);
s2 = strcpy(buf2, s1);
s1 = strrchr(s1, ',');
if (s1) {
*s1 = '\0'; /* have "DD,FF" */
s1 = buf1; /* search via strcmp "DD" */
s2 = strrchr(s2, ',');
*(s2 + 1) = '\0';
s2 = buf2;
l2 = strlen(s2); /* search via strncmp "DD," */
} else {
(void) strcat(s2, ","); /* have "DD" */
l2 = strlen(s2); /* search via strncmp "DD," */
}
/*
* Search the established ino list for devinfo nodes bound
* to an ino that matches one of the slot use strings.
*/
ASSERT(MUTEX_HELD(&pib_p->pib_ino_lst_mutex));
for (sino_p = pib_p->pib_ino_lst; sino_p; sino_p = sino_p->pino_next) {
/* skip self and non-established */
if ((sino_p == ino_p) || (sino_p->pino_established == 0))
continue;
/* skip non-siblings */
sdip = sino_p->pino_ih_head->ih_dip;
psdip = ddi_get_parent(sdip);
if (psdip != prdip)
continue;
/* must be CMU-CH driver parent (not ebus) */
if (strcmp(ddi_driver_name(psdip), "pcicmu") != 0)
continue;
s3 = ddi_get_name_addr(sdip);
if ((s1 && (strcmp(s1, s3) == 0)) ||
(strncmp(s2, s3, l2) == 0)) {
extern int intr_dist_debug;
if (intr_dist_debug) {
cmn_err(CE_CONT, "intr_dist: "
"pcicmu`pcmu_intr_dist_cpuid "
"%s#%d %s: cpu %d established "
"by %s#%d %s\n", ddi_driver_name(rdip),
ddi_get_instance(rdip),
ddi_deviname(rdip, buf1),
sino_p->pino_cpuid,
ddi_driver_name(sdip),
ddi_get_instance(sdip),
ddi_deviname(sdip, buf2));
}
break;
}
}
/* If a slot use match is found then use established cpu */
if (sino_p) {
cpu_id = sino_p->pino_cpuid; /* target established cpu */
goto out;
}
newcpu: cpu_id = intr_dist_cpuid(); /* target new cpu */
out: if (buf1)
kmem_free(buf1, MAXNAMELEN);
if (buf2)
kmem_free(buf2, MAXNAMELEN);
return (cpu_id);
}
void
pcmu_cb_teardown(pcmu_t *pcmu_p)
{
pcmu_cb_t *pcb_p = pcmu_p->pcmu_cb_p;
u2u_ittrans_uninit((u2u_ittrans_data_t *)pcb_p->pcb_ittrans_cookie);
}
int
pcmu_ecc_add_intr(pcmu_t *pcmu_p, int inum, pcmu_ecc_intr_info_t *eii_p)
{
uint32_t mondo;
mondo = ((pcmu_p->pcmu_cb_p->pcb_ign << PCMU_INO_BITS) |
pcmu_p->pcmu_inos[inum]);
VERIFY(add_ivintr(mondo, pcmu_pil[inum], (intrfunc)pcmu_ecc_intr,
(caddr_t)eii_p, NULL, NULL) == 0);
return (PCMU_ATTACH_RETCODE(PCMU_ECC_OBJ,
PCMU_OBJ_INTR_ADD, DDI_SUCCESS));
}
/* ARGSUSED */
void
pcmu_ecc_rem_intr(pcmu_t *pcmu_p, int inum, pcmu_ecc_intr_info_t *eii_p)
{
uint32_t mondo;
mondo = ((pcmu_p->pcmu_cb_p->pcb_ign << PCMU_INO_BITS) |
pcmu_p->pcmu_inos[inum]);
VERIFY(rem_ivintr(mondo, pcmu_pil[inum]) == 0);
}
void
pcmu_pbm_configure(pcmu_pbm_t *pcbm_p)
{
pcmu_t *pcmu_p = pcbm_p->pcbm_pcmu_p;
dev_info_t *dip = pcmu_p->pcmu_dip;
#define pbm_err ((PCMU_PCI_AFSR_E_MASK << PCMU_PCI_AFSR_PE_SHIFT) | \
(PCMU_PCI_AFSR_E_MASK << PCMU_PCI_AFSR_SE_SHIFT))
#define csr_err (PCI_STAT_PERROR | PCI_STAT_S_PERROR | \
PCI_STAT_R_MAST_AB | PCI_STAT_R_TARG_AB | \
PCI_STAT_S_TARG_AB | PCI_STAT_S_PERROR)
/*
* Clear any PBM errors.
*/
*pcbm_p->pcbm_async_flt_status_reg = pbm_err;
/*
* Clear error bits in configuration status register.
*/
PCMU_DBG1(PCMU_DBG_ATTACH, dip,
"pcmu_pbm_configure: conf status reg=%x\n", csr_err);
pcbm_p->pcbm_config_header->ch_status_reg = csr_err;
PCMU_DBG1(PCMU_DBG_ATTACH, dip,
"pcmu_pbm_configure: conf status reg==%x\n",
pcbm_p->pcbm_config_header->ch_status_reg);
(void) ndi_prop_update_int(DDI_DEV_T_ANY, dip, "latency-timer",
(int)pcbm_p->pcbm_config_header->ch_latency_timer_reg);
#undef pbm_err
#undef csr_err
}
uint_t
pcmu_pbm_disable_errors(pcmu_pbm_t *pcbm_p)
{
pcmu_t *pcmu_p = pcbm_p->pcbm_pcmu_p;
pcmu_ib_t *pib_p = pcmu_p->pcmu_ib_p;
/*
* Disable error and streaming byte hole interrupts via the
* PBM control register.
*/
*pcbm_p->pcbm_ctrl_reg &= ~PCMU_PCI_CTRL_ERR_INT_EN;
/*
* Disable error interrupts via the interrupt mapping register.
*/
pcmu_ib_intr_disable(pib_p,
pcmu_p->pcmu_inos[CBNINTR_PBM], PCMU_IB_INTR_NOWAIT);
return (BF_NONE);
}
void
pcmu_cb_setup(pcmu_t *pcmu_p)
{
uint64_t csr, csr_pa, pa;
pcmu_cb_t *pcb_p = pcmu_p->pcmu_cb_p;
pcb_p->pcb_ign = PCMU_ID_TO_IGN(pcmu_p->pcmu_id);
pa = (uint64_t)hat_getpfnum(kas.a_hat, pcmu_p->pcmu_address[0]);
pcb_p->pcb_base_pa = pa = pa >> (32 - MMU_PAGESHIFT) << 32;
pcb_p->pcb_map_pa = pa + PCMU_IB_OBIO_INTR_MAP_REG_OFFSET;
pcb_p->pcb_clr_pa = pa + PCMU_IB_OBIO_CLEAR_INTR_REG_OFFSET;
pcb_p->pcb_obsta_pa = pa + PCMU_IB_OBIO_INTR_STATE_DIAG_REG;
csr_pa = pa + PCMU_CB_CONTROL_STATUS_REG_OFFSET;
csr = lddphysio(csr_pa);
/*
* Clear any pending address parity errors.
*/
if (csr & PCMU_CB_CONTROL_STATUS_APERR) {
csr |= PCMU_CB_CONTROL_STATUS_APERR;
cmn_err(CE_WARN, "clearing UPA address parity error\n");
}
csr |= PCMU_CB_CONTROL_STATUS_APCKEN;
csr &= ~PCMU_CB_CONTROL_STATUS_IAP;
stdphysio(csr_pa, csr);
u2u_ittrans_init(pcmu_p,
(u2u_ittrans_data_t **)&pcb_p->pcb_ittrans_cookie);
}
void
pcmu_ecc_setup(pcmu_ecc_t *pecc_p)
{
pecc_p->pecc_ue.pecc_errpndg_mask = 0;
pecc_p->pecc_ue.pecc_offset_mask = PCMU_ECC_UE_AFSR_DW_OFFSET;
pecc_p->pecc_ue.pecc_offset_shift = PCMU_ECC_UE_AFSR_DW_OFFSET_SHIFT;
pecc_p->pecc_ue.pecc_size_log2 = 3;
}
static uintptr_t
get_pbm_reg_base(pcmu_t *pcmu_p)
{
return ((uintptr_t)(pcmu_p->pcmu_address[0]));
}
void
pcmu_pbm_setup(pcmu_pbm_t *pcbm_p)
{
pcmu_t *pcmu_p = pcbm_p->pcbm_pcmu_p;
/*
* Get the base virtual address for the PBM control block.
*/
uintptr_t a = get_pbm_reg_base(pcmu_p);
/*
* Get the virtual address of the PCI configuration header.
* This should be mapped little-endian.
*/
pcbm_p->pcbm_config_header =
(config_header_t *)get_config_reg_base(pcmu_p);
/*
* Get the virtual addresses for control, error and diag
* registers.
*/
pcbm_p->pcbm_ctrl_reg = (uint64_t *)(a + PCMU_PCI_CTRL_REG_OFFSET);
pcbm_p->pcbm_diag_reg = (uint64_t *)(a + PCMU_PCI_DIAG_REG_OFFSET);
pcbm_p->pcbm_async_flt_status_reg =
(uint64_t *)(a + PCMU_PCI_ASYNC_FLT_STATUS_REG_OFFSET);
pcbm_p->pcbm_async_flt_addr_reg =
(uint64_t *)(a + PCMU_PCI_ASYNC_FLT_ADDR_REG_OFFSET);
}
/*ARGSUSED*/
void
pcmu_pbm_teardown(pcmu_pbm_t *pcbm_p)
{
}
int
pcmu_get_numproxy(dev_info_t *dip)
{
return (ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
"#upa-interrupt-proxies", 1));
}
int
pcmu_get_portid(dev_info_t *dip)
{
return (ddi_getprop(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
"portid", -1));
}
/*
* CMU-CH Performance Events.
*/
static pcmu_kev_mask_t
pcicmu_pcmu_events[] = {
{"pio_cycles_b", 0xf}, {"interrupts", 0x11},
{"upa_inter_nack", 0x12}, {"pio_reads", 0x13},
{"pio_writes", 0x14},
{"clear_pic", 0x1f}
};
/*
* Create the picN kstat's.
*/
void
pcmu_kstat_init()
{
pcmu_name_kstat = (pcmu_ksinfo_t *)kmem_alloc(sizeof (pcmu_ksinfo_t),
KM_NOSLEEP);
if (pcmu_name_kstat == NULL) {
cmn_err(CE_WARN, "pcicmu : no space for kstat\n");
} else {
pcmu_name_kstat->pic_no_evs =
sizeof (pcicmu_pcmu_events) / sizeof (pcmu_kev_mask_t);
pcmu_name_kstat->pic_shift[0] = PCMU_SHIFT_PIC0;
pcmu_name_kstat->pic_shift[1] = PCMU_SHIFT_PIC1;
pcmu_create_name_kstat("pcmup",
pcmu_name_kstat, pcicmu_pcmu_events);
}
}
/*
* Called from _fini()
*/
void
pcmu_kstat_fini()
{
if (pcmu_name_kstat != NULL) {
pcmu_delete_name_kstat(pcmu_name_kstat);
kmem_free(pcmu_name_kstat, sizeof (pcmu_ksinfo_t));
pcmu_name_kstat = NULL;
}
}
/*
* Create the performance 'counters' kstat.
*/
void
pcmu_add_upstream_kstat(pcmu_t *pcmu_p)
{
pcmu_cntr_pa_t *cntr_pa_p = &pcmu_p->pcmu_uks_pa;
uint64_t regbase = va_to_pa((void *)get_reg_base(pcmu_p));
cntr_pa_p->pcr_pa = regbase + PCMU_PERF_PCR_OFFSET;
cntr_pa_p->pic_pa = regbase + PCMU_PERF_PIC_OFFSET;
pcmu_p->pcmu_uksp = pcmu_create_cntr_kstat(pcmu_p, "pcmup",
NUM_OF_PICS, pcmu_cntr_kstat_pa_update, cntr_pa_p);
}
/*
* u2u_ittrans_init() is caled from in pci.c's pcmu_cb_setup() per CMU.
* Second argument "ittrans_cookie" is address of pcb_ittrans_cookie in
* pcb_p member. allocated interrupt block is returned in it.
*/
static void
u2u_ittrans_init(pcmu_t *pcmu_p, u2u_ittrans_data_t **ittrans_cookie)
{
u2u_ittrans_data_t *u2u_trans_p;
ddi_device_acc_attr_t attr;
int ret;
int board;
/*
* Allocate the data structure to support U2U's
* interrupt target translations.
*/
u2u_trans_p = (u2u_ittrans_data_t *)
kmem_zalloc(sizeof (u2u_ittrans_data_t), KM_SLEEP);
/*
* Get other properties, "board#"
*/
board = ddi_getprop(DDI_DEV_T_ANY, pcmu_p->pcmu_dip,
DDI_PROP_DONTPASS, "board#", -1);
u2u_trans_p->u2u_board = board;
if (board == -1) {
/* this cannot happen on production systems */
cmn_err(CE_PANIC, "u2u:Invalid property;board = %d", board);
}
/*
* Initialize interrupt target translations mutex.
*/
mutex_init(&(u2u_trans_p->u2u_ittrans_lock), "u2u_ittrans_lock",
MUTEX_DEFAULT, NULL);
/*
* Get U2U's registers space by ddi_regs_map_setup(9F)
*/
attr.devacc_attr_version = DDI_DEVICE_ATTR_V0;
attr.devacc_attr_dataorder = DDI_STRICTORDER_ACC;
attr.devacc_attr_endian_flags = DDI_NEVERSWAP_ACC;
ret = ddi_regs_map_setup(pcmu_p->pcmu_dip,
REGS_INDEX_OF_U2U, (caddr_t *)(&(u2u_trans_p->u2u_regs_base)),
0, 0, &attr, &(u2u_trans_p->u2u_acc));
/*
* check result of ddi_regs_map_setup().
*/
if (ret != DDI_SUCCESS) {
cmn_err(CE_PANIC, "u2u%d: registers map setup failed", board);
}
/*
* Read Port-id(1 byte) in u2u
*/
u2u_trans_p->u2u_port_id = *(volatile int32_t *)
(u2u_trans_p->u2u_regs_base + U2U_PID_REGISTER_OFFSET);
if (pcmu_p->pcmu_id != u2u_trans_p->u2u_port_id) {
cmn_err(CE_PANIC, "u2u%d: Invalid Port-ID", board);
}
*ittrans_cookie = u2u_trans_p;
}
/*
* u2u_ittras_resume() is called from pcmu_obj_resume() at DDI_RESUME entry.
*/
static void
u2u_ittrans_resume(u2u_ittrans_data_t **ittrans_cookie)
{
u2u_ittrans_data_t *u2u_trans_p;
u2u_ittrans_id_t *ittrans_id_p;
uintptr_t data_reg_addr;
int ix;
u2u_trans_p = *ittrans_cookie;
/*
* Set U2U Data Register
*/
for (ix = 0; ix < U2U_DATA_NUM; ix++) {
ittrans_id_p = &(u2u_trans_p->u2u_ittrans_id[ix]);
data_reg_addr = u2u_trans_p->u2u_regs_base +
U2U_DATA_REGISTER_OFFSET + (ix * sizeof (uint64_t));
if (ittrans_id_p->u2u_ino_map_reg == NULL) {
/* This index was not set */
continue;
}
*(volatile uint32_t *) (data_reg_addr) =
(uint32_t)ittrans_id_p->u2u_tgt_cpu_id;
}
}
/*
* u2u_ittras_uninit() is called from ib_destroy() at detach,
* or occuring error in attach.
*/
static void
u2u_ittrans_uninit(u2u_ittrans_data_t *ittrans_cookie)
{
if (ittrans_cookie == NULL) {
return; /* not support */
}
if (ittrans_cookie == (u2u_ittrans_data_t *)(-1)) {
return; /* illeagal case */
}
ddi_regs_map_free(&(ittrans_cookie->u2u_acc));
mutex_destroy(&(ittrans_cookie->u2u_ittrans_lock));
kmem_free((void *)ittrans_cookie, sizeof (u2u_ittrans_data_t));
}
/*
* This routine,u2u_translate_tgtid(, , cpu_id, pino_map_reg),
* searches index having same value of pino_map_reg, or empty.
* Then, stores cpu_id in a U2U Data Register as this index,
* and return this index.
*/
int
u2u_translate_tgtid(pcmu_t *pcmu_p, uint_t cpu_id,
volatile uint64_t *pino_map_reg)
{
int index = -1;
int ix;
int err_level; /* severity level for cmn_err */
u2u_ittrans_id_t *ittrans_id_p;
uintptr_t data_reg_addr;
u2u_ittrans_data_t *ittrans_cookie;
ittrans_cookie =
(u2u_ittrans_data_t *)(pcmu_p->pcmu_cb_p->pcb_ittrans_cookie);
if (ittrans_cookie == NULL) {
return (cpu_id);
}
if (ittrans_cookie == (u2u_ittrans_data_t *)(-1)) {
return (-1); /* illeagal case */
}
mutex_enter(&(ittrans_cookie->u2u_ittrans_lock));
/*
* Decide index No. of U2U Data registers in either
* already used by same pino_map_reg, or empty.
*/
for (ix = 0; ix < U2U_DATA_NUM; ix++) {
ittrans_id_p = &(ittrans_cookie->u2u_ittrans_id[ix]);
if (ittrans_id_p->u2u_ino_map_reg == pino_map_reg) {
/* already used this pino_map_reg */
index = ix;
break;
}
if (index == -1 &&
ittrans_id_p->u2u_ino_map_reg == NULL) {
index = ix;
}
}
if (index == -1) {
if (panicstr) {
err_level = CE_WARN;
} else {
err_level = CE_PANIC;
}
cmn_err(err_level, "u2u%d:No more U2U-Data regs!!",
ittrans_cookie->u2u_board);
return (cpu_id);
}
/*
* For U2U
* set cpu_id into u2u_data_reg by index.
* ((uint64_t)(u2u_regs_base
* + U2U_DATA_REGISTER_OFFSET))[index] = cpu_id;
*/
data_reg_addr = ittrans_cookie->u2u_regs_base
+ U2U_DATA_REGISTER_OFFSET
+ (index * sizeof (uint64_t));
/*
* Set cpu_id into U2U Data register[index]
*/
*(volatile uint32_t *) (data_reg_addr) = (uint32_t)cpu_id;
/*
* Setup for software, excepting at panicing.
* and rebooting, etc...?
*/
if (!panicstr) {
ittrans_id_p = &(ittrans_cookie->u2u_ittrans_id[index]);
ittrans_id_p->u2u_tgt_cpu_id = cpu_id;
ittrans_id_p->u2u_ino_map_reg = pino_map_reg;
}
mutex_exit(&(ittrans_cookie->u2u_ittrans_lock));
return (index);
}
/*
* u2u_ittrans_cleanup() is called from common_pcmu_ib_intr_disable()
* after called intr_rem_cpu(mondo).
*/
void
u2u_ittrans_cleanup(u2u_ittrans_data_t *ittrans_cookie,
volatile uint64_t *pino_map_reg)
{
int ix;
u2u_ittrans_id_t *ittrans_id_p;
if (ittrans_cookie == NULL) {
return;
}
if (ittrans_cookie == (u2u_ittrans_data_t *)(-1)) {
return; /* illeagal case */
}
mutex_enter(&(ittrans_cookie->u2u_ittrans_lock));
for (ix = 0; ix < U2U_DATA_NUM; ix++) {
ittrans_id_p = &(ittrans_cookie->u2u_ittrans_id[ix]);
if (ittrans_id_p->u2u_ino_map_reg == pino_map_reg) {
ittrans_id_p->u2u_ino_map_reg = NULL;
break;
}
}
mutex_exit(&(ittrans_cookie->u2u_ittrans_lock));
}
/*
* pcmu_ecc_classify, called by ecc_handler to classify ecc errors
* and determine if we should panic or not.
*/
void
pcmu_ecc_classify(uint64_t err, pcmu_ecc_errstate_t *ecc_err_p)
{
struct async_flt *ecc = &ecc_err_p->ecc_aflt;
/* LINTED */
pcmu_t *pcmu_p = ecc_err_p->ecc_ii_p.pecc_p->pecc_pcmu_p;
ASSERT(MUTEX_HELD(&pcmu_p->pcmu_err_mutex));
ecc_err_p->ecc_bridge_type = PCI_OPLCMU; /* RAGS */
/*
* Get the parent bus id that caused the error.
*/
ecc_err_p->ecc_dev_id = (ecc_err_p->ecc_afsr & PCMU_ECC_UE_AFSR_ID)
>> PCMU_ECC_UE_AFSR_ID_SHIFT;
/*
* Determine the doubleword offset of the error.
*/
ecc_err_p->ecc_dw_offset = (ecc_err_p->ecc_afsr &
PCMU_ECC_UE_AFSR_DW_OFFSET) >> PCMU_ECC_UE_AFSR_DW_OFFSET_SHIFT;
/*
* Determine the primary error type.
*/
switch (err) {
case PCMU_ECC_UE_AFSR_E_PIO:
if (ecc_err_p->pecc_pri) {
ecc->flt_erpt_class = PCI_ECC_PIO_UE;
} else {
ecc->flt_erpt_class = PCI_ECC_SEC_PIO_UE;
}
/* For CMU-CH, a UE is always fatal. */
ecc->flt_panic = 1;
break;
default:
return;
}
}
/*
* pcmu_pbm_classify, called by pcmu_pbm_afsr_report to classify piow afsr.
*/
int
pcmu_pbm_classify(pcmu_pbm_errstate_t *pbm_err_p)
{
uint32_t e;
int nerr = 0;
char **tmp_class;
if (pbm_err_p->pcbm_pri) {
tmp_class = &pbm_err_p->pcbm_pci.pcmu_err_class;
e = PBM_AFSR_TO_PRIERR(pbm_err_p->pbm_afsr);
pbm_err_p->pbm_log = FM_LOG_PCI;
} else {
tmp_class = &pbm_err_p->pbm_err_class;
e = PBM_AFSR_TO_SECERR(pbm_err_p->pbm_afsr);
pbm_err_p->pbm_log = FM_LOG_PBM;
}
if (e & PCMU_PCI_AFSR_E_MA) {
*tmp_class = pbm_err_p->pcbm_pri ? PCI_MA : PCI_SEC_MA;
nerr++;
}
return (nerr);
}
/*
* Function used to clear PBM/PCI/IOMMU error state after error handling
* is complete. Only clearing error bits which have been logged. Called by
* pcmu_pbm_err_handler and pcmu_bus_exit.
*/
static void
pcmu_clear_error(pcmu_t *pcmu_p, pcmu_pbm_errstate_t *pbm_err_p)
{
pcmu_pbm_t *pcbm_p = pcmu_p->pcmu_pcbm_p;
ASSERT(MUTEX_HELD(&pcbm_p->pcbm_pcmu_p->pcmu_err_mutex));
*pcbm_p->pcbm_ctrl_reg = pbm_err_p->pbm_ctl_stat;
*pcbm_p->pcbm_async_flt_status_reg = pbm_err_p->pbm_afsr;
pcbm_p->pcbm_config_header->ch_status_reg =
pbm_err_p->pcbm_pci.pcmu_cfg_stat;
}
/*ARGSUSED*/
int
pcmu_pbm_err_handler(dev_info_t *dip, ddi_fm_error_t *derr,
const void *impl_data, int caller)
{
int fatal = 0;
int nonfatal = 0;
int unknown = 0;
uint32_t prierr, secerr;
pcmu_pbm_errstate_t pbm_err;
pcmu_t *pcmu_p = (pcmu_t *)impl_data;
int ret = 0;
ASSERT(MUTEX_HELD(&pcmu_p->pcmu_err_mutex));
pcmu_pbm_errstate_get(pcmu_p, &pbm_err);
derr->fme_ena = derr->fme_ena ? derr->fme_ena :
fm_ena_generate(0, FM_ENA_FMT1);
prierr = PBM_AFSR_TO_PRIERR(pbm_err.pbm_afsr);
secerr = PBM_AFSR_TO_SECERR(pbm_err.pbm_afsr);
if (derr->fme_flag == DDI_FM_ERR_PEEK) {
/*
* For ddi_peek treat all events as nonfatal. We only
* really call this function so that pcmu_clear_error()
* and ndi_fm_handler_dispatch() will get called.
*/
nonfatal++;
goto done;
} else if (derr->fme_flag == DDI_FM_ERR_POKE) {
/*
* For ddi_poke we can treat as nonfatal if the
* following conditions are met :
* 1. Make sure only primary error is MA/TA
* 2. Make sure no secondary error
* 3. check pci config header stat reg to see MA/TA is
* logged. We cannot verify only MA/TA is recorded
* since it gets much more complicated when a
* PCI-to-PCI bridge is present.
*/
if ((prierr == PCMU_PCI_AFSR_E_MA) && !secerr &&
(pbm_err.pcbm_pci.pcmu_cfg_stat & PCI_STAT_R_MAST_AB)) {
nonfatal++;
goto done;
}
}
if (prierr || secerr) {
ret = pcmu_pbm_afsr_report(dip, derr->fme_ena, &pbm_err);
if (ret == DDI_FM_FATAL) {
fatal++;
} else {
nonfatal++;
}
}
ret = pcmu_cfg_report(dip, derr, &pbm_err.pcbm_pci, caller, prierr);
if (ret == DDI_FM_FATAL) {
fatal++;
} else if (ret == DDI_FM_NONFATAL) {
nonfatal++;
}
done:
if (ret == DDI_FM_FATAL) {
fatal++;
} else if (ret == DDI_FM_NONFATAL) {
nonfatal++;
} else if (ret == DDI_FM_UNKNOWN) {
unknown++;
}
/* Cleanup and reset error bits */
pcmu_clear_error(pcmu_p, &pbm_err);
return (fatal ? DDI_FM_FATAL : (nonfatal ? DDI_FM_NONFATAL :
(unknown ? DDI_FM_UNKNOWN : DDI_FM_OK)));
}
int
pcmu_check_error(pcmu_t *pcmu_p)
{
pcmu_pbm_t *pcbm_p = pcmu_p->pcmu_pcbm_p;
uint16_t pcmu_cfg_stat;
uint64_t pbm_afsr;
ASSERT(MUTEX_HELD(&pcmu_p->pcmu_err_mutex));
pcmu_cfg_stat = pcbm_p->pcbm_config_header->ch_status_reg;
pbm_afsr = *pcbm_p->pcbm_async_flt_status_reg;
if ((pcmu_cfg_stat & (PCI_STAT_S_PERROR | PCI_STAT_S_TARG_AB |
PCI_STAT_R_TARG_AB | PCI_STAT_R_MAST_AB |
PCI_STAT_S_SYSERR | PCI_STAT_PERROR)) ||
(PBM_AFSR_TO_PRIERR(pbm_afsr))) {
return (1);
}
return (0);
}
/*
* Function used to gather PBM/PCI error state for the
* pcmu_pbm_err_handler. This function must be called while pcmu_err_mutex
* is held.
*/
static void
pcmu_pbm_errstate_get(pcmu_t *pcmu_p, pcmu_pbm_errstate_t *pbm_err_p)
{
pcmu_pbm_t *pcbm_p = pcmu_p->pcmu_pcbm_p;
ASSERT(MUTEX_HELD(&pcmu_p->pcmu_err_mutex));
bzero(pbm_err_p, sizeof (pcmu_pbm_errstate_t));
/*
* Capture all pbm error state for later logging
*/
pbm_err_p->pbm_bridge_type = PCI_OPLCMU; /* RAGS */
pbm_err_p->pcbm_pci.pcmu_cfg_stat =
pcbm_p->pcbm_config_header->ch_status_reg;
pbm_err_p->pbm_ctl_stat = *pcbm_p->pcbm_ctrl_reg;
pbm_err_p->pcbm_pci.pcmu_cfg_comm =
pcbm_p->pcbm_config_header->ch_command_reg;
pbm_err_p->pbm_afsr = *pcbm_p->pcbm_async_flt_status_reg;
pbm_err_p->pbm_afar = *pcbm_p->pcbm_async_flt_addr_reg;
pbm_err_p->pcbm_pci.pcmu_pa = *pcbm_p->pcbm_async_flt_addr_reg;
}
static void
pcmu_pbm_clear_error(pcmu_pbm_t *pcbm_p)
{
uint64_t pbm_afsr;
/*
* for poke() support - called from POKE_FLUSH. Spin waiting
* for MA, TA or SERR to be cleared by a pcmu_pbm_error_intr().
* We have to wait for SERR too in case the device is beyond
* a pci-pci bridge.
*/
pbm_afsr = *pcbm_p->pcbm_async_flt_status_reg;
while (((pbm_afsr >> PCMU_PCI_AFSR_PE_SHIFT) &
(PCMU_PCI_AFSR_E_MA | PCMU_PCI_AFSR_E_TA))) {
pbm_afsr = *pcbm_p->pcbm_async_flt_status_reg;
}
}
void
pcmu_err_create(pcmu_t *pcmu_p)
{
/*
* PCI detected ECC errorq, to schedule async handling
* of ECC errors and logging.
* The errorq is created here but destroyed when _fini is called
* for the pci module.
*/
if (pcmu_ecc_queue == NULL) {
pcmu_ecc_queue = errorq_create("pcmu_ecc_queue",
(errorq_func_t)pcmu_ecc_err_drain,
(void *)NULL,
ECC_MAX_ERRS, sizeof (pcmu_ecc_errstate_t),
PIL_2, ERRORQ_VITAL);
if (pcmu_ecc_queue == NULL)
panic("failed to create required system error queue");
}
/*
* Initialize error handling mutex.
*/
mutex_init(&pcmu_p->pcmu_err_mutex, NULL, MUTEX_DRIVER,
(void *)pcmu_p->pcmu_fm_ibc);
}
void
pcmu_err_destroy(pcmu_t *pcmu_p)
{
mutex_destroy(&pcmu_p->pcmu_err_mutex);
}
/*
* Function used to post PCI block module specific ereports.
*/
void
pcmu_pbm_ereport_post(dev_info_t *dip, uint64_t ena,
pcmu_pbm_errstate_t *pbm_err)
{
char *aux_msg;
uint32_t prierr, secerr;
pcmu_t *pcmu_p;
int instance = ddi_get_instance(dip);
ena = ena ? ena : fm_ena_generate(0, FM_ENA_FMT1);
pcmu_p = get_pcmu_soft_state(instance);
prierr = PBM_AFSR_TO_PRIERR(pbm_err->pbm_afsr);
secerr = PBM_AFSR_TO_SECERR(pbm_err->pbm_afsr);
if (prierr)
aux_msg = "PCI primary error: Master Abort";
else if (secerr)
aux_msg = "PCI secondary error: Master Abort";
else
aux_msg = "";
cmn_err(CE_WARN, "%s %s: %s %s=0x%lx, %s=0x%lx, %s=0x%lx %s=0x%x",
(pcmu_p->pcmu_pcbm_p)->pcbm_nameinst_str,
(pcmu_p->pcmu_pcbm_p)->pcbm_nameaddr_str,
aux_msg,
PCI_PBM_AFAR, pbm_err->pbm_afar,
PCI_PBM_AFSR, pbm_err->pbm_afsr,
PCI_PBM_CSR, pbm_err->pbm_ctl_stat,
"portid", pcmu_p->pcmu_id);
}