oplpanel.c revision 97cc145da041e216ed7f1da0e02b877050900e88
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER START
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The contents of this file are subject to the terms of the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Common Development and Distribution License (the "License").
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You may not use this file except in compliance with the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * See the License for the specific language governing permissions
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and limitations under the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * When distributing Covered Code, include this CDDL HEADER in each
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If applicable, add the following below this CDDL HEADER, with the
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25cf1a301a396c38e8adf52c15f537b80d2483f7jl * information: Portions Copyright [yyyy] [name of copyright owner]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER END
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * All Rights Reserved, Copyright (c) FUJITSU LIMITED 2006
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#pragma ident "%Z%%M% %I% %E% SMI"
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void panel_ddi_put8(ddi_acc_handle_t, uint8_t *, uint8_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic int panel_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **);
b0fc0e77220f1fa4c933fd58a4e1dedcd650b0f1govindaextern uint64_t cpc_level15_inum; /* in cpc_subr.c */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl 0, /* device reference count */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/* module configuration stuff */
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void *panelstates;
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "OPL panel driver %I%",
25cf1a301a396c38e8adf52c15f537b80d2483f7jl sizeof (struct panel_state), 0);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (status != 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (status != 0) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Can't unload to make sure the panel switch always works.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl DCMN_ERR((CE_CONT, "%s%d: attach\n", panel_name, instance));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl switch (cmd) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* enable the interrupt just in case */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl panel_ddi_put8(statep->panel_regs_handle, statep->panelregs,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Attach routine
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* alloc and get soft state */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ddi_soft_state_zalloc(panelstates, instance) != DDI_SUCCESS) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* set the dip in the soft state */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* mapping register */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ddi_regs_map_setup(dip, 0, (caddr_t *)&statep->panelregs,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl 0, 0, /* the entire space is mapped */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl &access_attr, &statep->panel_regs_handle) != DDI_SUCCESS) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* setup the interrupt handler */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (ddi_add_intr(dip, 0, &statep->iblock_cookie, 0, &panel_intr,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* ATTACH SUCCESS */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* announce the device */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* turn on interrupt */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl panel_ddi_put8(statep->panel_regs_handle, statep->panelregs,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl DCMN_ERR((CE_NOTE, "%s%d: attach failed", panel_name, instance));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl DCMN_ERR((CE_CONT, "%s%d: detach\n", panel_name, instance));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl switch (cmd) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* turn off interrupt */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl panel_ddi_put8(statep->panel_regs_handle, statep->panelregs,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* free all resources for the dip */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* need not free iblock_cookie */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Not reached */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*ARGSUSED*/
25cf1a301a396c38e8adf52c15f537b80d2483f7jlpanel_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **resultp)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl DCMN_ERR((CE_CONT, "%s%d: getinfo\n", panel_name, instance));
25cf1a301a396c38e8adf52c15f537b80d2483f7jl switch (cmd) {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* to confirm the validity of the interrupt */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl if (!(ddi_get8(statep->panel_regs_handle, statep->panelregs) &
97cc145da041e216ed7f1da0e02b877050900e88hyw * Clear the PNLINT bit
97cc145da041e216ed7f1da0e02b877050900e88hyw * HW reported that there might be a delay in the PNLINT bit
97cc145da041e216ed7f1da0e02b877050900e88hyw * clearing. We force synchronization by attempting to read
97cc145da041e216ed7f1da0e02b877050900e88hyw * back the reg after clearing the bit.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl panel_ddi_put8(statep->panel_regs_handle, statep->panelregs,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* avoid double panic */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Re-enqueue the cpc interrupt handler for PIL15 here since we
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * are not unwinding back to the interrupt handler subsystem.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This is to allow potential cpc overflow interrupts to
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * function while we go thru the panic flow. Note that this
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * logic could be implemented in panic_enter_hw(), we do
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * it here for now as it is less risky. This particular
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * condition is only specific to OPL hardware and we want
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * to minimize exposure of this new logic to other existing
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * platforms.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "System Panel Driver: Emergency panic request "
25cf1a301a396c38e8adf52c15f537b80d2483f7jl "detected!");
25cf1a301a396c38e8adf52c15f537b80d2483f7jl /* Not reached */
25cf1a301a396c38e8adf52c15f537b80d2483f7jlstatic void