pci_ib.c revision b0fc0e77220f1fa4c933fd58a4e1dedcd650b0f1
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2006 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* PCI Interrupt Block (RISCx) implementation
* initialization
*/
#include <sys/ddi_impldefs.h>
#ifdef _STARFIRE
#include <sys/starfire.h>
#endif /* _STARFIRE */
/*LINTLIBRARY*/
void
{
uintptr_t a;
int i;
/*
* Allocate interrupt block state structure and link it to
* the pci state structure.
*/
a = pci_ib_setup(ib_p);
/*
* Determine virtual addresses of interrupt mapping, clear and diag
* registers that have common offsets.
*/
(uint64_t *)(a + COMMON_IB_INTR_RETRY_TIMER_OFFSET);
(uint64_t *)(a + COMMON_IB_SLOT_INTR_STATE_DIAG_REG);
(uint64_t *)(a + COMMON_IB_OBIO_INTR_STATE_DIAG_REG);
}
"ib_create: retry_timer=%x, obio_diag=%x slot_diag=%x\n",
}
}
void
{
}
void
{
/* XXX could be different between psycho and schizo */
}
/*
* can only used for psycho internal interrupts thermal, power,
* ue, ce, pbm
*/
void
{
/*
* Determine the cpu for the interrupt.
*/
cpu_id = intr_dist_cpuid();
#ifdef _STARFIRE
#endif /* _STARFIRE */
}
/*
* Disable the interrupt via its interrupt mapping register.
* Can only be used for internal interrupts: thermal, power, ue, ce, pbm.
* If called under interrupt context, wait should be set to 0
*/
void
{
/* disable the interrupt */
*imr_p; /* flush previous write */
if (!wait)
goto wait_done;
start_time = gethrtime();
/* busy wait if there is interrupt being processed */
break;
}
}
#ifdef _STARFIRE
#endif /* _STARFIRE */
}
/* can only used for psycho internal interrupts thermal, power, ue, ce, pbm */
void
{
}
/*
* distribute PBM and UPA interrupts. ino is set to 0 by caller if we
* are dealing with UPA interrupts (without inos).
*/
void
{
if (!IB_INO_INTR_ISON(imr))
return;
cpu_id = intr_dist_cpuid();
#ifdef _STARFIRE
if (ino) {
}
#else /* _STARFIRE */
return;
#endif /* _STARFIRE */
}
/*
* Converts into nsec, ticks logged with a given CPU. Adds nsec to ih.
*/
/*ARGSUSED*/
void
{
extern kmutex_t pciintr_ks_template_lock;
/*
* Because we are updating two fields in ih_t we must lock
* pciintr_ks_template_lock to prevent someone from reading the
* kstats after we set ih_ticks to 0 and before we increment
* ih_nsec to compensate.
*
* We must also protect against the interrupt arriving and incrementing
* ih_ticks between the time we read it and when we reset it to 0.
* To do this we use atomic_swap.
*/
}
static void
{
#ifdef _STARFIRE
/*
* For Starfire it is a pain to check the current target for
* the mondo since we have to read the PC asics ITTR slot
* assigned to this mondo. It will be much easier to assume
* the current target is always different and do the target
* reprogram all the time.
*/
#else
return;
#endif /* _STARFIRE */
/* disable interrupt, this could disrupt devices sharing our slot */
/* busy wait if there is interrupt being processed */
start_time = gethrtime();
break;
}
}
}
/*
* Redistribute interrupts of the specified weight. The first call has a weight
* of weight_max, which can be used to trigger initialization for
* redistribution. The inos with weight [weight_max, inf.) should be processed
* on the "weight == weight_max" call. This first call is followed by calls
* of decreasing weights, inos of that weight should be processed. The final
* call specifies a weight of zero, this can be used to trigger processing of
* stragglers.
*/
void
{
int i;
if (weight == 0) {
for (i = 0; i < 2; i++)
ib_p->ib_upa_imr[i]);
}
}
/* Perform special processing for first call of a redistribution. */
if (weight == weight_max) {
/*
* Clear ino_established of each ino on first call.
* The ino_established field may be used by a pci
* nexus driver's pci_intr_dist_cpuid implementation
* when detection of established pci slot-cpu binding
* for multi function pci cards.
*/
ino_p->ino_established = 0;
/*
* recompute the ino_intr_weight based on the device
* weight of all devinfo nodes sharing the ino (this
* will allow us to pick up new weights established by
* i_ddi_set_intr_weight()).
*/
ino_p->ino_intr_weight = 0;
i < ipil_p->ipil_ih_size; i++,
if (dweight > 0)
ino_p->ino_intr_weight +=
}
}
}
}
/*
* Get the weight of the ino and determine if we are going to
* process call. We wait until an ib_intr_dist_all call of
* the proper weight occurs to support redistribution of all
* heavy weighted interrupts first (across all nexus driver
* instances). This is done to ensure optimal
* INTR_WEIGHTED_DIST behavior.
*/
((weight >= weight_max) &&
/* select cpuid to target and mark ino established */
/* Add device weight of ino devinfos to targeted cpu. */
i < ipil_p->ipil_ih_size; i++,
dweight);
/*
* Different cpus may have different
* clock speeds. to account for this,
* whenever an interrupt is moved to a
* new CPU, we convert the accumulated
* ticks into nsec, based upon the clock
* rate of the prior CPU.
*
* It is possible that the prior CPU no
* longer exists. In this case, fall
* back to using this CPU's clock rate.
*
* Note that the value in ih_ticks has
* already been corrected for any power
* savings mode which might have been
* in effect.
*/
}
}
/* program the hardware */
}
}
}
/*
* Reset interrupts to IDLE. This function is called during
* panic handling after redistributing interrupts; it's needed to
* support dumping to network devices after 'sync' from OBP.
*
* N.B. This routine runs in a context where all other threads
* are permanently suspended.
*/
static uint_t
ib_intr_reset(void *arg)
{
/*
* Note that we only actually care about interrupts that are
* potentially from network devices.
*/
}
return (BF_NONE);
}
void
{
/* save ino_lst interrupts' mapping registers content */
}
}
void
{
/* restore ino_lst interrupts' mapping registers content */
}
}
}
/*
* locate ino_info structure on ib_p->ib_ino_lst according to ino#
* returns NULL if not found.
*/
{
return (ino_p);
}
{
ino_p->ino_unclaimed_intrs = 0;
}
ino_p->ino_ipil_size++;
return (ipil_p);
}
void
{
else {
if (prev)
}
}
}
if (--ino_p->ino_ipil_size)
return;
else {
}
}
/* free all ino when we are detaching */
void
{
while (ino_p) {
}
}
/*
* Locate ib_ino_pil_t structure on ino_p->ino_ipil_p according to ino#
* returns NULL if not found.
*/
{
return (ipil_p);
}
void
{
/* disable interrupt, this could disrupt devices sharing our slot */
*ino_p->ino_map_reg;
/* do NOT modify the link list until after the busy wait */
/*
* busy wait if there is interrupt being processed.
* either the pending state will be cleared by the interrupt wrapper
* or the interrupt will be marked as blocked indicating that it was
* jabbering.
*/
start_time = gethrtime();
break;
}
}
/* link up ih_t */
ipil_p->ipil_ih_size++;
/*
* if the interrupt was previously blocked (left in pending state)
* because of jabber we need to clear the pending state in case the
* jabber has gone away.
*/
"%s%d: ib_ino_add_intr: ino 0x%x has been unblocked",
ino_p->ino_unclaimed_intrs = 0;
}
/* re-enable interrupt */
*ino_p->ino_map_reg;
}
/*
* removes pci_ispec_t from the ino's link list.
* uses hardware mutex to lock out interrupt threads.
* Side effects: interrupt belongs to that ino is turned off on return.
* if we are sharing PCI slot with other inos, the caller needs
* to turn it back on.
*/
void
{
int i;
/* disable interrupt, this could disrupt devices sharing our slot */
*ino_p->ino_map_reg;
/* do NOT modify the link list until after the busy wait */
/*
* busy wait if there is interrupt being processed.
* either the pending state will be cleared by the interrupt wrapper
* or the interrupt will be marked as blocked indicating that it was
* jabbering.
*/
start_time = gethrtime();
break;
}
}
goto not_found;
goto reset;
}
/*
* if the interrupt was previously blocked (left in pending state)
* because of jabber we need to clear the pending state in case the
* jabber has gone away.
*/
"%s%d: ib_ino_rem_intr: ino 0x%x has been unblocked",
ino_p->ino_unclaimed_intrs = 0;
}
/* search the link list for ih_p */
for (i = 0;
goto not_found;
if (ih_p->ih_config_handle)
ipil_p->ipil_ih_size--;
return;
}
ih_t *
{
int i;
return (ih_p);
}
}
ih_t *
{
return (ih_p);
}
int
{
int ret = DDI_FAILURE;
/*
* For PULSE interrupts, pci driver don't allocate
* ib_ino_info_t and ih_t data structures and also,
* not maintains any interrupt state information.
* So, just return success from here.
*/
"ib_update_intr_state: PULSE interrupt, return success\n");
return (DDI_SUCCESS);
}
return (ret);
}
ret = DDI_SUCCESS;
}
}
return (ret);
}
/*
* Return the dips or number of dips associated with a given interrupt block.
* Size of dips array arg is passed in as dips_ret arg.
* Number of dips returned is returned in dips_ret arg.
* Array of dips gets returned in the dips argument.
* Function returns number of dips existing for the given interrupt block.
*
*/
{
int i, j;
MAXMODCONFNAME-1);
}
}
*devs_ret = j;
}
return (num_devs);
}
{
int i;
/* Log in OS data structures the new CPU. */
/* Log in OS data structures the new CPU. */
(i < ipil_p->ipil_ih_size);
/*
* Account for any residual time
* to be logged for old cpu.
*/
}
}
}
}