vm_dep.c revision d2a70789f056fc6c9ce3ab047b52126d80b0e3da
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* UNIX machine dependent virtual memory support.
*/
#include <vm/seg_kmem.h>
#include <sys/archsystm.h>
#include <sys/machsystm.h>
#include <sys/cpu_module.h>
#include <sys/secflags.h>
#include <vm/hat_sfmmu.h>
#include <sys/mem_config.h>
#include <sys/mem_cage.h>
#include <sys/platform_module.h>
/*
* These variables are set by module specific config routines.
* They are only set by modules which will use physical cache page coloring.
*/
int do_pg_coloring = 0;
/*
* These variables can be conveniently patched at kernel load time to
* prevent do_pg_coloring from being enabled by
* module specific config routines.
*/
int use_page_coloring = 1;
/*
* initialized by page_coloring_init()
*/
extern uint_t page_colors;
extern uint_t page_colors_mask;
extern uint_t page_coloring_shift;
int cpu_page_colors;
uint_t vac_colors = 0;
uint_t vac_colors_mask = 0;
/* cpu specific coloring initialization */
extern void page_coloring_init_cpu();
#pragma weak page_coloring_init_cpu
/*
* get the ecache setsize for the current cpu.
*/
/*
* This variable is set by the cpu module to contain the lowest
* address not affected by the SF_ERRATA_57 workaround. It should
* remain 0 if the workaround is not needed.
*/
#if defined(SF_ERRATA_57)
#endif
/*
* these must be defined in platform specific areas
*/
/*
* Convert page frame number to an OBMEM page frame number
* (i.e. put in the type bits -- zero for this implementation)
*/
{
return (pf);
}
/*
* Use physmax to determine the highest physical page of DRAM memory
* It is assumed that any physical addresses above physmax is in IO space.
* We don't bother checking the low end because we assume that memory space
* begins at physical page frame 0.
*
* Return 1 if the page frame is onboard DRAM memory, else 0.
* Returns 0 for nvram so it won't be cached.
*/
int
{
/* We must be IO space */
return (0);
/* We must be memory space */
return (1);
}
/*
* Handle a pagefault.
*/
{
struct proc *p;
int err;
if (INVALID_VADDR(addr))
return (FC_NOMAP);
if (iskernel) {
} else {
p = curproc;
#if defined(SF_ERRATA_57)
/*
* Prevent infinite loops due to a segment driver
* setting the execute permissions and the sfmmu hat
* silently ignoring them.
*/
addr < errata57_limit) {
goto out;
}
#endif
}
/*
* Dispatch pagefault.
*/
/*
* If this isn't a potential unmapped hole in the user's
* UNIX data or stack segments, just return status info.
*/
goto out;
/*
* Check to see if we happened to faulted on a currently unmapped
* part of the UNIX data or stack segments. If so, create a zfod
* mapping there and then try calling the fault routine again.
*/
/* not in either UNIX data or stack segments */
goto out;
}
}
/* the rest of this function implements a 3.X 4.X 5.X compatibility */
/* This code is probably not needed anymore */
/* expand the gap to the page boundaries on each side */
if (err) {
goto out;
}
} else {
/*
* This page is already mapped by another thread after we
* returned from as_fault() above. We just fallthrough
* as_fault() below.
*/
}
out:
return (res);
}
/*
* This is the routine which defines the address limit implied
* by the flag '_MAP_LOW32'. USERLIMIT32 matches the highest
* mappable address in a 32-bit process on this platform (though
* perhaps we should make it be UINT32_MAX here?)
*/
void
{
}
/*
* Some V9 CPUs have holes in the middle of the 64-bit virtual address range.
*/
/*
* kpm mapping window
*/
/*
* Determine whether [*basep, *basep + *lenp) contains a mappable range of
* addresses at least "minlen" long, where the base of the range is at "off"
* phase from an "align" boundary and there is space for a "redzone"-sized
* redzone on either side of the range. On success, 1 is returned and *basep
* and *lenp are adjusted to describe the acceptable range (including
* the redzone). On failure, 0 is returned.
*/
int
{
/* If hi rolled over the top try cutting back. */
/* Trying to see if this really happens, and then if so, why */
}
return (0);
}
/*
* Deal with a possible hole in the address range between
* hole_start and hole_end that should never be mapped by the MMU.
*/
if (lo < hole_start) {
if (hi > hole_start)
hi = hole_start;
else
/* lo < hole_start && hi >= hole_end */
/*
* prefer lowest range
*/
hi = hole_start;
else
return (0);
} else {
/*
* prefer highest range
*/
hi = hole_start;
else
return (0);
}
} else {
/* lo >= hole_start */
return (0);
}
/* Check if remaining length is too small */
return (0);
}
if (align > 1) {
return (0);
}
return (0);
}
}
return (1);
}
/*
* Determine whether [*basep, *basep + *lenp) contains a mappable range of
* addresses at least "minlen" long. On success, 1 is returned and *basep
* and *lenp are adjusted to describe the acceptable range. On failure, 0
* is returned.
*/
int
{
}
/*
* Default to forbidding the first 64k of address space. This protects most
* reasonably sized structures from dereferences through NULL:
* ((foo_t *)0)->bar
*/
/*
* Determine whether [addr, addr+len] with protections `prot' are valid
* for a user address space.
*/
/*ARGSUSED*/
int
{
return (RANGE_BADADDR);
return (RANGE_BADADDR);
/*
* Determine if the address range falls within an illegal
* range of the MMU.
*/
return (RANGE_BADADDR);
#if defined(SF_ERRATA_57)
/*
* Make sure USERLIMIT isn't raised too high
*/
errata57_limit == 0);
if (AS_TYPE_64BIT(as) &&
(addr < errata57_limit) &&
return (RANGE_BADPROT);
#endif /* SF_ERRATA57 */
return (RANGE_OKAY);
}
/*
* Routine used to check to see if an a.out can be executed
* by the current machine/architecture.
*/
int
{
return (0);
else
return (ENOEXEC);
}
/*
* The following functions return information about an a.out
* which is used when a program is executed.
*/
/*
* Return the load memory address for the data segment.
*/
{
/*
* XXX - Sparc Reference Hack approaching
* Remember that we are loading
* 8k executables into a 4k machine
* DATA_ALIGN == 2 * PAGESIZE
*/
else
}
/*
* Return the starting disk address for the data segment.
*/
{
else
}
/*
* Return the load memory address for the text segment.
*/
/*ARGSUSED*/
{
}
/*
* Return the file byte offset for the text segment.
*/
{
return (0);
else
return (sizeof (struct exec));
}
void
int *pagetext,
int *pagedata)
{
*pagetext = 1;
*pagedata = 1;
} else {
*pagetext = 0;
*pagedata = 0;
}
}
/*
* Return non 0 value if the address may cause a VAC alias with KPM mappings.
* KPM selects an address such that it's equal offset modulo shm_alignment and
* assumes it can't be in VAC conflict with any larger than PAGESIZE mapping.
*/
int
{
if (vac) {
} else {
return (0);
}
}
/*
* Sanity control. Don't use large pages regardless of user
* settings if there's less than priv or shm_lpg_min_physmem memory installed.
* The units for this variable is 8K pages.
*/
static size_t
{
int szc;
/*
* If len is zero, retrieve from proc and don't demote the page size.
* Use atleast the default pagesize.
*/
if (len == 0) {
}
continue;
break;
}
}
/*
* If addr == 0 we were called by memcntl() when the
* size code is 0. Don't set pgsz less than current size.
*/
}
return (pgsz);
}
static size_t
{
int szc;
/*
* If len is zero, retrieve from proc and don't demote the page size.
* Use atleast the default pagesize.
*/
if (len == 0) {
}
continue;
break;
}
}
/*
* If addr == 0 we were called by memcntl() or exec_args() when the
* size code is 0. Don't set pgsz less than current size.
*/
}
return (pgsz);
}
static size_t
{
continue;
return (pgsz);
}
return (DEFAULT_ISM_PAGESIZE);
}
/*
* Suggest a page size to be used to map a segment of type maptype and length
* len. Returns a page size (not a size code).
*/
/* ARGSUSED */
{
return (MMU_PAGESIZE);
}
switch (maptype) {
case MAPPGSZ_ISM:
break;
case MAPPGSZ_STK:
if (max_ustack_lpsize > MMU_PAGESIZE) {
}
break;
case MAPPGSZ_HEAP:
if (max_uheap_lpsize > MMU_PAGESIZE) {
}
break;
}
return (pgsz);
}
/* assumes TTE8K...TTE4M == szc */
static uint_t
{
int i;
return (0);
}
for (i = mmu_page_sizes - 1; i > 0; i--) {
if (disable_lpgs & (1 << i)) {
continue;
}
pgsz = page_get_pagesize(i);
if (pgsz > max_lpsize) {
continue;
}
continue;
}
continue;
}
szcvec |= (1 << i);
/*
* And or in the remaining enabled page sizes.
*/
break;
}
return (szcvec);
}
/*
* Return a bit vector of large page size codes that
* can be used to map [addr, addr + len) region.
*/
/* ARGSUSED */
int memcntl)
{
} else if (flags & MAP_INITDATA) {
} else if (type == MAPPGSZC_SHM) {
} else if (type == MAPPGSZC_HEAP) {
} else if (type == MAPPGSZC_STACK) {
} else {
}
}
/*
* Anchored in the table below are counters used to keep track
* of free contiguous physical memory. Each element of the table contains
* the array of counters, the size of array which is allocated during
* startup based on physmax and a shift value used to convert a pagenum
* into a counter array index or vice versa. The table has page size
* for rows and region size for columns:
*
* page_counters[page_size][region_size]
*
* page_size: TTE size code of pages on page_size freelist.
*
* region_size: TTE size code of a candidate larger page made up
* made up of contiguous free page_size pages.
*
* As you go across a page_size row increasing region_size each
* element keeps track of how many (region_size - 1) size groups
* made up of page_size free pages can be coalesced into a
* regsion_size page. Yuck! Lets try an example:
*
* page_counters[1][3] is the table element used for identifying
* candidate 4M pages from contiguous pages off the 64K free list.
* Each index in the page_counters[1][3].array spans 4M. Its the
* number of free 512K size (regsion_size - 1) groups of contiguous
* 64K free pages. So when page_counters[1][3].counters[n] == 8
* we know we have a candidate 4M page made up of 512K size groups
* of 64K free pages.
*/
/*
* Per page size free lists. 3rd (max_mem_nodes) and 4th (page coloring bins)
* dimensions are allocated dynamically.
*/
/*
* For now there is only a single size cache list.
* Allocated dynamically.
*/
/*
* Calculate space needed for page freelists and counters
*/
calc_free_pagelist_sz(void)
{
int szc;
/*
* one cachelist per color, node, and type
*/
sizeof (page_t **);
/*
* one freelist per size, color, node, and type
*/
return (alloc_sz);
}
{
/*
* We only support small pages in the cachelist.
*/
alloc_base +=
(page_get_pagecolors(0) * sizeof (page_t *));
}
}
/*
* Allocate freelists bins for all
* supported page sizes.
*/
(page_t **)alloc_base;
}
}
}
return (alloc_base);
}
/*
* Allocate page_freelists locks for a memnode from the nucleus data
* area. This is the first time that mmu_page_sizes is used during
* bootup, so check mmu_page_sizes initialization.
*/
int
{
int i;
void page_coloring_init();
if (&mmu_init_mmu_page_sizes) {
if (!mmu_init_mmu_page_sizes(0)) {
}
}
/* fpc_mutex and cpc_mutex */
if (alloc_base == NULL)
return (-1);
for (i = 0; i < NPC_MUTEX; i++) {
}
return (0);
}
/*
* To select our starting bin, we stride through the bins with a stride
* of 337. Why 337? It's prime, it's largeish, and it performs well both
* in simulation and practice for different workloads on varying cache sizes.
*/
int color_start_random = 0;
/* ARGSUSED */
{
}
do {
}
/*
* Called once at startup from kphysm_init() -- before memialloc()
* is invoked to do the 1st page_free()/page_freelist_add().
*
* initializes page_colors and page_colors_mask based on ecache_setsize.
*
* Also initializes the counter locks.
*/
void
{
int a, i;
if (do_pg_coloring == 0) {
page_colors = 1;
for (i = 0; i < mmu_page_sizes; i++) {
colorequivszc[i] = 0;
}
return;
}
/*
* Calculate page_colors from ecache_setsize. ecache_setsize contains
* the max ecache setsize of all cpus configured in the system or, for
* cheetah+ systems, the max possible ecache setsize for all possible
* cheetah+ cpus.
*/
page_coloring_shift = 0;
a = ecache_setsize;
while (a >>= 1) {
}
/* initialize number of colors per page size */
for (i = 0; i < mmu_page_sizes; i++) {
+ 1;
colorequivszc[i] = 0;
}
/*
* initialize cpu_page_colors if ecache setsizes are homogenous.
* cpu_page_colors set to -1 during DR operation or during startup
* if setsizes are heterogenous.
*
* The value of cpu_page_colors determines if additional color bins
* need to be checked for a particular color in the page_get routines.
*/
if (cpu_setsize > 0 && cpu_page_colors == 0 &&
ASSERT(a > 0);
ASSERT(a < 16);
for (i = 0; i < mmu_page_sizes; i++) {
continue;
}
while ((colors >> a) == 0)
a--;
ASSERT(a >= 0);
/* higher 4 bits encodes color equiv mask */
colorequivszc[i] = (a << 4);
}
}
/* do cpu specific color initialization */
if (&page_coloring_init_cpu) {
}
}
int
{
int color = -1;
if (vac) {
}
}
}
/*
* Function for flushing D-cache when performing module relocations
* to an alternate mapping. Stubbed out on all platforms except sun4u,
* at least for now.
*/
void
{
}
static int
{
return (0);
return (0);
return (1);
}
/*
* Return the number of bytes, relative to the beginning of a given range, that
* are non-toxic (can be read from and written to with relative impunity).
*/
{
/* OBP reads are harmless, but we don't want people writing there */
OFW_START_ADDR + 1))
return (sz); /* no overlap */
}
/*
* Minimum physmem required for enabling large pages for kernel heap
* Currently we do not enable lp for kmem on systems with less
*/
/*
* this function chooses large page size for kernel heap
*/
{
if (memtotal < segkmem_lpminphysmem)
return (PAGESIZE);
if (plat_lpkmem_is_supported != NULL &&
plat_lpkmem_is_supported() == 0)
return (PAGESIZE);
while (szc) {
return (page_get_pagesize(szc));
szc--;
}
return (PAGESIZE);
}