ebus.h revision c4485e78b2d4c8dc6cd82088d3a862e9ed1e645b
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _SYS_EBUS_H
#define _SYS_EBUS_H
#pragma ident "%Z%%M% %I% %E% SMI"
#ifdef __cplusplus
extern "C" {
#endif
/*
* driver state type:
*/
/*
* The i86pc specific code fragments are to support the debug of "honeynut"
* and "multigrain" prototypes on i86pc platform. Most of the fragments
* deal with differences in the interrupt dispatching between the prototypes
* and the cheerio ebus. On the prototype boards, all interrupt lines are
* tied together. For this case, the nexus driver uses a common interrupt
* handler to poll all of its children.
*/
#if defined(i86pc)
#define MAX_EBUS_DEVS 6
/*
* ebus device interrupt info;
*/
typedef struct {
char *name;
#endif
struct ebus_intr_map {
};
struct ebus_intr_map_mask {
};
/*
* definition of ebus reg spec entry:
*/
typedef struct {
/* Range entry for 3-cell parent address */
struct ebus_pci_rangespec {
};
/* Range entry for 2-cell parent address */
struct ebus_jbus_rangespec {
};
typedef union vrangespec {
struct ebus_pci_rangespec pci_rangespec;
struct ebus_jbus_rangespec jbus_rangespec;
} vrangespec_t;
typedef union vregspec {
struct pci_phys_spec pci_regspec;
struct regspec jbus_regspec;
} vregspec_t;
/*
* driver soft state structure:
*/
typedef struct {
int nreg;
int vrange_len;
int vrange_cnt;
#define EBUS_SOFT_STATE_CLOSED 0x00
#define EBUS_SOFT_STATE_OPEN 0x01
#define EBUS_SOFT_STATE_OPEN_EXCL 0x02
#if defined(i86pc)
#endif
#if defined(__sparc)
/* Interrupt support */
int intr_map_size;
struct ebus_intr_map *intr_map;
struct ebus_intr_map_mask *intr_map_mask;
#endif
int ebus_addr_cells;
int ebus_paddr_cells;
int ebus_psz_cells;
int ebus_sz_cells;
/*
* use macros for soft state and driver properties:
*/
#define get_ebus_soft_state(i) \
#define alloc_ebus_soft_state(i) \
#define free_ebus_soft_state(i) \
"device-id", -1) == 0x1100) && \
"vendor-id", -1) == 0x108e))
#define EBUS_4MHZ 4000
/*
* register offsets and lengths:
*/
#define TCR_OFFSET 0x710000
#define TCR_LENGTH 12
/*
* timing control register settings:
*/
#define TCR1 0x08101008
#define TCR2 0x08100020
#define TCR3 0x00000020
#if defined(DEBUG)
#define D_IDENTIFY 0x00000001
#define D_ATTACH 0x00000002
#define D_DETACH 0x00000004
#define D_MAP 0x00000008
#define D_CTLOPS 0x00000010
#define D_INTR 0x00000100
static void
#else
#endif
#ifdef __cplusplus
}
#endif
#endif /* _SYS_EBUS_H */