px_pec.c revision 36fe4a92b52649b0979d6a13212f4cea730d19c7
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * CDDL HEADER START
5aec55eb0591d2fcdd38d7dd5408a6ff3456e596Garrett D'Amore * The contents of this file are subject to the terms of the
5aec55eb0591d2fcdd38d7dd5408a6ff3456e596Garrett D'Amore * Common Development and Distribution License, Version 1.0 only
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * (the "License"). You may not use this file except in compliance
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6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * or http://www.opensolaris.org/os/licensing.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * See the License for the specific language governing permissions
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8f4fd63858783a7a2af99f73bab41683900386abAndrzej Szeszo * When distributing Covered Code, include this CDDL HEADER in each
2da1cd3a39e2d3da7f9d15071ea9462919c011acGarrett D'Amore * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
7de0ac867568af5d9b8a9d8f8c82fd5fc12c6bfaRobert Mustacchi * If applicable, add the following below this CDDL HEADER, with the
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6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * information: Portions Copyright [yyyy] [name of copyright owner]
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * CDDL HEADER END
7de0ac867568af5d9b8a9d8f8c82fd5fc12c6bfaRobert Mustacchi * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Use is subject to license terms.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore#pragma ident "%Z%%M% %I% %E% SMI"
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * PCI Express PEC implementation:
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * initialization
67b886e08e73a289a63ea9a98920f9ff423d1881Dan McDonald * Bus error interrupt handler
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore/*LINTLIBRARY*/
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore int nrange = px_p->px_ranges_length / sizeof (px_ranges_t);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Allocate a state structure for the PEC and cross-link it
68271d9e99c74ee948081ec760827ff0567673d1Jerry Jelinek * to its per px node state structure.
68271d9e99c74ee948081ec760827ff0567673d1Jerry Jelinek pec_p = kmem_zalloc(sizeof (px_pec_t), KM_SLEEP);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore pec_p->pec_nameaddr_str = pec_p->pec_nameinst_str + ++len;
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Add interrupt handlers to process correctable/fatal/non fatal
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * PCIE messages.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore if ((ret = px_pec_msg_add_intr(px_p)) != DDI_SUCCESS) {
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Get this pec's mem32 and mem64 segments to determine whether
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * a dma object originates from ths pec. i.e. dev to dev dma
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore uint64_t rng_addr, rng_size, *pfnbp, *pfnlp;
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore uint32_t rng_type = rangep->child_high & PCI_ADDR_MASK;
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Register a function to disable pec error interrupts during a panic.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * do in px_attach. bus_func_register(BF_TYPE_ERRDIS,
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * (busfunc_t)pec_disable_pci_errors, pec_p);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore mutex_init(&pec_p->pec_pokefault_mutex, NULL, MUTEX_DRIVER,
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Disable error interrupts via the interrupt mapping register.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore px_ib_intr_disable(ib_p, px_p->px_inos[PX_INTR_PEC], IB_INTR_NOWAIT);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Free the pokefault mutex.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Remove the pci error interrupt handler.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore px_ib_intr_disable(ib_p, ino, IB_INTR_WAIT);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Remove the error disable function.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Remove interrupt handlers to process correctable/fatal/non fatal
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * PCIE messages.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Free the pec state structure.
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * pec_msg_add_intr:
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Add interrupt handlers to process correctable/fatal/non fatal
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * PCIE messages.
017c01f878134ff71877f2c67cca171a4ad2cd93Yuri Pankov DBG(DBG_MSG, px_p->px_dip, "px_pec_msg_add_intr\n");
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore /* Initilize handle */
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore hdl.ih_cb_func = (ddi_intr_handler_t *)px_err_fabric_intr;
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore /* Add correctable error message handler */
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore &pec_p->pec_corr_msg_msiq_id)) != DDI_SUCCESS) {
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore "PCIE_CORR_MSG registration failed\n");
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore px_lib_msg_setmsiq(dip, PCIE_CORR_MSG, pec_p->pec_corr_msg_msiq_id);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore px_lib_msg_setvalid(dip, PCIE_CORR_MSG, PCIE_MSG_VALID);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore if ((ret = px_ib_update_intr_state(px_p, px_p->px_dip,
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore hdl.ih_inum, px_msiqid_to_devino(px_p, pec_p->pec_corr_msg_msiq_id),
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore PX_INTR_STATE_ENABLE, MSG_REC, PCIE_CORR_MSG)) != DDI_SUCCESS) {
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore "PCIE_CORR_MSG update interrupt state failed\n");
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore /* Add non-fatal error message handler */
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore &pec_p->pec_non_fatal_msg_msiq_id)) != DDI_SUCCESS) {
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi "PCIE_NONFATAL_MSG registration failed\n");
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi px_lib_msg_setvalid(dip, PCIE_NONFATAL_MSG, PCIE_MSG_VALID);
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi if ((ret = px_ib_update_intr_state(px_p, px_p->px_dip,
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi pec_p->pec_non_fatal_msg_msiq_id), PX_INTR_STATE_ENABLE, MSG_REC,
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi "PCIE_NONFATAL_MSG update interrupt state failed\n");
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi /* Add fatal error message handler */
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi &pec_p->pec_fatal_msg_msiq_id)) != DDI_SUCCESS) {
b599bd937c305a895426e8c412ca920ce7824850Robert Mustacchi "PCIE_FATAL_MSG registration failed\n");
7de0ac867568af5d9b8a9d8f8c82fd5fc12c6bfaRobert Mustacchi px_lib_msg_setmsiq(dip, PCIE_FATAL_MSG, pec_p->pec_fatal_msg_msiq_id);
7de0ac867568af5d9b8a9d8f8c82fd5fc12c6bfaRobert Mustacchi px_lib_msg_setvalid(dip, PCIE_FATAL_MSG, PCIE_MSG_VALID);
bc09504ff1ed70f84c9713b732281f14a9ef49b2Gordon Ross if ((ret = px_ib_update_intr_state(px_p, px_p->px_dip,
bc09504ff1ed70f84c9713b732281f14a9ef49b2Gordon Ross pec_p->pec_fatal_msg_msiq_id), PX_INTR_STATE_ENABLE, MSG_REC,
bc09504ff1ed70f84c9713b732281f14a9ef49b2Gordon Ross "PCIE_FATAL_MSG update interrupt state failed\n");
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * px_pec_msg_rem_intr:
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * Remove interrupt handlers to process correctable/fatal/non fatal
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore * PCIE messages. For now, all these PCIe messages are mapped to
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore DBG(DBG_MSG, px_p->px_dip, "px_pec_msg_rem_intr: dip 0x%p\n", dip);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore /* Initilize handle */
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore px_lib_msg_setvalid(dip, PCIE_CORR_MSG, PCIE_MSG_INVALID);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC,
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore PCIE_CORR_MSG, pec_p->pec_corr_msg_msiq_id);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore (void) px_ib_update_intr_state(px_p, px_p->px_dip,
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore PX_INTR_STATE_DISABLE, MSG_REC, PCIE_CORR_MSG);
017c01f878134ff71877f2c67cca171a4ad2cd93Yuri Pankov (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC,
7de0ac867568af5d9b8a9d8f8c82fd5fc12c6bfaRobert Mustacchi PCIE_NONFATAL_MSG, pec_p->pec_non_fatal_msg_msiq_id);
68271d9e99c74ee948081ec760827ff0567673d1Jerry Jelinek (void) px_ib_update_intr_state(px_p, px_p->px_dip,
68271d9e99c74ee948081ec760827ff0567673d1Jerry Jelinek PX_INTR_STATE_DISABLE, MSG_REC, PCIE_NONFATAL_MSG);
7de0ac867568af5d9b8a9d8f8c82fd5fc12c6bfaRobert Mustacchi px_lib_msg_setvalid(dip, PCIE_FATAL_MSG, PCIE_MSG_INVALID);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC,
7de0ac867568af5d9b8a9d8f8c82fd5fc12c6bfaRobert Mustacchi PCIE_FATAL_MSG, pec_p->pec_fatal_msg_msiq_id);
6b5e5868e7ebf1aff3a5abd7d0c4ef0e5fbf3648Garrett D'Amore (void) px_ib_update_intr_state(px_p, px_p->px_dip,