/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2012 Garrett D'Amore <garrett@damore.org>. All rights reserved.
*/
/*
* PX mmu initialization and configuration
*/
#include <sys/sysmacros.h>
#include <sys/ddi_impldefs.h>
#include <sys/iommutsb.h>
#include "px_obj.h"
int
{
int dvma_prop_len;
/*
* Allocate mmu state structure and link it to the
* px state structure.
*/
return (DDI_FAILURE);
/*
* Check for "virtual-dma" property that specifies
* the DVMA range.
*/
return (DDI_FAILURE);
}
/*
* Setup base and bounds for DVMA and bypass mappings.
*/
/*
* Create a virtual memory map for dvma address space.
* Reserve 'size' bytes of low dvma space for fast track cache.
*/
cache_size - 1;
continue;
/*
* the va is within the *fast* dvma range; therefore,
* lock its fast dvma page cache cluster in order to
* both preserve the TTE and prevent the use of this
* fast dvma page cache cluster by px_dvma_map_fast().
* the lock value 0xFF comes from ldstub().
*/
} else {
}
}
return (DDI_SUCCESS);
}
void
{
(void) px_lib_iommu_detach(px_p);
/*
* Free the dvma resource map.
*/
if (PX_DVMA_DBG_ON(mmu_p))
/*
* Free the mmu state structure.
*/
}
int
{
MMU_MAP_PFN) != DDI_SUCCESS) {
"px_lib_iommu_map failed\n");
return (DDI_FAILURE);
}
if (!PX_MAP_BUFZONE(mp))
goto done;
"REDZONE page failed\n");
!= DDI_SUCCESS) {
}
return (DDI_FAILURE);
}
done:
if (PX_DVMA_DBG_ON(mmu_p))
return (DDI_SUCCESS);
}
void
{
"px_mmu_unmap_pages:%x+%x=%x npages=0x%x\n",
"px_lib_iommu_demap: failed\n");
}
if (!PX_MAP_BUFZONE(mp))
return;
"px_lib_iommu_demap: failed\n");
}
}
/*
* px_mmu_map_window - map a dvma window into the mmu
* used by: px_dma_win()
* return value: none
*/
/*ARGSUSED*/
int
{
return (ret);
return (ret);
}
/*
* px_mmu_unmap_window
* This routine is called to break down the mmu mappings to a dvma window.
* Non partial mappings are viewed as single window mapping.
* used by: px_dma_unbindhdl(), px_dma_window(),
* and px_dma_ctlops() - DDI_DMA_FREE, DDI_DMA_MOVWIN, DDI_DMA_NEXTWIN
* return value: none
*/
/*ARGSUSED*/
void
{
if (PX_DVMA_DBG_ON(mmu_p))
}
#if 0
/*
* The following table is for reference only. It denotes the
* the TSB table size measured in number of 8 byte entries.
* It is represented by bits 3:0 in the MMU TSB CTRL REG.
*/
static int px_mmu_tsb_sizes[] = {
0x0, /* 1K */
0x1, /* 2K */
0x2, /* 4K */
0x3, /* 8K */
0x4, /* 16K */
0x5, /* 32K */
0x6, /* 64K */
0x7, /* 128K */
0x8 /* 256K */
};
#endif
static char *px_mmu_errsts[] = {
"Protection Error", "Invalid Error", "Timeout", "ECC Error(UE)"
};
/*ARGSUSED*/
static int
{
/*
* Place holder, the correct eror bits need tobe logged.
*/
return (0);
}