bpp_reg.h revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright (c) 1990,1991,1997-1998 by Sun Microsystems, Inc.
* All rights reserved.
*/
#ifndef _SYS_BPP_REG_H
#define _SYS_BPP_REG_H
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* Header file describing the hardware for the
* bidirectional parallel port
* driver (bpp) for the Zebra SBus card.
*/
#ifdef __cplusplus
extern "C" {
#endif
/* Structure definitions and locals #defines below */
struct bpp_regs { /* bpp register definitions */
/* Blame Ira for this misplaced short */
};
/* #defines for bits in the dma_csr register */
/* #defines for the dma_csr register */
#define BPP_BURST_DEFAULT BPP_BURST_4WORD
#define BPP_BURST_NOBURST BPP_BURST_1WORD
/* #defines for the dma_addr register */
/* #defines for the hw_config register */
/* #defines for the op_config register */
/* WARNING - the EN_VERSATEC bit will disallow lpvi operation */
/* #defines for the trans_cntl register */
/*
* the out_pins register takes the same #defines as the
* output_reg_pins field of the bpp_pins structure, defined in bpp_io.h.
* The #defines are included here for reference only.
*
* BPP_SLCTIN_PIN 0x01 Select in pin
* BPP_AFX_PIN 0x02 Auto feed pin
* BPP_INIT_PIN 0x04 Initialize pin
* BPP_V1_PIN 0x08 Versatec pin 1
* BPP_V2_PIN 0x10 Versatec pin 2
* BPP_V3_PIN 0x20 Versatec pin 3
*/
/*
* the in_pins register takes the same #defines as the
* input_reg_pins field of the bpp_pins structure, defined in bpp_io.h.
* The #defines are included here for reference only.
*
* BPP_ERR_PIN 0x01 Error pin
* BPP_SLCT_PIN 0x02 Select pin
* BPP_PE_PIN 0x04 Paper empty pin
*/
/* #defines for the int_cntl register */
#ifdef __cplusplus
}
#endif
#endif /* _SYS_BPP_REG_H */