unpack.c revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 1987, 2000, 2003 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI" /* SunOS-4.1 */
/* Unpack procedures for Sparc FPU simulator. */
static void
int32_t x) /* packed int32_t */
{
if (x == 0) {
} else {
}
}
/*
* Workaround for bug 4287443--- we have to convince the compiler
* that unpackint64 isn't a leaf routine.
*/
static void
subroutine(void)
{
}
static void
int64_t x) /* packed int64_t */
{
union {
uint32_t i[2];
} ux;
subroutine();
if (x == 0) {
} else {
}
}
void
single_type x) /* packed single */
{
uint_t U;
U = x.significand;
if (x.exponent == 0) { /* zero or sub */
if (x.significand == 0) { /* zero */
return;
} else { /* subnormal */
pu->significand[0] = U;
return;
}
if (x.significand == 0) { /* inf */
return;
} else { /* nan */
if ((U & 0x400000) != 0) { /* quiet */
} else { /* signaling */
}
return;
}
}
}
void
double_type x, /* packed double, sign/exponent/upper 20 bits */
uint_t y) /* and the lower 32 bits of the significand */
{
uint_t U;
U = x.significand;
if (x.exponent == 0) { /* zero or sub */
if ((x.significand == 0) && (y == 0)) { /* zero */
return;
} else { /* subnormal */
pu->significand[0] = U;
return;
}
if ((U|y) == 0) { /* inf */
return;
} else { /* nan */
if ((U & 0x80000) != 0) { /* quiet */
} else { /* signaling */
}
return;
}
}
}
static void
extended_type x, /* packed extended, sign/exponent/16 bits */
uint32_t y, /* 2nd word of extended significand */
uint32_t z, /* 3rd word of extended significand */
uint32_t w) /* 4th word of extended significand */
{
uint_t U;
U = x.significand;
return;
} else { /* normal or subnormal */
if (x.exponent == 0) {
}
return;
}
} else { /* inf or nan */
if ((U|z|y|w) == 0) { /* inf */
return;
} else { /* nan */
if ((U & 0x00008000) != 0) { /* quiet */
} else { /* signaling */
}
return;
}
}
}
void
uint_t n, /* register where data starts */
{
freg_type f;
union {
uint32_t y[4];
freg_type f;
} fp;
switch (dtype) {
case fp_op_int32:
break;
case fp_op_int64:
if ((n & 0x1) == 1) /* fix register encoding */
n = (n & 0x1e) | 0x20;
break;
case fp_op_single:
break;
case fp_op_double:
if ((n & 0x1) == 1) /* fix register encoding */
n = (n & 0x1e) | 0x20;
break;
case fp_op_extended:
if ((n & 0x1) == 1) /* fix register encoding */
n = (n & 0x1e) | 0x20;
break;
}
}
void
uint_t n) /* register where data starts */
{
}
void
uint_t n) /* register where data starts */
{
if ((n & 0x1) == 1) /* fix register encoding */
n = (n & 0x1e) | 0x20;
}