addsub.c revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright (c) 1988 by Sun Microsystems, Inc.
*/
#ident "%Z%%M% %I% %E% SMI" /* SunOS-4.1 1.8 88/12/06 */
static void
{
unsigned c;
}
/* Now class(x) >= class(y). */
case fp_quiet: /* NaN + x -> NaN */
case fp_signaling: /* NaN + x -> NaN */
case fp_infinity: /* Inf + x -> Inf */
case fp_zero: /* 0 + 0 -> 0 */
return;
default:
return;
}
}
/* Now z is normal or subnormal. */
/* Now y is normal or subnormal. */
}
/* Now class(x) >= class(y). */
}
c = 0;
py->significand[0], c);
/* Handle carry out of msb. */
}
}
static void
{
unsigned *z, g, s, r, c;
}
/* Now class(x) >= class(y). */
case fp_quiet: /* NaN - x -> NaN */
case fp_signaling: /* NaN - x -> NaN */
return;
case fp_infinity: /* Inf - x -> Inf */
}
return;
case fp_zero: /* 0 - 0 -> 0 */
return;
default:
return;
}
/* x and y are both normal or subnormal. */
}
/* Now exp(x) >= exp(y). */
z = pz->significand;
c = 0;
py->significand[0], c);
if ((z[0]|z[1]|z[2]|z[3]) == 0) { /* exact zero result */
return;
}
if (z[0] >= 0x20000) { /* sign reversal occurred */
c = 0;
c = fpu_neg2wc(&z[0], z[0], c);
}
return;
} else { /* pre-alignment required */
if (s != 0) r = (r == 0);
if ((r|s) != 0) g = (g == 0); /* guard and rounded bits of z */
c = ((g|r|s) != 0);
py->significand[0], c);
if (z[0] >= 0x10000) { /* don't need post-shifted */
} else { /* post-shifted left 1 bit */
}
return;
}
}
void
{
else
}
void
{
else
}