fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * CDDL HEADER START
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * The contents of this file are subject to the terms of the
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * Common Development and Distribution License (the "License").
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * You may not use this file except in compliance with the License.
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * or http://www.opensolaris.org/os/licensing.
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * See the License for the specific language governing permissions
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * and limitations under the License.
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * When distributing Covered Code, include this CDDL HEADER in each
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * If applicable, add the following below this CDDL HEADER, with the
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * fields enclosed by brackets "[]" replaced with your own identifying
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * information: Portions Copyright [yyyy] [name of copyright owner]
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * CDDL HEADER END
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * Use is subject to license terms.
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango/* revision id of _OSC for PCI/PCI-X/PCI-Exp hierarchy */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define PCIE_OSC_REVISION_ID 1 /* defined in PCI fw ver 3.0 */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango * _OSC method Capabilities buffer bit definitions (from PCI FW 3.0)
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango/* first DWORD: status from _OSC invocation (except bit 0) */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_STATUS_QUERY_ENABLE 0x1 /* Query Support Flag */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_STATUS_FAILED 0x2 /* _OSC failure */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_STATUS_INV_UUID 0x4 /* invalid UUID */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_STATUS_INV_REVID 0x8 /* invalid revision ID */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_STATUS_CAPS_MASKED 0x10 /* capabilities masked */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango (OSC_STATUS_FAILED | OSC_STATUS_INV_UUID | OSC_STATUS_INV_REVID)
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango/* second DWORD: Support Field (set by OS) */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_SUPPORT_EXT_PCI_CFG 0x1 /* Extended PCI Config Ops supported */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_SUPPORT_ACT_PM 0x2 /* Active State PM supported */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_SUPPORT_CLK_PM_CAP 0x4 /* Clock PM Capability supported */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_SUPPORT_PCI_SEGS 0x8 /* PCI Segment Groups supported */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_SUPPORT_MSI 0x10 /* MSI supported */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango/* third DWORD: Control Field (set by OS/BIOS) */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_CONTROL_PCIE_NAT_HP 0x1 /* PCI Exp Native Hot Plug control */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_CONTROL_SHPC_NAT_HP 0x2 /* SHPC Native Hot Plug control */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_CONTROL_PCIE_NAT_PM 0x4 /* PCI Exp Native Power Mgmt. control */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_CONTROL_PCIE_ADV_ERR 0x8 /* PCIE Advanced Err. rep. control */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#define OSC_CONTROL_PCIE_CAPS 0x10 /* PCIE Caps Structure control */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango (OSC_CONTROL_PCIE_CAPS | OSC_CONTROL_PCIE_ADV_ERR)
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango OSC_SUPPORT_ACT_PM | OSC_SUPPORT_CLK_PM_CAP | \
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango /* _OSC related */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango boolean_t bus_osc; /* Has _OSC method been called */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango boolean_t bus_osc_hp; /* Was native HP control granted */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango boolean_t bus_osc_aer; /* Was AER control granted */
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elangoextern int pcie_acpi_osc(dev_info_t *dip, uint32_t *osc_flags);
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elangoextern boolean_t pcie_is_osc(dev_info_t *dip);
fc51f9bbbff02dbd8c3adf640b1a184ceeb58fa5Krishna Elango#endif /* _SYS_PCIE_ACPI_H */