2N/A * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 2N/A * Use is subject to license terms. 2N/A * Copyright (c) 2001-2006 Advanced Micro Devices, Inc. All rights reserved. 2N/A * Redistribution and use in source and binary forms, with or without 2N/A * modification, are permitted provided that the following conditions are met: 2N/A * + Redistributions of source code must retain the above copyright notice, 2N/A * + this list of conditions and the following disclaimer. 2N/A * + Redistributions in binary form must reproduce the above copyright 2N/A * + notice, this list of conditions and the following disclaimer in the 2N/A * + documentation and/or other materials provided with the distribution. 2N/A * + Neither the name of Advanced Micro Devices, Inc. nor the names of its 2N/A * + contributors may be used to endorse or promote products derived from 2N/A * + this software without specific prior written permission. 2N/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND 2N/A * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 2N/A * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 2N/A * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 2N/A * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. OR 2N/A * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2N/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2N/A * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 2N/A * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2N/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2N/A * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 2N/A * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 2N/A * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2N/A * Compliance with Applicable Laws. Notice is hereby given that 2N/A * the software may be subject to restrictions on use, release, 2N/A * transfer, importation, exportation and/or re-exportation under 2N/A * the laws and regulations of the United States or other 2N/A * countries ("Applicable Laws"), which include but are not 2N/A * limited to U.S. export control laws such as the Export 2N/A * Administration Regulations and national security controls as 2N/A * defined thereunder, as well as State Department controls under 2N/A * the U.S. Munitions List. Permission to use and/or 2N/A * redistribute the software is conditioned upon compliance with 2N/A * all Applicable Laws, including U.S. export control laws 2N/A * regarding specifically designated persons, countries and 2N/A * nationals of countries subject to national security controls. 2N/A/* Global macro Definations */ 2N/A#
define ROUNDUP(x, a) (((x) + (a) -
1) & ~((a) -
1))
2N/Astatic char ident[] =
"AMD8111 10/100M Ethernet";
2N/A * Driver Entry Points 2N/A * GLD Entry points prototype 2N/A 0,
/* devo_refcnt */ 2N/A ident,
/* short description */ 2N/A (
int)
1,
/* dma_attr_sgllen */ 2N/A (
uint_t)
0xFFFFFFFFU,
/* dma_attr_burstsizes */ 2N/A (
int)
1,
/* dma_attr_sgllen */ 2N/A/* PIO access attributes for registers */ 2N/A * Standard Driver Load Entry Point 2N/A * It will be called at load time of driver. 2N/A * Standard Driver Entry Point for Query. 2N/A * It will be called at any time to get Driver info. 2N/A * Standard Driver Entry Point for Unload. 2N/A * It will be called at unload time of driver. 2N/A * If the mode isn't being changed, there's nothing to do ... 2N/A * Validate the requested mode and prepare a suitable message 2N/A * to explain the link down/up cycle that the change will 2N/A * probably induce ... 2N/A /* Tell GLD the state of the physical link. */ 2N/A /* Tell GLD the state of the physical link. */ 2N/A /* Disable Port Manager */ 2N/A /* Tell GLD the state of the physical link. */ 2N/A * All OK; tell the caller to reprogram 2N/A * the PHY and/or MAC for the new mode ... 2N/A * Validate format of ioctl 2N/A "amd8111s_loop_ioctl: invalid cmd 0x%x",
cmd);
2N/A "wrong LB_GET_INFO_SIZE size");
2N/A "Wrong LB_GET_INFO size");
2N/A "Wrong LB_GET_MODE size");
2N/A "Wrong LB_SET_MODE size");
2N/A * Decide how to reply 2N/A * Error, reply with a NAK and EINVAL or the specified error 2N/A * OK, reply already sent 2N/A * OK, reply with an ACK 2N/A * OK, send prepared reply as ACK or NAK 2N/A * Copy one packet from dma memory to mblk. Inc dma descriptor pointer. 2N/A * If the frame is received with errors, then set MCNT 2N/A * of that pkt in ReceiveArray to 0. This packet would 2N/A * be discarded later and not indicated to OS. 2N/A /* Length of incoming packet */ 2N/A /* Copy from virtual address of incoming packet */ 2N/A * Get the received packets from NIC card and send them to GLD. 2N/A * Print message in release-version driver. 2N/A * To allocate & initilize all resources. 2N/A * Called by amd8111s_attach(). 2N/A * Initilize memory on lower layers 2N/A * Allocate Rx buffer for each Rx descriptor. Then call mil layer 2N/A * routine to fill physical address of Rx buffer into Rx descriptor. 2N/A * Free All memory allocated so far 2N/A * Allocate and initialize Tx/Rx descriptors 2N/A * Allocate Rx descriptors 2N/A "ddi_dma_alloc_handle for Rx desc failed");
2N/A "ddi_dma_mem_handle for Rx desc failed");
2N/A "ddi_dma_addr_bind_handle for Rx desc failed");
2N/A /* Initialize Rx descriptors related variables */ 2N/A * Allocate Tx descriptors 2N/A "ddi_dma_alloc_handle for Tx desc failed");
2N/A "ddi_dma_mem_handle for Tx desc failed");
2N/A "ddi_dma_addr_bind_handle for Tx desc failed");
2N/A /* Set the DMA area to all zeros */ 2N/A /* Initialize Tx descriptors related variables */ 2N/A /* Physical Addr of Tx_desc_original & Tx_desc */ 2N/A /* Setting the reserved bits in the tx descriptors */ 2N/A /* Free Rx descriptors */ 2N/A /* Free Rx descriptors */ 2N/A "kmem_zalloc failed");
2N/A "ddi_dma_alloc_handle failed");
2N/A "ddi_dma_mem_alloc failed");
2N/A "ddi_dma_mem_alloc failed");
2N/A "ddi_dma_addr_bind_handle failed");
2N/A * Allocate all Tx buffer. 2N/A * Allocate a Rx buffer for each Rx descriptor. Then 2N/A * call mil routine to fill physical address of Rx 2N/A * buffer into Rx descriptors 2N/A * Allocate rx Buffers 2N/A "amd8111s_alloc_dma_ringbuf for tx failed");
2N/A * Allocate Tx buffers 2N/A "amd8111s_alloc_dma_ringbuf for tx failed");
2N/A * Initilize the mil Queues 2N/A "amd8111s_allocate_buffers failed");
2N/A /* Free Tx buffers */ 2N/A /* Free Rx Buffers */ 2N/A * Try to recycle all the descriptors and Tx buffers 2N/A * which are already freed by hardware. 2N/A * Get packets in the Tx buffer, then copy them to the send buffer. 2N/A * Trigger hardware to send out packets. 2N/A /* to verify if it needs to recycle the tx Buf */ 2N/A /* Fill packet length */ 2N/A /* Fill physical buffer address */ 2N/A /* Call mdlTransmit to send the pkt out on the network */ 2N/A * Softintr entrance. try to send out packets in the Tx buffer. 2N/A * If reschedule is True, call mac_tx_update to re-enable the 2N/A /* alloc send buffer */ 2N/A /* copy packet to send buffer */ 2N/A * (GLD Entry Point) Send the message block to lower layer 2N/A * (GLD Entry Point) Interrupt Service Routine 2N/A /* Read the interrupt status from mdl */ 2N/A /* Link status changed */ 2N/A * RINT0: Receive Interrupt is set by the controller after the last 2N/A * descriptor of a receive frame for this ring has been updated by 2N/A * writing a 0 to the OWNership bit. 2N/A * TINT0: Transmit Interrupt is set by the controller after the OWN bit 2N/A * in the last descriptor of a transmit frame in this particular ring 2N/A * has been cleared to indicate the frame has been copied to the 2N/A * if desc ring is NULL and tx buf is not NULL, it should 2N/A * To re-initilize data structures. 2N/A /* Reset all Tx/Rx queues and descriptors */ 2N/A * Send all pending tx packets 2N/A for (i = 0; i <
30; i++) {
2N/A /* This packet has been transmitted */ 2N/A * (GLD Entry Point) To start card will be called at 2N/A * (GLD Entry Point) To stop card will be called at 2N/A /* Ensure send all pending tx packets */ 2N/A * Stop the controller and disable the controller interrupt 2N/A /* Free memory on lower layers */ 2N/A /* Add a multicast entry */ 2N/A /* Delete a multicast entry */ 2N/A * The size of MIB registers is only 32 bits. Dump them before one 2N/A * of them overflows. 2N/A /* Clear all MIB registers */ 2N/A * (Gld Entry point) Changes the Mac address of card 2N/A * attach(9E) -- Attach a device to the system 2N/A * Called once for each board after successfully probed. 2N/A * a. creating minor device node for the instance. 2N/A * b. allocate & Initilize four layers (call odlInit) 2N/A * c. get MAC address 2N/A * d. initilize pLayerPointers to gld private pointer 2N/A * e. register with GLD 2N/A * if any action fails does clean up & returns DDI_FAILURE 2N/A * else retursn DDI_SUCCESS 2N/A /* Get device instance number */ 2N/A * Here, we only allocate memory for struct odl and initilize it. 2N/A * All other memory allocation & initilization will be done in odlInit 2N/A * later on this routine. 2N/A "attach: get iblock cookies failed");
2N/A /* Setup PCI space */ 2N/A * Allocate and initialize all resource and map device registers. 2N/A * If failed, it returns a non-zero value. 2N/A "attach: ddi_regs_map_setup failed");
2N/A * Setup the interrupt 2N/A * Initilize the mac structure 2N/A /* Get MAC address */ 2N/A /* 1518 - 14 (ether header) - 4 (CRC) */ 2N/A * Finally, we're ready to register ourselves with the MAC layer 2N/A * interface; if this succeeds, we're ready to start. 2N/A * detach(9E) -- Detach a device from the system 2N/A * It is called for each device instance when the system is preparing to 2N/A * unload a dynamically unloadable driver. 2N/A * a. check if any driver buffers are held by OS. 2N/A * b. do clean up of all allocated memory if it is not in use by OS. 2N/A * c. un register with GLD 2N/A * d. return DDI_SUCCESS on succes full free & unregister 2N/A * Get the driver private (struct LayerPointers *) structure 2N/A /* Unregister driver from the GLD interface */ 2N/A /* Free All memory allocated */ 2N/A * (GLD Entry Point)GLD will call this entry point perodicaly to 2N/A * get driver statistices. 2N/A * Memory Read Function Used by MDL to set card registers. 2N/A for (i = 0; i <
8; i++) {