75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh#include <sys/disp.h>

75ab5f91d942eea4138efe4799ca0589870c3899lh#include <sys/atomic.h>

d62bc4badc1c1f1549c961cfb8b420e650e1272byz#include <sys/vlan.h>

75ab5f91d942eea4138efe4799ca0589870c3899lh#include "amd8111s_main.h"

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh#define ROUNDUP(x, a) (((x) + (a) - 1) & ~((a) - 1))

75ab5f91d942eea4138efe4799ca0589870c3899lh#define INTERFACE_NAME "amd8111s"

75ab5f91d942eea4138efe4799ca0589870c3899lh#define AMD8111S_SPLIT 128

75ab5f91d942eea4138efe4799ca0589870c3899lh#define AMD8111S_SEND_MAX 64

75ab5f91d942eea4138efe4799ca0589870c3899lh

193974072f41a843678abf5f61979c748687e66bSherry Moorestatic char ident[] = "AMD8111 10/100M Ethernet";

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_attach(dev_info_t *, ddi_attach_cmd_t);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_detach(dev_info_t *, ddi_detach_cmd_t);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_m_unicst(void *, const uint8_t *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_m_promisc(void *, boolean_t);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_m_stat(void *, uint_t, uint64_t *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void amd8111s_m_ioctl(void *, queue_t *, mblk_t *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_m_multicst(void *, boolean_t, const uint8_t *addr);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_m_start(void *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void amd8111s_m_stop(void *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic mblk_t *amd8111s_m_tx(void *, mblk_t *mp);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic uint_t amd8111s_intr(caddr_t);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_unattach(dev_info_t *, struct LayerPointers *);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t amd8111s_allocate_buffers(struct LayerPointers *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int amd8111s_odlInit(struct LayerPointers *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t amd8111s_allocate_descriptors(struct LayerPointers *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void amd8111s_free_descriptors(struct LayerPointers *);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t amd8111s_alloc_dma_ringbuf(struct LayerPointers *,

75ab5f91d942eea4138efe4799ca0589870c3899lh struct amd8111s_dma_ringbuf *, uint32_t, uint32_t);

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void amd8111s_free_dma_ringbuf(struct amd8111s_dma_ringbuf *);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void amd8111s_log(struct LayerPointers *adapter, int level,

75ab5f91d942eea4138efe4799ca0589870c3899lh char *fmt, ...);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic struct cb_ops amd8111s_cb_ops = {

75ab5f91d942eea4138efe4799ca0589870c3899lh nulldev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nulldev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev,

75ab5f91d942eea4138efe4799ca0589870c3899lh nochpoll,

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_prop_op,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL,

75ab5f91d942eea4138efe4799ca0589870c3899lh D_NEW | D_MP,

75ab5f91d942eea4138efe4799ca0589870c3899lh CB_REV, /* cb_rev */

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev, /* cb_aread */

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev /* cb_awrite */

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic struct dev_ops amd8111s_dev_ops = {

75ab5f91d942eea4138efe4799ca0589870c3899lh DEVO_REV, /* devo_rev */

75ab5f91d942eea4138efe4799ca0589870c3899lh 0, /* devo_refcnt */

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, /* devo_getinfo */

75ab5f91d942eea4138efe4799ca0589870c3899lh nulldev, /* devo_identify */

75ab5f91d942eea4138efe4799ca0589870c3899lh nulldev, /* devo_probe */

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_attach, /* devo_attach */

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_detach, /* devo_detach */

75ab5f91d942eea4138efe4799ca0589870c3899lh nodev, /* devo_reset */

75ab5f91d942eea4138efe4799ca0589870c3899lh &amd8111s_cb_ops, /* devo_cb_ops */

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, /* devo_bus_ops */

193974072f41a843678abf5f61979c748687e66bSherry Moore nodev, /* devo_power */

193974072f41a843678abf5f61979c748687e66bSherry Moore ddi_quiesce_not_supported, /* devo_quiesce */

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstruct modldrv amd8111s_modldrv = {

75ab5f91d942eea4138efe4799ca0589870c3899lh &mod_driverops, /* Type of module. This one is a driver */

75ab5f91d942eea4138efe4799ca0589870c3899lh ident, /* short description */

75ab5f91d942eea4138efe4799ca0589870c3899lh &amd8111s_dev_ops /* driver specific ops */

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstruct modlinkage amd8111s_modlinkage = {

75ab5f91d942eea4138efe4799ca0589870c3899lh MODREV_1, (void *)&amd8111s_modldrv, NULL

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstruct LayerPointers *amd8111sadapter;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic ddi_dma_attr_t pcn_buff_dma_attr_t = {

75ab5f91d942eea4138efe4799ca0589870c3899lh DMA_ATTR_V0, /* dma_attr_version */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0, /* dma_attr_addr_lo */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0xFFFFFFFF, /* dma_attr_addr_hi */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0xFFFFFFFF, /* dma_attr_count_max */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)1, /* dma_attr_align */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint_t)0x7F, /* dma_attr_burstsizes */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint32_t)1, /* dma_attr_minxfer */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0xFFFFFFFF, /* dma_attr_maxxfer */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0xFFFFFFFF, /* dma_attr_seg */

75ab5f91d942eea4138efe4799ca0589870c3899lh (int)1, /* dma_attr_sgllen */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint32_t)1, /* granularity */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint_t)0 /* dma_attr_flags */

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic ddi_dma_attr_t pcn_desc_dma_attr_t = {

75ab5f91d942eea4138efe4799ca0589870c3899lh DMA_ATTR_V0, /* dma_attr_version */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0, /* dma_attr_addr_lo */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0xFFFFFFFF, /* dma_attr_addr_hi */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0x7FFFFFFF, /* dma_attr_count_max */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0x10, /* dma_attr_align */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint_t)0xFFFFFFFFU, /* dma_attr_burstsizes */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint32_t)1, /* dma_attr_minxfer */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0xFFFFFFFF, /* dma_attr_maxxfer */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint64_t)0xFFFFFFFF, /* dma_attr_seg */

75ab5f91d942eea4138efe4799ca0589870c3899lh (int)1, /* dma_attr_sgllen */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint32_t)1, /* granularity */

75ab5f91d942eea4138efe4799ca0589870c3899lh (uint_t)0 /* dma_attr_flags */

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic ddi_device_acc_attr_t pcn_acc_attr = {

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_DEVICE_ATTR_V0,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_STRUCTURE_LE_ACC,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_STRICTORDER_ACC

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic mac_callbacks_t amd8111s_m_callbacks = {

da14cebe459d3275048785f25bd869cb09b5307fEric Cheng MC_IOCTL,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_stat,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_start,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_stop,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_promisc,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_multicst,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_unicst,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_tx,

0dc2366f7b9f9f36e10909b1e95edbf2a261c2acVenugopal Iyer NULL,

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_m_ioctl

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh_init()

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh int status;

75ab5f91d942eea4138efe4799ca0589870c3899lh mac_init_ops(&amd8111s_dev_ops, "amd8111s");

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh status = mod_install(&amd8111s_modlinkage);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (status != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh mac_fini_ops(&amd8111s_dev_ops);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (status);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh_info(struct modinfo *modinfop)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh return (mod_info(&amd8111s_modlinkage, modinfop));

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh_fini()

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh int status;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh status = mod_remove(&amd8111s_modlinkage);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (status == DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh mac_fini_ops(&amd8111s_dev_ops);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (status);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic lb_property_t loopmodes[] = {

75ab5f91d942eea4138efe4799ca0589870c3899lh { normal, "normal", AMD8111S_LB_NONE },

75ab5f91d942eea4138efe4799ca0589870c3899lh { external, "100Mbps", AMD8111S_LB_EXTERNAL_100 },

75ab5f91d942eea4138efe4799ca0589870c3899lh { external, "10Mbps", AMD8111S_LB_EXTERNAL_10 },

75ab5f91d942eea4138efe4799ca0589870c3899lh { internal, "MAC", AMD8111S_LB_INTERNAL_MAC }

75ab5f91d942eea4138efe4799ca0589870c3899lh};

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_set_loop_mode(struct LayerPointers *adapter, uint32_t mode)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (mode == adapter->pOdl->loopback_mode)

75ab5f91d942eea4138efe4799ca0589870c3899lh return;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh switch (mode) {

75ab5f91d942eea4138efe4799ca0589870c3899lh default:

75ab5f91d942eea4138efe4799ca0589870c3899lh return;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case AMD8111S_LB_NONE:

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStopChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (adapter->pOdl->loopback_mode == AMD8111S_LB_INTERNAL_MAC) {

75ab5f91d942eea4138efe4799ca0589870c3899lh cmn_err(CE_NOTE, "LB_NONE restored from Interanl LB");

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD2,

75ab5f91d942eea4138efe4799ca0589870c3899lh INLOOP);

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD3,

75ab5f91d942eea4138efe4799ca0589870c3899lh FORCE_FULL_DUPLEX | FORCE_LINK_STATUS);

75ab5f91d942eea4138efe4799ca0589870c3899lh } else {

75ab5f91d942eea4138efe4799ca0589870c3899lh cmn_err(CE_NOTE, "LB_NONE restored from Exteranl LB");

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD2,

75ab5f91d942eea4138efe4799ca0589870c3899lh EXLOOP);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_reset(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->LinkStatus = LINK_STATE_DOWN;

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->rx_fcs_stripped = B_FALSE;

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStartChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case AMD8111S_LB_EXTERNAL_100:

75ab5f91d942eea4138efe4799ca0589870c3899lh cmn_err(CE_NOTE, "amd8111s_set_loop_mode LB_EXTERNAL_100");

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStopChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_reset(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh SetIntrCoalesc(adapter, B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlPHYAutoNegotiation(adapter, PHY_FORCE_FD_100);

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD2,

75ab5f91d942eea4138efe4799ca0589870c3899lh VAL0 | EXLOOP);

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->LinkStatus = LINK_STATE_UP;

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pMdl->Speed = 100;

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pMdl->FullDuplex = B_TRUE;

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Tell GLD the state of the physical link. */

75ab5f91d942eea4138efe4799ca0589870c3899lh mac_link_update(adapter->pOdl->mh, LINK_STATE_UP);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->rx_fcs_stripped = B_TRUE;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStartChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case AMD8111S_LB_EXTERNAL_10:

75ab5f91d942eea4138efe4799ca0589870c3899lh cmn_err(CE_NOTE, "amd8111s_set_loop_mode LB_EXTERNAL_10");

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStopChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_reset(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh SetIntrCoalesc(adapter, B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlPHYAutoNegotiation(adapter, PHY_FORCE_FD_10);

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD2,

75ab5f91d942eea4138efe4799ca0589870c3899lh VAL0 | EXLOOP);

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->LinkStatus = LINK_STATE_UP;

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pMdl->Speed = 10;

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pMdl->FullDuplex = B_TRUE;

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Tell GLD the state of the physical link. */

75ab5f91d942eea4138efe4799ca0589870c3899lh mac_link_update(adapter->pOdl->mh, LINK_STATE_UP);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->rx_fcs_stripped = B_TRUE;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStartChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case AMD8111S_LB_INTERNAL_MAC:

75ab5f91d942eea4138efe4799ca0589870c3899lh cmn_err(CE_NOTE, "amd8111s_set_loop_mode LB_INTERNAL_MAC");

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStopChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_reset(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh SetIntrCoalesc(adapter, B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Disable Port Manager */

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD3,

75ab5f91d942eea4138efe4799ca0589870c3899lh EN_PMGR);

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD2,

75ab5f91d942eea4138efe4799ca0589870c3899lh VAL0 | INLOOP);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh WRITE_REG32(adapter, adapter->pMdl->Mem_Address + CMD3,

75ab5f91d942eea4138efe4799ca0589870c3899lh VAL1 | FORCE_FULL_DUPLEX | FORCE_LINK_STATUS);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->LinkStatus = LINK_STATE_UP;

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pMdl->FullDuplex = B_TRUE;

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Tell GLD the state of the physical link. */

75ab5f91d942eea4138efe4799ca0589870c3899lh mac_link_update(adapter->pOdl->mh, LINK_STATE_UP);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->rx_fcs_stripped = B_TRUE;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlStartChip(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh adapter->pOdl->loopback_mode = mode;

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic enum ioc_reply

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_loopback_ioctl(struct LayerPointers *adapter, struct iocblk *iocp,

75ab5f91d942eea4138efe4799ca0589870c3899lh mblk_t *mp)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh lb_info_sz_t *lbsp;

75ab5f91d942eea4138efe4799ca0589870c3899lh lb_property_t *lbpp;

75ab5f91d942eea4138efe4799ca0589870c3899lh uint32_t *lbmp;

75ab5f91d942eea4138efe4799ca0589870c3899lh int cmd;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (mp->b_cont == NULL)

75ab5f91d942eea4138efe4799ca0589870c3899lh return (IOC_INVAL);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh cmd = iocp->ioc_cmd;

75ab5f91d942eea4138efe4799ca0589870c3899lh switch (cmd) {

75ab5f91d942eea4138efe4799ca0589870c3899lh default:

75ab5f91d942eea4138efe4799ca0589870c3899lh /* NOTREACHED */

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(adapter, CE_NOTE,

75ab5f91d942eea4138efe4799ca0589870c3899lh "amd8111s_loop_ioctl: invalid cmd 0x%x", cmd);

75ab5f91d942eea4138efe4799ca0589870c3899lh return (IOC_INVAL);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_GET_INFO_SIZE:

75ab5f91d942eea4138efe4799ca0589870c3899lh if (iocp->ioc_count != sizeof (lb_info_sz_t)) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(adapter, CE_NOTE,

75ab5f91d942eea4138efe4799ca0589870c3899lh "wrong LB_GET_INFO_SIZE size");

75ab5f91d942eea4138efe4799ca0589870c3899lh return (IOC_INVAL);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gd lbsp = (void *)mp->b_cont->b_rptr;

75ab5f91d942eea4138efe4799ca0589870c3899lh *lbsp = sizeof (loopmodes);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_GET_INFO:

75ab5f91d942eea4138efe4799ca0589870c3899lh if (iocp->ioc_count != sizeof (loopmodes)) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(adapter, CE_NOTE,

75ab5f91d942eea4138efe4799ca0589870c3899lh "Wrong LB_GET_INFO size");

75ab5f91d942eea4138efe4799ca0589870c3899lh return (IOC_INVAL);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gd lbpp = (void *)mp->b_cont->b_rptr;

75ab5f91d942eea4138efe4799ca0589870c3899lh bcopy(loopmodes, lbpp, sizeof (loopmodes));

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_GET_MODE:

75ab5f91d942eea4138efe4799ca0589870c3899lh if (iocp->ioc_count != sizeof (uint32_t)) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(adapter, CE_NOTE,

75ab5f91d942eea4138efe4799ca0589870c3899lh "Wrong LB_GET_MODE size");

75ab5f91d942eea4138efe4799ca0589870c3899lh return (IOC_INVAL);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gd lbmp = (void *)mp->b_cont->b_rptr;

75ab5f91d942eea4138efe4799ca0589870c3899lh *lbmp = adapter->pOdl->loopback_mode;

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_SET_MODE:

75ab5f91d942eea4138efe4799ca0589870c3899lh if (iocp->ioc_count != sizeof (uint32_t)) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(adapter, CE_NOTE,

75ab5f91d942eea4138efe4799ca0589870c3899lh "Wrong LB_SET_MODE size");

75ab5f91d942eea4138efe4799ca0589870c3899lh return (IOC_INVAL);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gd lbmp = (void *)mp->b_cont->b_rptr;

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_set_loop_mode(adapter, *lbmp);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh return (IOC_REPLY);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_m_ioctl(void *arg, queue_t *q, mblk_t *mp)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct iocblk *iocp;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct LayerPointers *adapter;

75ab5f91d942eea4138efe4799ca0589870c3899lh enum ioc_reply status;

75ab5f91d942eea4138efe4799ca0589870c3899lh

22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gd iocp = (void *)mp->b_rptr;

75ab5f91d942eea4138efe4799ca0589870c3899lh iocp->ioc_error = 0;

22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gd adapter = arg;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh ASSERT(adapter);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (adapter == NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh miocnak(q, mp, 0, EINVAL);

75ab5f91d942eea4138efe4799ca0589870c3899lh return;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh switch (iocp->ioc_cmd) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_GET_INFO_SIZE:

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_GET_INFO:

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_GET_MODE:

75ab5f91d942eea4138efe4799ca0589870c3899lh case LB_SET_MODE:

75ab5f91d942eea4138efe4799ca0589870c3899lh status = amd8111s_loopback_ioctl(adapter, iocp, mp);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh default:

75ab5f91d942eea4138efe4799ca0589870c3899lh status = IOC_INVAL;

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh switch (status) {

75ab5f91d942eea4138efe4799ca0589870c3899lh default:

75ab5f91d942eea4138efe4799ca0589870c3899lh case IOC_INVAL:

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh miocnak(q, mp, 0, iocp->ioc_error == 0 ?

75ab5f91d942eea4138efe4799ca0589870c3899lh EINVAL : iocp->ioc_error);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case IOC_DONE:

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case IOC_ACK:

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh miocack(q, mp, 0, 0);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh case IOC_REPLY:

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh mp->b_datap->db_type = iocp->ioc_error == 0 ?

75ab5f91d942eea4138efe4799ca0589870c3899lh M_IOCACK : M_IOCNAK;

75ab5f91d942eea4138efe4799ca0589870c3899lh qreply(q, mp);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_recv_copy(struct LayerPointers *pLayerPointers, mblk_t **last_mp)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh int length = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh mblk_t *mp;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct rx_desc *descriptor;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct odl *pOdl = pLayerPointers->pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct amd8111s_statistics *statistics = &pOdl->statistics;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct nonphysical *pNonphysical = pLayerPointers->pMil

75ab5f91d942eea4138efe4799ca0589870c3899lh ->pNonphysical;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mutex_enter(&pOdl->mdlRcvLock);

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor = pNonphysical->RxBufDescQRead->descriptor;

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) ddi_dma_sync(pOdl->rx_desc_dma_handle,

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQRead->descriptor -

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQStart->descriptor,

75ab5f91d942eea4138efe4799ca0589870c3899lh sizeof (struct rx_desc), DDI_DMA_SYNC_FORCPU);

75ab5f91d942eea4138efe4799ca0589870c3899lh if ((descriptor->Rx_OWN) == 0) {

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (descriptor->Rx_ERR) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_desc_err ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_ERR = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (descriptor->Rx_FRAM == 1) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_desc_err_FRAM ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_FRAM = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh if (descriptor->Rx_OFLO == 1) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_desc_err_OFLO ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_OFLO = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->rx_overflow_counter ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh if ((pOdl->rx_overflow_counter > 5) &&

75ab5f91d942eea4138efe4799ca0589870c3899lh (pOdl->pause_interval == 0)) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_double_overflow ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlSendPause(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->rx_overflow_counter = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->pause_interval = 25;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh if (descriptor->Rx_CRC == 1) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_desc_err_CRC ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_CRC = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh if (descriptor->Rx_BUFF == 1) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_desc_err_BUFF ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_BUFF = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh goto Next_Descriptor;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Length of incoming packet */

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pOdl->rx_fcs_stripped) {

75ab5f91d942eea4138efe4799ca0589870c3899lh length = descriptor->Rx_MCNT -4;

75ab5f91d942eea4138efe4799ca0589870c3899lh } else {

75ab5f91d942eea4138efe4799ca0589870c3899lh length = descriptor->Rx_MCNT;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh if (length < 62) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_error_zerosize ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if ((mp = allocb(length, BPRI_MED)) == NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_allocfail ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh goto failed;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Copy from virtual address of incoming packet */

75ab5f91d942eea4138efe4799ca0589870c3899lh bcopy((long *)*(pNonphysical->RxBufDescQRead->USpaceMap),

75ab5f91d942eea4138efe4799ca0589870c3899lh mp->b_rptr, length);

75ab5f91d942eea4138efe4799ca0589870c3899lh mp->b_wptr = mp->b_rptr + length;

75ab5f91d942eea4138efe4799ca0589870c3899lh statistics->rx_ok_packets ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (*last_mp == NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh *last_mp = mp;

75ab5f91d942eea4138efe4799ca0589870c3899lh } else {

75ab5f91d942eea4138efe4799ca0589870c3899lh (*last_mp)->b_next = mp;

75ab5f91d942eea4138efe4799ca0589870c3899lh *last_mp = mp;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhNext_Descriptor:

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_MCNT = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_SOP = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_EOP = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_PAM = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_BAM = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->TT = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh descriptor->Rx_OWN = 1;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQRead->descriptor++;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQRead->USpaceMap++;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pNonphysical->RxBufDescQRead->descriptor >

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQEnd->descriptor) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQRead->descriptor =

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQStart->descriptor;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQRead->USpaceMap =

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->RxBufDescQStart->USpaceMap;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh mutex_exit(&pOdl->mdlRcvLock);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_TRUE);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhfailed:

75ab5f91d942eea4138efe4799ca0589870c3899lh mutex_exit(&pOdl->mdlRcvLock);

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_receive(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh int numOfPkts = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct odl *pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh mblk_t *ret_mp = NULL, *last_mp = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl = pLayerPointers->pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh rw_enter(&pOdl->chip_lock, RW_READER);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (!pLayerPointers->run) {

75ab5f91d942eea4138efe4799ca0589870c3899lh rw_exit(&pOdl->chip_lock);

75ab5f91d942eea4138efe4799ca0589870c3899lh return;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pOdl->pause_interval > 0)

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->pause_interval --;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh while (numOfPkts < RX_RING_SIZE) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (!amd8111s_recv_copy(pLayerPointers, &last_mp)) {

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ret_mp == NULL)

75ab5f91d942eea4138efe4799ca0589870c3899lh ret_mp = last_mp;

75ab5f91d942eea4138efe4799ca0589870c3899lh numOfPkts++;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ret_mp) {

da14cebe459d3275048785f25bd869cb09b5307fEric Cheng mac_rx(pOdl->mh, NULL, ret_mp);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) ddi_dma_sync(pOdl->rx_desc_dma_handle, 0, 0,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_DMA_SYNC_FORDEV);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlReceive(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh rw_exit(&pOdl->chip_lock);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_log(struct LayerPointers *adapter, int level, char *fmt, ...)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh auto char name[32];

75ab5f91d942eea4138efe4799ca0589870c3899lh auto char buf[256];

75ab5f91d942eea4138efe4799ca0589870c3899lh va_list ap;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (adapter != NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) sprintf(name, "amd8111s%d",

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_get_instance(adapter->pOdl->devinfo));

75ab5f91d942eea4138efe4799ca0589870c3899lh } else {

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) sprintf(name, "amd8111s");

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh va_start(ap, fmt);

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) vsprintf(buf, fmt, ap);

75ab5f91d942eea4138efe4799ca0589870c3899lh va_end(ap);

75ab5f91d942eea4138efe4799ca0589870c3899lh cmn_err(level, "%s: %s", name, buf);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_odlInit(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh unsigned long mem_req_array[MEM_REQ_MAX];

75ab5f91d942eea4138efe4799ca0589870c3899lh unsigned long mem_set_array[MEM_REQ_MAX];

75ab5f91d942eea4138efe4799ca0589870c3899lh unsigned long *pmem_req_array;

75ab5f91d942eea4138efe4799ca0589870c3899lh unsigned long *pmem_set_array;

75ab5f91d942eea4138efe4799ca0589870c3899lh int i, size;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh for (i = 0; i < MEM_REQ_MAX; i++) {

75ab5f91d942eea4138efe4799ca0589870c3899lh mem_req_array[i] = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh mem_set_array[i] = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh milRequestResources(mem_req_array);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_req_array = mem_req_array;

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_set_array = mem_set_array;

75ab5f91d942eea4138efe4799ca0589870c3899lh while (*pmem_req_array) {

75ab5f91d942eea4138efe4799ca0589870c3899lh switch (*pmem_req_array) {

75ab5f91d942eea4138efe4799ca0589870c3899lh case VIRTUAL:

75ab5f91d942eea4138efe4799ca0589870c3899lh *pmem_set_array = VIRTUAL;

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_req_array++;

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_set_array++;

75ab5f91d942eea4138efe4799ca0589870c3899lh *(pmem_set_array) = *(pmem_req_array);

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_set_array++;

75ab5f91d942eea4138efe4799ca0589870c3899lh *(pmem_set_array) = (unsigned long) kmem_zalloc(

75ab5f91d942eea4138efe4799ca0589870c3899lh *(pmem_req_array), KM_NOSLEEP);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (*pmem_set_array == NULL)

75ab5f91d942eea4138efe4799ca0589870c3899lh goto odl_init_failure;

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_req_array++;

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_set_array++;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh milSetResources(pLayerPointers, mem_set_array);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Allocate Rx/Tx descriptors */

75ab5f91d942eea4138efe4799ca0589870c3899lh if (amd8111s_allocate_descriptors(pLayerPointers) != B_TRUE) {

75ab5f91d942eea4138efe4799ca0589870c3899lh *pmem_set_array = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh goto odl_init_failure;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (amd8111s_allocate_buffers(pLayerPointers) == B_FALSE) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_free_descriptors(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh *pmem_set_array = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh goto odl_init_failure;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh milInitGlbds(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (0);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhodl_init_failure:

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_req_array = mem_set_array;

75ab5f91d942eea4138efe4799ca0589870c3899lh while ((*pmem_req_array) && (pmem_req_array != pmem_set_array)) {

75ab5f91d942eea4138efe4799ca0589870c3899lh switch (*pmem_req_array) {

75ab5f91d942eea4138efe4799ca0589870c3899lh case VIRTUAL:

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_req_array++; /* Size */

75ab5f91d942eea4138efe4799ca0589870c3899lh size = *(pmem_req_array);

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_req_array++; /* Virtual Address */

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pmem_req_array == NULL)

75ab5f91d942eea4138efe4799ca0589870c3899lh return (1);

75ab5f91d942eea4138efe4799ca0589870c3899lh kmem_free((int *)*pmem_req_array, size);

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh pmem_req_array++;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh return (1);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_allocate_descriptors(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct odl *pOdl = pLayerPointers->pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct mil *pMil = pLayerPointers->pMil;

75ab5f91d942eea4138efe4799ca0589870c3899lh dev_info_t *devinfo = pOdl->devinfo;

75ab5f91d942eea4138efe4799ca0589870c3899lh uint_t length, count, i;

75ab5f91d942eea4138efe4799ca0589870c3899lh size_t real_length;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ddi_dma_alloc_handle(devinfo, &pcn_desc_dma_attr_t, DDI_DMA_SLEEP,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, &pOdl->rx_desc_dma_handle) != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_alloc_handle for Rx desc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->rx_desc_dma_handle = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh length = sizeof (struct rx_desc) * RX_RING_SIZE + ALIGNMENT;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ddi_dma_mem_alloc(pOdl->rx_desc_dma_handle, length,

75ab5f91d942eea4138efe4799ca0589870c3899lh &pcn_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, (caddr_t *)&pMil->Rx_desc_original, &real_length,

75ab5f91d942eea4138efe4799ca0589870c3899lh &pOdl->rx_desc_acc_handle) != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_mem_handle for Rx desc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pOdl->rx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->rx_desc_dma_handle = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ddi_dma_addr_bind_handle(pOdl->rx_desc_dma_handle,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, (caddr_t)pMil->Rx_desc_original, real_length,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, &pOdl->rx_desc_dma_cookie,

75ab5f91d942eea4138efe4799ca0589870c3899lh &count) != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_addr_bind_handle for Rx desc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_mem_free(&pOdl->rx_desc_acc_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pOdl->rx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->rx_desc_dma_handle = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh ASSERT(count == 1);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Initialize Rx descriptors related variables */

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->Rx_desc = (struct rx_desc *)

75ab5f91d942eea4138efe4799ca0589870c3899lh ((pMil->Rx_desc_original + ALIGNMENT) & ~ALIGNMENT);

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->Rx_desc_pa = (unsigned int)

75ab5f91d942eea4138efe4799ca0589870c3899lh ((pOdl->rx_desc_dma_cookie.dmac_laddress + ALIGNMENT) & ~ALIGNMENT);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pMdl->init_blk->RDRA = pMil->Rx_desc_pa;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ddi_dma_alloc_handle(devinfo, &pcn_desc_dma_attr_t, DDI_DMA_SLEEP,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, &pOdl->tx_desc_dma_handle) != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_alloc_handle for Tx desc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto allocate_desc_fail;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh length = sizeof (struct tx_desc) * TX_RING_SIZE + ALIGNMENT;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ddi_dma_mem_alloc(pOdl->tx_desc_dma_handle, length,

75ab5f91d942eea4138efe4799ca0589870c3899lh &pcn_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, (caddr_t *)&pMil->Tx_desc_original, &real_length,

75ab5f91d942eea4138efe4799ca0589870c3899lh &pOdl->tx_desc_acc_handle) != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_mem_handle for Tx desc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pOdl->tx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh goto allocate_desc_fail;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ddi_dma_addr_bind_handle(pOdl->tx_desc_dma_handle,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, (caddr_t)pMil->Tx_desc_original, real_length,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP,

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, &pOdl->tx_desc_dma_cookie,

75ab5f91d942eea4138efe4799ca0589870c3899lh &count) != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_addr_bind_handle for Tx desc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_mem_free(&pOdl->tx_desc_acc_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pOdl->tx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh goto allocate_desc_fail;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh ASSERT(count == 1);

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Set the DMA area to all zeros */

75ab5f91d942eea4138efe4799ca0589870c3899lh bzero((caddr_t)pMil->Tx_desc_original, length);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Initialize Tx descriptors related variables */

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->Tx_desc = (struct tx_desc *)

75ab5f91d942eea4138efe4799ca0589870c3899lh ((pMil->Tx_desc_original + ALIGNMENT) & ~ALIGNMENT);

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQRead = pMil->Tx_desc;

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQWrite = pMil->Tx_desc;

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQStart = pMil->Tx_desc;

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQEnd = &(pMil->Tx_desc[TX_RING_SIZE -1]);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Physical Addr of Tx_desc_original & Tx_desc */

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pMil->Tx_desc_pa =

75ab5f91d942eea4138efe4799ca0589870c3899lh ((pOdl->tx_desc_dma_cookie.dmac_laddress + ALIGNMENT) &

75ab5f91d942eea4138efe4799ca0589870c3899lh ~ALIGNMENT);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Setting the reserved bits in the tx descriptors */

75ab5f91d942eea4138efe4799ca0589870c3899lh for (i = 0; i < TX_RING_SIZE; i++) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQWrite->Tx_RES0 = 0x0f;

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQWrite->Tx_OWN = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQWrite++;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh pMil->pNonphysical->TxDescQWrite = pMil->pNonphysical->TxDescQStart;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pMdl->init_blk->TDRA = pMil->Tx_desc_pa;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_TRUE);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhallocate_desc_fail:

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->tx_desc_dma_handle = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) ddi_dma_unbind_handle(pOdl->rx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_mem_free(&pOdl->rx_desc_acc_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pOdl->rx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->rx_desc_dma_handle = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_free_descriptors(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct odl *pOdl = pLayerPointers->pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Free Rx descriptors */

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pOdl->rx_desc_dma_handle) {

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) ddi_dma_unbind_handle(pOdl->rx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_mem_free(&pOdl->rx_desc_acc_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pOdl->rx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->rx_desc_dma_handle = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Free Rx descriptors */

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pOdl->tx_desc_dma_handle) {

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) ddi_dma_unbind_handle(pOdl->tx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_mem_free(&pOdl->tx_desc_acc_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pOdl->tx_desc_dma_handle);

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->tx_desc_dma_handle = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_alloc_dma_ringbuf(struct LayerPointers *pLayerPointers,

75ab5f91d942eea4138efe4799ca0589870c3899lh struct amd8111s_dma_ringbuf *pRing,

75ab5f91d942eea4138efe4799ca0589870c3899lh uint32_t ring_size, uint32_t msg_size)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh uint32_t idx, msg_idx = 0, msg_acc;

75ab5f91d942eea4138efe4799ca0589870c3899lh dev_info_t *devinfo = pLayerPointers->pOdl->devinfo;

75ab5f91d942eea4138efe4799ca0589870c3899lh size_t real_length;

75ab5f91d942eea4138efe4799ca0589870c3899lh uint_t count = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh ASSERT(pcn_buff_dma_attr_t.dma_attr_align == 1);

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->dma_buf_sz = msg_size;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->ring_size = ring_size;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_num = AMD8111S_SPLIT;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->buf_sz = msg_size * ring_size;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ring_size < pRing->trunk_num)

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_num = ring_size;

75ab5f91d942eea4138efe4799ca0589870c3899lh ASSERT((pRing->buf_sz % pRing->trunk_num) == 0);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_sz = pRing->buf_sz / pRing->trunk_num;

75ab5f91d942eea4138efe4799ca0589870c3899lh ASSERT((pRing->trunk_sz % pRing->dma_buf_sz) == 0);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->msg_buf = kmem_zalloc(sizeof (struct amd8111s_msgbuf) *

75ab5f91d942eea4138efe4799ca0589870c3899lh ring_size, KM_NOSLEEP);

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->dma_hdl = kmem_zalloc(sizeof (ddi_dma_handle_t) *

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_num, KM_NOSLEEP);

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->acc_hdl = kmem_zalloc(sizeof (ddi_acc_handle_t) *

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_num, KM_NOSLEEP);

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->dma_cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) *

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_num, KM_NOSLEEP);

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_addr = kmem_zalloc(sizeof (caddr_t) *

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_num, KM_NOSLEEP);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->msg_buf == NULL || pRing->dma_hdl == NULL ||

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->acc_hdl == NULL || pRing->trunk_addr == NULL ||

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->dma_cookie == NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_NOTE,

75ab5f91d942eea4138efe4799ca0589870c3899lh "kmem_zalloc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto failed;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh for (idx = 0; idx < pRing->trunk_num; ++idx) {

75ab5f91d942eea4138efe4799ca0589870c3899lh if (ddi_dma_alloc_handle(devinfo, &pcn_buff_dma_attr_t,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_DMA_SLEEP, NULL, &(pRing->dma_hdl[idx]))

75ab5f91d942eea4138efe4799ca0589870c3899lh != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_alloc_handle failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto failed;

75ab5f91d942eea4138efe4799ca0589870c3899lh } else if (ddi_dma_mem_alloc(pRing->dma_hdl[idx],

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_sz, &pcn_acc_attr, DDI_DMA_STREAMING,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_DMA_SLEEP, NULL,

75ab5f91d942eea4138efe4799ca0589870c3899lh (caddr_t *)&(pRing->trunk_addr[idx]),

75ab5f91d942eea4138efe4799ca0589870c3899lh (size_t *)(&real_length), &pRing->acc_hdl[idx])

75ab5f91d942eea4138efe4799ca0589870c3899lh != DDI_SUCCESS) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_mem_alloc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto failed;

75ab5f91d942eea4138efe4799ca0589870c3899lh } else if (real_length != pRing->trunk_sz) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_mem_alloc failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto failed;

75ab5f91d942eea4138efe4799ca0589870c3899lh } else if (ddi_dma_addr_bind_handle(pRing->dma_hdl[idx],

75ab5f91d942eea4138efe4799ca0589870c3899lh NULL, (caddr_t)pRing->trunk_addr[idx], real_length,

75ab5f91d942eea4138efe4799ca0589870c3899lh DDI_DMA_WRITE | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL,

75ab5f91d942eea4138efe4799ca0589870c3899lh &pRing->dma_cookie[idx], &count) != DDI_DMA_MAPPED) {

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "ddi_dma_addr_bind_handle failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto failed;

75ab5f91d942eea4138efe4799ca0589870c3899lh } else {

75ab5f91d942eea4138efe4799ca0589870c3899lh for (msg_acc = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh msg_acc < pRing->trunk_sz / pRing->dma_buf_sz;

75ab5f91d942eea4138efe4799ca0589870c3899lh ++ msg_acc) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->msg_buf[msg_idx].offset =

75ab5f91d942eea4138efe4799ca0589870c3899lh msg_acc * pRing->dma_buf_sz;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->msg_buf[msg_idx].vir_addr =

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->trunk_addr[idx] +

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->msg_buf[msg_idx].offset;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->msg_buf[msg_idx].phy_addr =

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->dma_cookie[idx].dmac_laddress +

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->msg_buf[msg_idx].offset;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->msg_buf[msg_idx].p_hdl =

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->dma_hdl[idx];

75ab5f91d942eea4138efe4799ca0589870c3899lh msg_idx ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->free = pRing->msg_buf;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->next = pRing->msg_buf;

75ab5f91d942eea4138efe4799ca0589870c3899lh pRing->curr = pRing->msg_buf;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_TRUE);

75ab5f91d942eea4138efe4799ca0589870c3899lhfailed:

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_free_dma_ringbuf(pRing);

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_free_dma_ringbuf(struct amd8111s_dma_ringbuf *pRing)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh int idx;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->dma_cookie != NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh for (idx = 0; idx < pRing->trunk_num; idx ++) {

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->dma_cookie[idx].dmac_laddress == 0) {

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh (void) ddi_dma_unbind_handle(pRing->dma_hdl[idx]);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh kmem_free(pRing->dma_cookie,

75ab5f91d942eea4138efe4799ca0589870c3899lh sizeof (ddi_dma_cookie_t) * pRing->trunk_num);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->acc_hdl != NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh for (idx = 0; idx < pRing->trunk_num; idx ++) {

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->acc_hdl[idx] == NULL)

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_mem_free(&pRing->acc_hdl[idx]);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh kmem_free(pRing->acc_hdl,

75ab5f91d942eea4138efe4799ca0589870c3899lh sizeof (ddi_acc_handle_t) * pRing->trunk_num);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->dma_hdl != NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh for (idx = 0; idx < pRing->trunk_num; idx ++) {

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->dma_hdl[idx] == 0) {

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_dma_free_handle(&pRing->dma_hdl[idx]);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh kmem_free(pRing->dma_hdl,

75ab5f91d942eea4138efe4799ca0589870c3899lh sizeof (ddi_dma_handle_t) * pRing->trunk_num);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->msg_buf != NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh kmem_free(pRing->msg_buf,

75ab5f91d942eea4138efe4799ca0589870c3899lh sizeof (struct amd8111s_msgbuf) * pRing->ring_size);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pRing->trunk_addr != NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh kmem_free(pRing->trunk_addr,

75ab5f91d942eea4138efe4799ca0589870c3899lh sizeof (caddr_t) * pRing->trunk_num);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh bzero(pRing, sizeof (*pRing));

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_allocate_buffers(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct odl *pOdl = pLayerPointers->pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (amd8111s_alloc_dma_ringbuf(pLayerPointers, &pOdl->rx_buf,

75ab5f91d942eea4138efe4799ca0589870c3899lh RX_RING_SIZE, RX_BUF_SIZE) == B_FALSE) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "amd8111s_alloc_dma_ringbuf for tx failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto allocate_buf_fail;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh if (amd8111s_alloc_dma_ringbuf(pLayerPointers, &pOdl->tx_buf,

75ab5f91d942eea4138efe4799ca0589870c3899lh TX_COALESC_SIZE, TX_BUF_SIZE) == B_FALSE) {

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "amd8111s_alloc_dma_ringbuf for tx failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh goto allocate_buf_fail;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /*

75ab5f91d942eea4138efe4799ca0589870c3899lh milInitGlbds(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh milInitRxQ(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_TRUE);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhallocate_buf_fail:

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_log(pLayerPointers, CE_WARN,

75ab5f91d942eea4138efe4799ca0589870c3899lh "amd8111s_allocate_buffers failed");

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_free_buffers(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Free Tx buffers */

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_free_dma_ringbuf(&pLayerPointers->pOdl->tx_buf);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Free Rx Buffers */

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_free_dma_ringbuf(&pLayerPointers->pOdl->rx_buf);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic int

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_recycle_tx(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct nonphysical *pNonphysical;

75ab5f91d942eea4138efe4799ca0589870c3899lh uint32_t count = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical = pLayerPointers->pMil->pNonphysical;

75ab5f91d942eea4138efe4799ca0589870c3899lh while (pNonphysical->TxDescQRead->Tx_OWN == 0 &&

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQRead != pNonphysical->TxDescQWrite) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl->tx_buf.free =

75ab5f91d942eea4138efe4799ca0589870c3899lh NEXT(pLayerPointers->pOdl->tx_buf, free);

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQRead++;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pNonphysical->TxDescQRead > pNonphysical->TxDescQEnd) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQRead = pNonphysical->TxDescQStart;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh count ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pLayerPointers->pMil->tx_reschedule)

75ab5f91d942eea4138efe4799ca0589870c3899lh ddi_trigger_softintr(pLayerPointers->pOdl->drain_id);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (count);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic void

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_send_serial(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct nonphysical *pNonphysical;

75ab5f91d942eea4138efe4799ca0589870c3899lh uint32_t count;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical = pLayerPointers->pMil->pNonphysical;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mutex_enter(&pLayerPointers->pOdl->mdlSendLock);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh for (count = 0; count < AMD8111S_SEND_MAX; count ++) {

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pLayerPointers->pOdl->tx_buf.curr ==

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl->tx_buf.next) {

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh /* to verify if it needs to recycle the tx Buf */

75ab5f91d942eea4138efe4799ca0589870c3899lh if (((pNonphysical->TxDescQWrite + 1 >

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQEnd) ? pNonphysical->TxDescQStart :

75ab5f91d942eea4138efe4799ca0589870c3899lh (pNonphysical->TxDescQWrite + 1)) ==

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQRead)

75ab5f91d942eea4138efe4799ca0589870c3899lh if (amd8111s_recycle_tx(pLayerPointers) == 0) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl

75ab5f91d942eea4138efe4799ca0589870c3899lh ->statistics.tx_no_descriptor ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh break;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Fill packet length */

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_BCNT = (uint16_t)pLayerPointers

75ab5f91d942eea4138efe4799ca0589870c3899lh ->pOdl->tx_buf.curr->msg_size;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Fill physical buffer address */

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_Base_Addr = (unsigned int)

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl->tx_buf.curr->phy_addr;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_SOP = 1;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_EOP = 1;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_ADD_FCS = 1;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_LTINT = 1;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_USPACE = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite->Tx_OWN = 1;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite++;

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pNonphysical->TxDescQWrite > pNonphysical->TxDescQEnd) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pNonphysical->TxDescQWrite = pNonphysical->TxDescQStart;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl->tx_buf.curr =

75ab5f91d942eea4138efe4799ca0589870c3899lh NEXT(pLayerPointers->pOdl->tx_buf, curr);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl->statistics.tx_ok_packets += count;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mutex_exit(&pLayerPointers->pOdl->mdlSendLock);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* Call mdlTransmit to send the pkt out on the network */

75ab5f91d942eea4138efe4799ca0589870c3899lh mdlTransmit(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic uint_t

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_send_drain(caddr_t arg)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

22eb7cb54d8a6bcf6fe2674cb4b1f0cf2d85cfb6gd struct LayerPointers *pLayerPointers = (void *)arg;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_send_serial(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh if (pLayerPointers->pMil->tx_reschedule &&

75ab5f91d942eea4138efe4799ca0589870c3899lh NEXT(pLayerPointers->pOdl->tx_buf, next) !=

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl->tx_buf.free) {

75ab5f91d942eea4138efe4799ca0589870c3899lh mac_tx_update(pLayerPointers->pOdl->mh);

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pMil->tx_reschedule = B_FALSE;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (DDI_INTR_CLAIMED);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic struct amd8111s_msgbuf *

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_getTxbuf(struct LayerPointers *pLayerPointers)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct amd8111s_msgbuf *tmp, *next;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh mutex_enter(&pLayerPointers->pOdl->mdlSendLock);

75ab5f91d942eea4138efe4799ca0589870c3899lh next = NEXT(pLayerPointers->pOdl->tx_buf, next);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (next == pLayerPointers->pOdl->tx_buf.free) {

75ab5f91d942eea4138efe4799ca0589870c3899lh tmp = NULL;

75ab5f91d942eea4138efe4799ca0589870c3899lh } else {

75ab5f91d942eea4138efe4799ca0589870c3899lh tmp = pLayerPointers->pOdl->tx_buf.next;

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pOdl->tx_buf.next = next;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh mutex_exit(&pLayerPointers->pOdl->mdlSendLock);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh return (tmp);

75ab5f91d942eea4138efe4799ca0589870c3899lh}

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lhstatic boolean_t

75ab5f91d942eea4138efe4799ca0589870c3899lhamd8111s_send(struct LayerPointers *pLayerPointers, mblk_t *mp)

75ab5f91d942eea4138efe4799ca0589870c3899lh{

75ab5f91d942eea4138efe4799ca0589870c3899lh struct odl *pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh size_t frag_len;

75ab5f91d942eea4138efe4799ca0589870c3899lh mblk_t *tmp;

75ab5f91d942eea4138efe4799ca0589870c3899lh struct amd8111s_msgbuf *txBuf;

75ab5f91d942eea4138efe4799ca0589870c3899lh uint8_t *pMsg;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl = pLayerPointers->pOdl;

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* alloc send buffer */

75ab5f91d942eea4138efe4799ca0589870c3899lh txBuf = amd8111s_getTxbuf(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh if (txBuf == NULL) {

75ab5f91d942eea4138efe4799ca0589870c3899lh pOdl->statistics.tx_no_buffer ++;

75ab5f91d942eea4138efe4799ca0589870c3899lh pLayerPointers->pMil->tx_reschedule = B_TRUE;

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_send_serial(pLayerPointers);

75ab5f91d942eea4138efe4799ca0589870c3899lh return (B_FALSE);

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh /* copy packet to send buffer */

75ab5f91d942eea4138efe4799ca0589870c3899lh txBuf->msg_size = 0;

75ab5f91d942eea4138efe4799ca0589870c3899lh pMsg = (uint8_t *)txBuf->vir_addr;

75ab5f91d942eea4138efe4799ca0589870c3899lh for (tmp = mp; tmp; tmp = tmp->b_cont) {

75ab5f91d942eea4138efe4799ca0589870c3899lh frag_len = MBLKL(tmp);

75ab5f91d942eea4138efe4799ca0589870c3899lh bcopy(tmp->b_rptr, pMsg, frag_len);

75ab5f91d942eea4138efe4799ca0589870c3899lh txBuf->msg_size += frag_len;

75ab5f91d942eea4138efe4799ca0589870c3899lh pMsg += frag_len;

75ab5f91d942eea4138efe4799ca0589870c3899lh }

75ab5f91d942eea4138efe4799ca0589870c3899lh freemsg(mp);

75ab5f91d942eea4138efe4799ca0589870c3899lh

75ab5f91d942eea4138efe4799ca0589870c3899lh amd8111s_send_serial(pLayerPointers);