cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * CDDL HEADER START
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cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Common Development and Distribution License (the "License").
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cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * See the License for the specific language governing permissions
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cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * CDDL HEADER END
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Use is subject to license terms.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Global Data
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * For interrupt link devices, if xen_uppc_unconditional_srs is set, an irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * resource will be assigned (via _SRS). If it is not set, use the current
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irq setting (via _CRS), but only if that irq is in the set of possible
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irqs (returned by _PRS) for the device.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * For interrupt link devices, if xen_uppc_prefer_crs is set when we are
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * assigning an IRQ resource to a device, prefer the current IRQ setting
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * over other possible irq settings under same conditions.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/* flag definitions for xen_uppc_verbose */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_verbose & XEN_UPPC_VERBOSE_POWEROFF_FLAG) \
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic uint16_t xen_uppc_irq_shared_table[MAX_ISA_IRQ + 1];
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Contains SCI irqno from FADT after initialization
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Local support routines
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Process SCI configuration here; this may return
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * an error if acpi-user-options has specified
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * legacy mode (use ACPI without ACPI mode or SCI)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Initialize sub-system - if error is returns, ACPI is not
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * uppc implies system is in PIC mode; set edge/level
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * via ELCR based on return value from get_sci; this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * will default to level/low if no override present,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * as recommended by Intel ACPI CA team.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (sci >= 0) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Remember SCI for later use
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_verbose & XEN_UPPC_VERBOSE_POWEROFF_PAUSE_FLAG)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpi_psm_init(xen_uppc_info.p_mach_idstring, verboseflags) ==
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (1);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Autoconfiguration Routines
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* LINTED logical expression always true: op "||" */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj for (i = 0; i <= MAX_ISA_IRQ; i++)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#define XEN_NSEC_PER_TICK 10 /* XXX - assume we have a 100 Mhz clock */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj extern enum tod_fault_type tod_fault(enum tod_fault_type, int);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * domU cannot set the TOD hardware, fault the TOD clock now to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * indicate that and turn off attempts to sync TOD hardware
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * with the hires timer.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * The hypervisor provides a timer based on the local APIC timer.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * The interface supports requests of nanosecond resolution.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * A common frequency of the apic clock is 100 Mhz which
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * gives a resolution of 10 nsec per tick. What we would really like
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * is a way to get the ns per tick value from xen.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * XXPV - This is an assumption that needs checking and may change
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* hypervisor initializes the 8259, don't mess with it */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We never called xen_uppc_addspl() when the SCI
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * interrupt was added because that happened before the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * PSM module was loaded. Fix that up here by doing
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * any missed operations (e.g. bind to CPU)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl)
1a5e258f5471356ca102c7176637cdce45bac147Josef 'Jeff' Sipek atomic_inc_16(&xen_uppc_irq_shared_table[irqno]);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We are called at splhi() so we can't call anything that might end
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * up trying to context switch.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Set priority/affinity/enable for non PIRQs
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl)
1a5e258f5471356ca102c7176637cdce45bac147Josef 'Jeff' Sipek atomic_dec_16(&xen_uppc_irq_shared_table[irqno]);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * unbind if no more sharers of this irq/evtchn
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If still in use reset priority
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (-1);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_POWEROFF(("xen_uppc_shutdown(%d,%d);\n", cmd, fcn));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj switch (cmd) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj switch (fcn) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* fall through if domU or if poweroff fails */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* FALLTHRU */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * This function will reprogram the timer.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * When in oneshot mode the argument is the absolute time in future at which to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * generate the interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * When in periodic mode, the argument is the interval at which the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * interrupts should be generated. There is no need to support the periodic
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * mode timer change at this time.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Note that we must be careful to convert from hrtime to Xen system time (see
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We should be called from high PIL context (CBE_HIGH_PIL),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * so kpreempt is disabled.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * requested to generate an interrupt in the past
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * generate an interrupt as soon as possible
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * This function will enable timer interrupts.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * This function will disable timer interrupts on the current cpu.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If the clock irq is pending on this cpu then we need to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * clear the pending interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Configures the irq for the interrupt link device identified by
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * acpipsmlnkp.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Gets the current and the list of possible irq settings for the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * device. If xen_uppc_unconditional_srs is not set, and the current
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * resource setting is in the list of possible irq settings,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * current irq resource setting is passed to the caller.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Otherwise, picks an irq number from the list of possible irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * settings, and sets the irq of the device to this value.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If prefer_crs is set, among a set of irq numbers in the list that have
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * the least number of devices sharing the interrupt, we pick current irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * resource setting if it is a member of this set.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Passes the irq number in the value pointed to by pci_irqp, and
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * polarity and sensitivity in the structure pointed to by dipintrflagp
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * to the caller.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Note that if setting the irq resource failed, but successfuly obtained
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * the current irq resource settings, passes the current irq resources
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * and considers it a success.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Returns:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * ACPI_PSM_SUCCESS on success.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * ACPI_PSM_FAILURE if an error occured during the configuration or
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * if a suitable irq was not found for this device, or if setting the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irq resource and obtaining the current resource fails.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((acpi_get_possible_irq_resources(acpipsmlnkp, &irqlistp))
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_WARN, "!xVM_uppc: Unable to determine "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "or assign IRQ for device %s, instance #%d: The system was "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "unable to get the list of potential IRQs from ACPI.",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_WARN, "!xVM_uppc: Could not find the "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "current irq %d for device %s, instance #%d in ACPI's "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "list of possible irqs for this device. Picking one from "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj for (foundnow = 0, i = 0; i < irqlistent->num_irqs; i++) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* If we found an IRQ in the inner loop, save the details */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (foundnow && ((chosen_irq != -1) || (share_irq != -1))) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Copy the acpi_prs_private_t and flags from this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irq list entry, since we found an irq from this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* Load the next entry in the irqlist */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: Could not find a "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "suitable irq from the list of possible irqs for device "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "%s, instance #%d in ACPI's list of possible\n",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: Setting irq %d "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((acpi_set_irq_resource(acpipsmlnkp, irq)) == ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * setting irq was successful, check to make sure CRS
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * reflects that. If CRS does not agree with what we
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * set, return the irq that was set.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "IRQ resource set (irqno %d) for device %s "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "instance #%d, differs from current "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "setting irqno %d",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * return the irq that was set, and not what CRS reports,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * since CRS has been seen to be bogus on some systems
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_WARN, "!xVM_uppc: set resource irq %d "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "failed for device %s instance #%d",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_acpi_translate_pci_irq(dev_info_t *dip, int busid, int devid,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((status = acpi_get_irq_cache_ent(busid, devid, ipin, pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: Found irqno %d "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((status = acpi_translate_pci_irq(dip, ipin, pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj " acpi_translate_pci_irq failed for device %s, instance"
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (status == ACPI_PSM_PARTIAL && acpipsmlnk.lnkobj != NULL) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj status = xen_uppc_acpi_irq_configure(&acpipsmlnk, dip, pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "new irq %d for device %s, instance #%d\n",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (ddi_getlongprop_buf(DDI_DEV_T_ANY, ddi_get_parent(dip),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* pci device */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ipin = pci_config_get8(cfg_handle, PCI_CONF_IPIN) - PCI_INTA;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "new irq %d old irq %d device %s, instance %d\n",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Make sure pci_irq is within range.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Otherwise, fall through and return irqno.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Update the device's ILINE byte,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * in case uppc_acpi_translate_pci_irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * has choosen a different pci_irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * than the BIOS has configured.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Some chipsets use the value in
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * ILINE to control interrupt routing,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * in conflict with the PCI spec.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* FALLTHRU to common case - returning irqno */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* non-PCI; assumes ISA-style edge-triggered */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * xen_uppc_intr_enter() acks the event that triggered the interrupt and
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * returns the new priority level,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(cpu->cpu_m.mcpu_vcpu_info->evtchn_upcall_mask != 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (newipl == 0) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * (newipl == 0) means we have no service routines for this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * vector. We will treat this as a spurious interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We have cleared the pending bit already, clear the event
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * mask and return a spurious interrupt. This case can happen
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * when an interrupt delivery is racing with the removal of
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * of the service routine for that interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * (newipl <= cpu->cpu_pri) means that we must be trying to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * service a vector that was shared with a higher priority
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * isr. The higher priority handler has been removed and
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * we need to service this int. We can't return a lower
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * priority than current cpu priority. Just synthesize a
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * priority to return that should be acceptable.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void xen_uppc_setspl(int);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * xen_uppc_intr_exit() restores the old interrupt
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * priority level after processing an interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * It is called with interrupts disabled, and does not enable interrupts.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/* ARGSUSED */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Check if new ipl level allows delivery of previously unserviced events
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If new ipl level will enable any pending interrupts, setup so the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * upcoming sti will cause us to get an upcall.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pending = cpu->cpu_m.mcpu_intr_pending & ~((1 << (ipl + 1)) - 1);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * The rest of the file is just generic psm module boilerplate
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_get_next_processorid, /* psm_get_next_processorid */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (int (*)(processorid_t, caddr_t))NULL, /* psm_cpu_start */
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu (int (*)(psm_state_request_t *))NULL, /* psm_state */
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu (int (*)(psm_cpu_request_t *))NULL /* psm_cpu_ops */