cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * CDDL HEADER START
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * The contents of this file are subject to the terms of the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Common Development and Distribution License (the "License").
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * You may not use this file except in compliance with the License.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * or http://www.opensolaris.org/os/licensing.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * See the License for the specific language governing permissions
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * and limitations under the License.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * When distributing Covered Code, include this CDDL HEADER in each
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If applicable, add the following below this CDDL HEADER, with the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * fields enclosed by brackets "[]" replaced with your own identifying
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * information: Portions Copyright [yyyy] [name of copyright owner]
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * CDDL HEADER END
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Use is subject to license terms.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu#define PSMI_1_7
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/mutex.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/types.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/time.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/clock.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/machlock.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/smp_impldefs.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/uadmin.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/promif.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/psm.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/psm_common.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/atomic.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/archsystm.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/mach_intr.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/hypervisor.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/evtchn_impl.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/modctl.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/trap.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <sys/panic.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <xen/public/vcpu.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#include <xen/public/physdev.h>
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Global Data
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint xen_uppc_use_acpi = 1; /* Use ACPI by default */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint xen_uppc_enable_acpi = 0;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int xen_clock_irq = -1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * For interrupt link devices, if xen_uppc_unconditional_srs is set, an irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * resource will be assigned (via _SRS). If it is not set, use the current
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irq setting (via _CRS), but only if that irq is in the set of possible
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irqs (returned by _PRS) for the device.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint xen_uppc_unconditional_srs = 1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * For interrupt link devices, if xen_uppc_prefer_crs is set when we are
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * assigning an IRQ resource to a device, prefer the current IRQ setting
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * over other possible irq settings under same conditions.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint xen_uppc_prefer_crs = 1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint xen_uppc_verbose = 0;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/* flag definitions for xen_uppc_verbose */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#define XEN_UPPC_VERBOSE_IRQ_FLAG 0x00000001
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#define XEN_UPPC_VERBOSE_POWEROFF_FLAG 0x00000002
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#define XEN_UPPC_VERBOSE_POWEROFF_PAUSE_FLAG 0x00000004
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#define XEN_UPPC_VERBOSE_IRQ(fmt) \
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_verbose & XEN_UPPC_VERBOSE_IRQ_FLAG) \
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj cmn_err fmt;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#define XEN_UPPC_VERBOSE_POWEROFF(fmt) \
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_verbose & XEN_UPPC_VERBOSE_POWEROFF_FLAG) \
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj prom_printf fmt;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjuchar_t xen_uppc_reserved_irqlist[MAX_ISA_IRQ + 1];
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic uint16_t xen_uppc_irq_shared_table[MAX_ISA_IRQ + 1];
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Contains SCI irqno from FADT after initialization
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int xen_uppc_sci = -1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic struct psm_info xen_uppc_info;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Local support routines
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_init_acpi(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int verboseflags = 0;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int sci;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj iflag_t sci_flags;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Process SCI configuration here; this may return
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * an error if acpi-user-options has specified
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * legacy mode (use ACPI without ACPI mode or SCI)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpica_get_sci(&sci, &sci_flags) != AE_OK)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj sci = -1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Initialize sub-system - if error is returns, ACPI is not
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * used.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpica_init() != AE_OK)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * uppc implies system is in PIC mode; set edge/level
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * via ELCR based on return value from get_sci; this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * will default to level/low if no override present,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * as recommended by Intel ACPI CA team.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (sci >= 0) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT((sci_flags.intr_el == INTR_EL_LEVEL) ||
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (sci_flags.intr_el == INTR_EL_EDGE));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj psm_set_elcr(sci, sci_flags.intr_el == INTR_EL_LEVEL);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Remember SCI for later use
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_sci = sci;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_verbose & XEN_UPPC_VERBOSE_IRQ_FLAG)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj verboseflags |= PSM_VERBOSE_IRQ_FLAG;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_verbose & XEN_UPPC_VERBOSE_POWEROFF_FLAG)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj verboseflags |= PSM_VERBOSE_POWEROFF_FLAG;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_verbose & XEN_UPPC_VERBOSE_POWEROFF_PAUSE_FLAG)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj verboseflags |= PSM_VERBOSE_POWEROFF_PAUSE_FLAG;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpi_psm_init(xen_uppc_info.p_mach_idstring, verboseflags) ==
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ACPI_PSM_FAILURE) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (1);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Autoconfiguration Routines
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_probe(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (PSM_SUCCESS);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_softinit(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int i;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* LINTED logical expression always true: op "||" */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT((1 << EVTCHN_SHIFT) == NBBY * sizeof (ulong_t));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (DOMAIN_IS_INITDOMAIN(xen_info)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_use_acpi && xen_uppc_init_acpi()) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj build_reserved_irqlist((uchar_t *)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_reserved_irqlist);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj for (i = 0; i <= MAX_ISA_IRQ; i++)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_irq_shared_table[i] = 0;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_enable_acpi = 1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#define XEN_NSEC_PER_TICK 10 /* XXX - assume we have a 100 Mhz clock */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_clkinit(int hertz)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj extern enum tod_fault_type tod_fault(enum tod_fault_type, int);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj extern int dosynctodr;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * domU cannot set the TOD hardware, fault the TOD clock now to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * indicate that and turn off attempts to sync TOD hardware
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * with the hires timer.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (!DOMAIN_IS_INITDOMAIN(xen_info)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj mutex_enter(&tod_lock);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) tod_fault(TOD_RDONLY, 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj dosynctodr = 0;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj mutex_exit(&tod_lock);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * The hypervisor provides a timer based on the local APIC timer.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * The interface supports requests of nanosecond resolution.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * A common frequency of the apic clock is 100 Mhz which
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * gives a resolution of 10 nsec per tick. What we would really like
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * is a way to get the ns per tick value from xen.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * XXPV - This is an assumption that needs checking and may change
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (XEN_NSEC_PER_TICK);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_picinit()
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int irqno;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (DOMAIN_IS_INITDOMAIN(xen_info)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#if 0
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* hypervisor initializes the 8259, don't mess with it */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj picsetup(); /* initialise the 8259 */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj#endif
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We never called xen_uppc_addspl() when the SCI
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * interrupt was added because that happened before the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * PSM module was loaded. Fix that up here by doing
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * any missed operations (e.g. bind to CPU)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((irqno = xen_uppc_sci) >= 0) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_enable_irq(irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int ret = PSM_SUCCESS;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj cpuset_t cpus;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (irqno >= 0 && irqno <= MAX_ISA_IRQ)
1a5e258f5471356ca102c7176637cdce45bac147Josef 'Jeff' Sipek atomic_inc_16(&xen_uppc_irq_shared_table[irqno]);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We are called at splhi() so we can't call anything that might end
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * up trying to context switch.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (irqno >= PIRQ_BASE && irqno < NR_PIRQS &&
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj DOMAIN_IS_INITDOMAIN(xen_info)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj CPUSET_ZERO(cpus);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj CPUSET_ADD(cpus, 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_setup_pirq(irqno, ipl, &cpus);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj } else {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Set priority/affinity/enable for non PIRQs
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ret = ec_set_irq_priority(irqno, ipl);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(ret == 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj CPUSET_ZERO(cpus);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj CPUSET_ADD(cpus, 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_set_irq_affinity(irqno, cpus);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_enable_irq(irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (ret);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int err = PSM_SUCCESS;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (irqno >= 0 && irqno <= MAX_ISA_IRQ)
1a5e258f5471356ca102c7176637cdce45bac147Josef 'Jeff' Sipek atomic_dec_16(&xen_uppc_irq_shared_table[irqno]);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (irqno >= PIRQ_BASE && irqno < NR_PIRQS &&
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj DOMAIN_IS_INITDOMAIN(xen_info)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (max_ipl == PSM_INVALID_IPL) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * unbind if no more sharers of this irq/evtchn
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) ec_block_irq(irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_unbind_irq(irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj } else {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If still in use reset priority
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj err = ec_set_irq_priority(irqno, max_ipl);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj } else {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) ec_block_irq(irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_unbind_irq(irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (err);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic processorid_t
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_get_next_processorid(processorid_t id)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (id == -1)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (-1);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_get_clockirq(int ipl)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_clock_irq != -1)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (xen_clock_irq);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_clock_irq = ec_bind_virq_to_irq(VIRQ_TIMER, 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (xen_clock_irq);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_shutdown(int cmd, int fcn)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_POWEROFF(("xen_uppc_shutdown(%d,%d);\n", cmd, fcn));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj switch (cmd) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj case A_SHUTDOWN:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj switch (fcn) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj case AD_BOOT:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj case AD_IBOOT:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) HYPERVISOR_shutdown(SHUTDOWN_reboot);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj break;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj case AD_POWEROFF:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* fall through if domU or if poweroff fails */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (DOMAIN_IS_INITDOMAIN(xen_info))
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_enable_acpi)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) acpi_poweroff();
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* FALLTHRU */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj case AD_HALT:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj default:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) HYPERVISOR_shutdown(SHUTDOWN_poweroff);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj break;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj break;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj case A_REBOOT:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) HYPERVISOR_shutdown(SHUTDOWN_reboot);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj break;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj default:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * This function will reprogram the timer.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * When in oneshot mode the argument is the absolute time in future at which to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * generate the interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * When in periodic mode, the argument is the interval at which the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * interrupts should be generated. There is no need to support the periodic
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * mode timer change at this time.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Note that we must be careful to convert from hrtime to Xen system time (see
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * xpv_timestamp.c).
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_timer_reprogram(hrtime_t timer_req)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj hrtime_t now, timer_new, time_delta, xen_time;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ulong_t flags;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj flags = intr_clear();
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We should be called from high PIL context (CBE_HIGH_PIL),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * so kpreempt is disabled.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj now = xpv_gethrtime();
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_time = xpv_getsystime();
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (timer_req <= now) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * requested to generate an interrupt in the past
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * generate an interrupt as soon as possible
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj time_delta = XEN_NSEC_PER_TICK;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj } else
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj time_delta = timer_req - now;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj timer_new = xen_time + time_delta;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (HYPERVISOR_set_timer_op(timer_new) != 0)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj panic("can't set hypervisor timer?");
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj intr_restore(flags);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * This function will enable timer interrupts.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_timer_enable(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_unmask_irq(xen_clock_irq);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * This function will disable timer interrupts on the current cpu.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_timer_disable(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void) ec_block_irq(xen_clock_irq);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If the clock irq is pending on this cpu then we need to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * clear the pending interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_unpend_irq(xen_clock_irq);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Configures the irq for the interrupt link device identified by
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * acpipsmlnkp.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Gets the current and the list of possible irq settings for the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * device. If xen_uppc_unconditional_srs is not set, and the current
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * resource setting is in the list of possible irq settings,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * current irq resource setting is passed to the caller.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Otherwise, picks an irq number from the list of possible irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * settings, and sets the irq of the device to this value.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If prefer_crs is set, among a set of irq numbers in the list that have
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * the least number of devices sharing the interrupt, we pick current irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * resource setting if it is a member of this set.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Passes the irq number in the value pointed to by pci_irqp, and
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * polarity and sensitivity in the structure pointed to by dipintrflagp
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * to the caller.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Note that if setting the irq resource failed, but successfuly obtained
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * the current irq resource settings, passes the current irq resources
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * and considers it a success.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Returns:
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * ACPI_PSM_SUCCESS on success.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * ACPI_PSM_FAILURE if an error occured during the configuration or
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * if a suitable irq was not found for this device, or if setting the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irq resource and obtaining the current resource fails.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int *pci_irqp, iflag_t *dipintr_flagp)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int i, min_share, foundnow, done = 0;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int32_t irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int32_t share_irq = -1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int32_t chosen_irq = -1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int cur_irq = -1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj acpi_irqlist_t *irqlistp;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj acpi_irqlist_t *irqlistent;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((acpi_get_possible_irq_resources(acpipsmlnkp, &irqlistp))
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj == ACPI_PSM_FAILURE) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_WARN, "!xVM_uppc: Unable to determine "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "or assign IRQ for device %s, instance #%d: The system was "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "unable to get the list of potential IRQs from ACPI.",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (ACPI_PSM_FAILURE);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj dipintr_flagp) == ACPI_PSM_SUCCESS) &&
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (!xen_uppc_unconditional_srs) &&
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (cur_irq > 0)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpi_irqlist_find_irq(irqlistp, cur_irq, NULL)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj == ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj acpi_free_irqlist(irqlistp);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(pci_irqp != NULL);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *pci_irqp = cur_irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (ACPI_PSM_SUCCESS);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_WARN, "!xVM_uppc: Could not find the "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "current irq %d for device %s, instance #%d in ACPI's "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "list of possible irqs for this device. Picking one from "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj " the latter list.", cur_irq, ddi_get_name(dip),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj irqlistent = irqlistp;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj min_share = 255;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj while (irqlistent != NULL) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj for (foundnow = 0, i = 0; i < irqlistent->num_irqs; i++) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj irq = irqlistp->irqs[i];
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((irq > MAX_ISA_IRQ) ||
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (irqlistent->intr_flags.intr_el == INTR_EL_EDGE) ||
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (irq == 0))
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj continue;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_reserved_irqlist[irq])
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj continue;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_irq_shared_table[irq] == 0) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj chosen_irq = irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj foundnow = 1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (!(xen_uppc_prefer_crs) ||
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (irq == cur_irq)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj done = 1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj break;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((xen_uppc_irq_shared_table[irq] < min_share) ||
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ((xen_uppc_irq_shared_table[irq] == min_share) &&
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (cur_irq == irq) && (xen_uppc_prefer_crs))) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj min_share = xen_uppc_irq_shared_table[irq];
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj share_irq = irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj foundnow = 1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* If we found an IRQ in the inner loop, save the details */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (foundnow && ((chosen_irq != -1) || (share_irq != -1))) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Copy the acpi_prs_private_t and flags from this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * irq list entry, since we found an irq from this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * entry.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj acpipsmlnkp->acpi_prs_prv = irqlistent->acpi_prs_prv;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *dipintr_flagp = irqlistent->intr_flags;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (done)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj break;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* Load the next entry in the irqlist */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj irqlistent = irqlistent->next;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj acpi_free_irqlist(irqlistp);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (chosen_irq != -1)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj irq = chosen_irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj else if (share_irq != -1)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj irq = share_irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj else {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: Could not find a "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "suitable irq from the list of possible irqs for device "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "%s, instance #%d in ACPI's list of possible\n",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (ACPI_PSM_FAILURE);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: Setting irq %d "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "for device %s instance #%d\n", irq, ddi_get_name(dip),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((acpi_set_irq_resource(acpipsmlnkp, irq)) == ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * setting irq was successful, check to make sure CRS
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * reflects that. If CRS does not agree with what we
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * set, return the irq that was set.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj dipintr_flagp) == ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (cur_irq != irq)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_WARN, "!xVM_uppc: "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "IRQ resource set (irqno %d) for device %s "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "instance #%d, differs from current "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "setting irqno %d",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj irq, ddi_get_name(dip),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_instance(dip), cur_irq));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * return the irq that was set, and not what CRS reports,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * since CRS has been seen to be bogus on some systems
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj cur_irq = irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj } else {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_WARN, "!xVM_uppc: set resource irq %d "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "failed for device %s instance #%d",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj irq, ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (cur_irq == -1)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (ACPI_PSM_FAILURE);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(pci_irqp != NULL);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *pci_irqp = cur_irq;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (ACPI_PSM_SUCCESS);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_acpi_translate_pci_irq(dev_info_t *dip, int busid, int devid,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int ipin, int *pci_irqp, iflag_t *intr_flagp)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int status;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj acpi_psm_lnk_t acpipsmlnk;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((status = acpi_get_irq_cache_ent(busid, devid, ipin, pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj intr_flagp)) == ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: Found irqno %d "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "from cache for device %s, instance #%d\n", *pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (status);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj bzero(&acpipsmlnk, sizeof (acpi_psm_lnk_t));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((status = acpi_translate_pci_irq(dip, ipin, pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj intr_flagp, &acpipsmlnk)) == ACPI_PSM_FAILURE) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj " acpi_translate_pci_irq failed for device %s, instance"
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj " #%d\n", ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (status);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (status == ACPI_PSM_PARTIAL && acpipsmlnk.lnkobj != NULL) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj status = xen_uppc_acpi_irq_configure(&acpipsmlnk, dip, pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj intr_flagp);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (status != ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj status = acpi_get_current_irq_resource(&acpipsmlnk,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pci_irqp, intr_flagp);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (status == ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj acpi_new_irq_cache_ent(busid, devid, ipin, *pci_irqp,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj intr_flagp, &acpipsmlnk);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj psm_set_elcr(*pci_irqp, 1); /* set IRQ to PCI mode */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: [ACPI] "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "new irq %d for device %s, instance #%d\n",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj *pci_irqp, ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (status);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_translate_irq(dev_info_t *dip, int irqno)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj char dev_type[16];
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int dev_len, pci_irq, devid, busid;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_acc_handle_t cfg_handle;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj uchar_t ipin, iline;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj iflag_t intr_flag;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (dip == NULL) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: irqno = %d"
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj " dip = NULL\n", irqno));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (!xen_uppc_enable_acpi) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj dev_len = sizeof (dev_type);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (ddi_getlongprop_buf(DDI_DEV_T_ANY, ddi_get_parent(dip),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj DDI_PROP_DONTPASS, "device_type", (caddr_t)dev_type,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj &dev_len) != DDI_PROP_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: irqno %d"
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj " device %s instance %d no device_type\n", irqno,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if ((strcmp(dev_type, "pci") == 0) ||
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (strcmp(dev_type, "pciex") == 0)) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* pci device */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (acpica_get_bdf(dip, &busid, &devid, NULL) != 0)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (pci_config_setup(dip, &cfg_handle) != DDI_SUCCESS)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ipin = pci_config_get8(cfg_handle, PCI_CONF_IPIN) - PCI_INTA;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj iline = pci_config_get8(cfg_handle, PCI_CONF_ILINE);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (xen_uppc_acpi_translate_pci_irq(dip, busid, devid,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ipin, &pci_irq, &intr_flag) == ACPI_PSM_SUCCESS) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: [ACPI] "
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "new irq %d old irq %d device %s, instance %d\n",
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pci_irq, irqno, ddi_get_name(dip),
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Make sure pci_irq is within range.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Otherwise, fall through and return irqno.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (pci_irq <= MAX_ISA_IRQ) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (iline != pci_irq) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Update the device's ILINE byte,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * in case uppc_acpi_translate_pci_irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * has choosen a different pci_irq
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * than the BIOS has configured.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Some chipsets use the value in
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * ILINE to control interrupt routing,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * in conflict with the PCI spec.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pci_config_put8(cfg_handle,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj PCI_CONF_ILINE, pci_irq);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pci_config_teardown(&cfg_handle);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (pci_irq);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pci_config_teardown(&cfg_handle);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* FALLTHRU to common case - returning irqno */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj } else {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /* non-PCI; assumes ISA-style edge-triggered */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj psm_set_elcr(irqno, 0); /* set IRQ to ISA mode */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj XEN_UPPC_VERBOSE_IRQ((CE_CONT, "!xVM_uppc: non-pci,"
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "irqno %d device %s instance %d\n", irqno,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ddi_get_name(dip), ddi_get_instance(dip)));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (irqno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * xen_uppc_intr_enter() acks the event that triggered the interrupt and
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * returns the new priority level,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*ARGSUSED*/
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic int
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_intr_enter(int ipl, int *vector)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int newipl;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj uint_t intno;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj cpu_t *cpu = CPU;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj intno = (*vector);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(intno < NR_IRQS);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(cpu->cpu_m.mcpu_vcpu_info->evtchn_upcall_mask != 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_clear_irq(intno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj newipl = autovect[intno].avh_hi_pri;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (newipl == 0) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * (newipl == 0) means we have no service routines for this
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * vector. We will treat this as a spurious interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * We have cleared the pending bit already, clear the event
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * mask and return a spurious interrupt. This case can happen
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * when an interrupt delivery is racing with the removal of
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * of the service routine for that interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_unmask_irq(intno);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj newipl = -1; /* flag spurious interrupt */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj } else if (newipl <= cpu->cpu_pri) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * (newipl <= cpu->cpu_pri) means that we must be trying to
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * service a vector that was shared with a higher priority
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * isr. The higher priority handler has been removed and
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * we need to service this int. We can't return a lower
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * priority than current cpu priority. Just synthesize a
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * priority to return that should be acceptable.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj newipl = cpu->cpu_pri + 1; /* synthetic priority */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (newipl);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void xen_uppc_setspl(int);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * xen_uppc_intr_exit() restores the old interrupt
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * priority level after processing an interrupt.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * It is called with interrupts disabled, and does not enable interrupts.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/* ARGSUSED */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_intr_exit(int ipl, int vector)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ec_try_unmask_irq(vector);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_setspl(ipl);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjintr_exit_fn_t
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjpsm_intr_exit_fn(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (xen_uppc_intr_exit);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * Check if new ipl level allows delivery of previously unserviced events
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjxen_uppc_setspl(int ipl)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj struct cpu *cpu = CPU;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj volatile vcpu_info_t *vci = cpu->cpu_m.mcpu_vcpu_info;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj uint16_t pending;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(vci->evtchn_upcall_mask != 0);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj /*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * If new ipl level will enable any pending interrupts, setup so the
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * upcoming sti will cause us to get an upcall.
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pending = cpu->cpu_m.mcpu_intr_pending & ~((1 << (ipl + 1)) - 1);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj if (pending) {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj int i;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ulong_t pending_sels = 0;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj volatile ulong_t *selp;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj struct xen_evt_data *cpe = cpu->cpu_m.mcpu_evt_pend;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj for (i = bsrw_insn(pending); i > ipl; i--)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj pending_sels |= cpe->pending_sel[i];
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj ASSERT(pending_sels);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj selp = (volatile ulong_t *)&vci->evtchn_pending_sel;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj atomic_or_ulong(selp, pending_sels);
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj vci->evtchn_upcall_pending = 1;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj }
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj/*
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj * The rest of the file is just generic psm module boilerplate
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic struct psm_ops xen_uppc_ops = {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_probe, /* psm_probe */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_softinit, /* psm_init */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_picinit, /* psm_picinit */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_intr_enter, /* psm_intr_enter */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_intr_exit, /* psm_intr_exit */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_setspl, /* psm_setspl */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_addspl, /* psm_addspl */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_delspl, /* psm_delspl */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (int (*)(processorid_t))NULL, /* psm_disable_intr */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(processorid_t))NULL, /* psm_enable_intr */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (int (*)(int))NULL, /* psm_softlvl_to_irq */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(int))NULL, /* psm_set_softintr */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(processorid_t))NULL, /* psm_set_idlecpu */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(processorid_t))NULL, /* psm_unset_idlecpu */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_clkinit, /* psm_clkinit */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_get_clockirq, /* psm_get_clockirq */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(void))NULL, /* psm_hrtimeinit */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xpv_gethrtime, /* psm_gethrtime */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_get_next_processorid, /* psm_get_next_processorid */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (int (*)(processorid_t, caddr_t))NULL, /* psm_cpu_start */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (int (*)(void))NULL, /* psm_post_cpu_start */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_shutdown, /* psm_shutdown */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (int (*)(int, int))NULL, /* psm_get_ipivect */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(processorid_t, int))NULL, /* psm_send_ipi */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_translate_irq, /* psm_translate_irq */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(int, char *))NULL, /* psm_notify_error */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(int msg))NULL, /* psm_notify_func */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_timer_reprogram, /* psm_timer_reprogram */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_timer_enable, /* psm_timer_enable */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj xen_uppc_timer_disable, /* psm_timer_disable */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(void *arg))NULL, /* psm_post_cyclic_setup */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (void (*)(int, int))NULL, /* psm_preshutdown */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj (int (*)(dev_info_t *, ddi_intr_handle_impl_t *,
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj psm_intr_op_t, int *))NULL, /* psm_intr_ops */
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu (int (*)(psm_state_request_t *))NULL, /* psm_state */
a31148363f598def767ac48c5d82e1572e44b935Gerry Liu (int (*)(psm_cpu_request_t *))NULL /* psm_cpu_ops */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj};
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic struct psm_info xen_uppc_info = {
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj PSM_INFO_VER01_5, /* version */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj PSM_OWN_SYS_DEFAULT, /* ownership */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj &xen_uppc_ops, /* operation */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "xVM_uppc", /* machine name */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj "UniProcessor PC" /* machine descriptions */
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj};
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjstatic void *xen_uppc_hdlp;
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj_init(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (psm_mod_init(&xen_uppc_hdlp, &xen_uppc_info));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj_fini(void)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (psm_mod_fini(&xen_uppc_hdlp, &xen_uppc_info));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrjint
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj_info(struct modinfo *modinfop)
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj{
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj return (psm_mod_info(&xen_uppc_hdlp, &xen_uppc_info, modinfop));
cc7a88b54b4969574f03e1a1225bb13be487f5dbmrj}