8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * CDDL HEADER START
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * The contents of this file are subject to the terms of the
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * Common Development and Distribution License (the "License").
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * You may not use this file except in compliance with the License.
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * See the License for the specific language governing permissions
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * and limitations under the License.
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * When distributing Covered Code, include this CDDL HEADER in each
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * If applicable, add the following below this CDDL HEADER, with the
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * fields enclosed by brackets "[]" replaced with your own identifying
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * information: Portions Copyright [yyyy] [name of copyright owner]
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * CDDL HEADER END
eca2601cae391051acb146d28fba04237fe1eb85Randy Fishel * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * Use is subject to license terms.
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutusextern "C" {
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* ioat ioctls */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutustypedef enum {
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* *** Driver Private Below *** */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* IOAT_DMACAPABILITY flags */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* IOAT_INTRCTL bits */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* MMIO Registers */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* Channel Registers */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* dca dd_ctrl bits */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* dma dd_ctrl bits */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutustypedef enum {
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* ioat private data per command */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* descriptor ring state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* protects cr_cmpl_gen & cr_cmpl_last */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* desc ring generation for the last completion we saw */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* last descriptor index we saw complete */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* protects cr_desc_* */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * last descriptor posted. used to update its next pointer when we
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * add a new desc. Also used to tack the completion (See comment for
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * cr_desc_gen_prev).
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* where to put the next descriptor */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* what the current desc ring generation is */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * used during cmd_post to track the last desc posted. cr_desc_next
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * and cr_desc_gen will be pointing to the next free desc after
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * writing the descriptor to the ring. But we want to track the
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * completion for the last descriptor posted.
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* the last desc in the ring (for wrap) */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* pointer to the head of the ring */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* physical address of the head of the ring */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* back pointer to the channel state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* for CB v2, number of desc posted (written to IOAT_V2_CHAN_CNT) */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* track channel state so we can handle a failure */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutustypedef enum {
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* channel's ring state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* IOAT_CBv1 || IOAT_CBv2 */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * state to determine if it's OK to post the the channel and if all
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus * future polls should return failure.
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* channel command cache (*_cmd_alloc, *_cmd_free, etc) */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* dcopy state for dcopy_device_channel_notify() call */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* location in memory where completions are DMA'ed into */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* channel specific registers */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* if this channel is using DCA */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* DCA ID the channel is currently pointing to */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* devices channel number */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* number of descriptors in ring */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* descriptor ring alloc state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* completion buffer alloc state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* if inuse, we need to re-init the channel during resume */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* backpointer to driver state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus/* driver state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* register handle and pointer to registers */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* IOAT_CBv1 || IOAT_CBv2 */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* channel state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* device info */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus /* dcopy_device_register()/dcopy_device_unregister() state */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutusint ioat_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *cred,
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutusvoid ioat_rs_init(ioat_state_t *state, uint_t min_val, uint_t max_val,
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutusint ioat_channel_alloc(void *device_private, dcopy_handle_t handle, int flags,
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus uint_t size, dcopy_query_channel_t *info, void *channel_private);
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutusint ioat_cmd_alloc(void *channel, int flags, dcopy_cmd_t *cmd);
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutusvoid ioat_unregister_complete(void *device_private, int status);
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus#endif /* _KERNEL */
8e50dcc9f00b393d43e6aa42b820bcbf1d3e1ce4brutus#endif /* _SYS_IOAT_H */