pci_cfgspace.c revision c88420b3bc75201aa71e3c807fd31e66073a089f
338N/A/*
338N/A * CDDL HEADER START
338N/A *
338N/A * The contents of this file are subject to the terms of the
338N/A * Common Development and Distribution License (the "License").
338N/A * You may not use this file except in compliance with the License.
338N/A *
338N/A * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
338N/A * or http://www.opensolaris.org/os/licensing.
338N/A * See the License for the specific language governing permissions
338N/A * and limitations under the License.
338N/A *
338N/A * When distributing Covered Code, include this CDDL HEADER in each
338N/A * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
338N/A * If applicable, add the following below this CDDL HEADER, with the
338N/A * fields enclosed by brackets "[]" replaced with your own identifying
338N/A * information: Portions Copyright [yyyy] [name of copyright owner]
338N/A *
873N/A * CDDL HEADER END
338N/A */
338N/A
338N/A/*
338N/A * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
338N/A * Use is subject to license terms.
3231N/A */
6190N/A
338N/A#pragma ident "%Z%%M% %I% %E% SMI"
338N/A
338N/A/*
338N/A * PCI configuration space access routines
338N/A */
6190N/A
338N/A#include <sys/systm.h>
4134N/A#include <sys/cmn_err.h>
338N/A#include <sys/psw.h>
338N/A#include <sys/bootconf.h>
338N/A#include <sys/reboot.h>
338N/A#include <sys/pci_impl.h>
338N/A#include <sys/pci_cfgspace.h>
338N/A#include <sys/pci_cfgspace_impl.h>
338N/A
338N/Aint pci_bios_cfg_type = PCI_MECHANISM_UNKNOWN;
2095N/Aint pci_bios_nbus;
2095N/Aint pci_bios_mech;
2095N/Aint pci_bios_vers;
2095N/A
2095N/A/*
338N/A * These two variables can be used to force a configuration mechanism or
338N/A * to force which function is used to probe for the presence of the PCI bus.
338N/A */
338N/Aint PCI_CFG_TYPE = 0;
338N/Aint PCI_PROBE_TYPE = 0;
338N/A
338N/A/*
338N/A * These function pointers lead to the actual implementation routines
338N/A * for configuration space access. Normally they lead to either the
338N/A * pci_mech1_* or pci_mech2_* routines, but they can also lead to
338N/A * routines that work around chipset bugs.
338N/A */
338N/Auint8_t (*pci_getb_func)(int bus, int dev, int func, int reg);
338N/Auint16_t (*pci_getw_func)(int bus, int dev, int func, int reg);
338N/Auint32_t (*pci_getl_func)(int bus, int dev, int func, int reg);
338N/Avoid (*pci_putb_func)(int bus, int dev, int func, int reg, uint8_t val);
338N/Avoid (*pci_putw_func)(int bus, int dev, int func, int reg, uint16_t val);
338N/Avoid (*pci_putl_func)(int bus, int dev, int func, int reg, uint32_t val);
338N/A
338N/A/*
338N/A * Internal routines
338N/A */
338N/Astatic int pci_check(void);
338N/Astatic int pci_check_bios(void);
338N/Astatic int pci_get_cfg_type(void);
338N/A
338N/A/* all config-space access routines share this one... */
338N/Akmutex_t pcicfg_mutex;
338N/A
338N/A/* ..except Orion and Neptune, which have to have their own */
338N/Akmutex_t pcicfg_chipset_mutex;
338N/A
338N/Avoid
338N/Apci_cfgspace_init(void)
338N/A{
338N/A mutex_init(&pcicfg_mutex, NULL, MUTEX_DEFAULT, 0);
338N/A mutex_init(&pcicfg_chipset_mutex, NULL, MUTEX_DEFAULT, 0);
338N/A if (!pci_check()) {
338N/A mutex_destroy(&pcicfg_mutex);
338N/A mutex_destroy(&pcicfg_chipset_mutex);
338N/A }
338N/A}
338N/A
338N/A/*
338N/A * This code determines if this system supports PCI and which
338N/A * type of configuration access method is used
338N/A */
338N/A
338N/Astatic int
338N/Apci_check(void)
338N/A{
338N/A /*
338N/A * Only do this once. NB: If this is not a PCI system, and we
338N/A * get called twice, we can't detect it and will probably die
338N/A * horribly when we try to ask the BIOS whether PCI is present.
338N/A * This code is safe *ONLY* during system startup when the
338N/A * BIOS is still available.
338N/A */
338N/A if (pci_bios_cfg_type != PCI_MECHANISM_UNKNOWN)
338N/A return (TRUE);
338N/A
338N/A pci_bios_cfg_type = pci_check_bios();
338N/A
338N/A if (pci_bios_cfg_type == PCI_MECHANISM_NONE)
338N/A return (FALSE);
338N/A
338N/A switch (pci_get_cfg_type()) {
338N/A case PCI_MECHANISM_1:
338N/A if (pci_is_broken_orion()) {
338N/A pci_getb_func = pci_orion_getb;
338N/A pci_getw_func = pci_orion_getw;
338N/A pci_getl_func = pci_orion_getl;
338N/A pci_putb_func = pci_orion_putb;
338N/A pci_putw_func = pci_orion_putw;
338N/A pci_putl_func = pci_orion_putl;
338N/A } else {
338N/A pci_getb_func = pci_mech1_getb;
338N/A pci_getw_func = pci_mech1_getw;
338N/A pci_getl_func = pci_mech1_getl;
338N/A pci_putb_func = pci_mech1_putb;
338N/A pci_putw_func = pci_mech1_putw;
1177N/A pci_putl_func = pci_mech1_putl;
338N/A }
338N/A break;
338N/A
338N/A case PCI_MECHANISM_2:
338N/A if (pci_check_neptune()) {
338N/A /*
338N/A * The BIOS for some systems with the Intel
338N/A * Neptune chipset seem to default to #2 even
338N/A * though the chipset can do #1. Override
338N/A * the BIOS so that MP systems will work
338N/A * correctly.
338N/A */
338N/A
338N/A pci_getb_func = pci_neptune_getb;
3722N/A pci_getw_func = pci_neptune_getw;
338N/A pci_getl_func = pci_neptune_getl;
338N/A pci_putb_func = pci_neptune_putb;
338N/A pci_putw_func = pci_neptune_putw;
338N/A pci_putl_func = pci_neptune_putl;
6190N/A } else {
338N/A pci_getb_func = pci_mech2_getb;
338N/A pci_getw_func = pci_mech2_getw;
pci_getl_func = pci_mech2_getl;
pci_putb_func = pci_mech2_putb;
pci_putw_func = pci_mech2_putw;
pci_putl_func = pci_mech2_putl;
}
break;
default:
/* Not sure what to do here. */
cmn_err(CE_WARN, "pci: Unknown configuration type");
return (FALSE);
}
return (TRUE);
}
static int
pci_check_bios(void)
{
struct bop_regs regs;
uint32_t carryflag;
uint16_t ax, dx;
bzero(&regs, sizeof (regs));
regs.eax.word.ax = (PCI_FUNCTION_ID << 8) | PCI_BIOS_PRESENT;
BOP_DOINT(bootops, 0x1a, &regs);
carryflag = regs.eflags & PS_C;
ax = regs.eax.word.ax;
dx = regs.edx.word.dx;
/* the carry flag must not be set */
if (carryflag != 0)
return (PCI_MECHANISM_NONE);
if (dx != ('P' | 'C'<<8))
return (PCI_MECHANISM_NONE);
/* ah (the high byte of ax) must be zero */
if ((ax & 0xff00) != 0)
return (PCI_MECHANISM_NONE);
pci_bios_mech = (ax & 0x3);
pci_bios_vers = regs.ebx.word.bx;
pci_bios_nbus = (regs.ecx.word.cx & 0xff);
if (boothowto & RB_VERBOSE)
cmn_err(CE_CONT, "PCI probe mech %x, version 0x%x, # busses %d",
pci_bios_mech, pci_bios_vers, pci_bios_nbus);
switch (pci_bios_mech) {
default: /* ?!? */
case 0: /* supports neither? */
return (PCI_MECHANISM_NONE);
case 1:
case 3: /* supports both */
return (PCI_MECHANISM_1);
case 2:
return (PCI_MECHANISM_2);
}
}
static int
pci_get_cfg_type(void)
{
/* Check to see if the config mechanism has been set in /etc/system */
switch (PCI_CFG_TYPE) {
default:
case 0:
break;
case 1:
return (PCI_MECHANISM_1);
case 2:
return (PCI_MECHANISM_2);
case -1:
return (PCI_MECHANISM_NONE);
}
/* call one of the PCI detection algorithms */
switch (PCI_PROBE_TYPE) {
default:
case 0:
/* From pci_check() and pci_check_bios() */
return (pci_bios_cfg_type);
case -1:
return (PCI_MECHANISM_NONE);
}
}