i86pc/os/mlsetup.c

	mlsetup.c revision 2449e17f82f6097fd2c665b64723e31ceecbeca6
fa9e4066f08beec538e775443c5be79dd423fcabahrens/*
fa9e4066f08beec538e775443c5be79dd423fcabahrens * CDDL HEADER START
fa9e4066f08beec538e775443c5be79dd423fcabahrens *
fa9e4066f08beec538e775443c5be79dd423fcabahrens * The contents of this file are subject to the terms of the
ea8dc4b6d2251b437950c0056bc626b311c73c27eschrock * Common Development and Distribution License (the "License").
ea8dc4b6d2251b437950c0056bc626b311c73c27eschrock * You may not use this file except in compliance with the License.
fa9e4066f08beec538e775443c5be79dd423fcabahrens *
fa9e4066f08beec538e775443c5be79dd423fcabahrens * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
fa9e4066f08beec538e775443c5be79dd423fcabahrens * or http://www.opensolaris.org/os/licensing.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * See the License for the specific language governing permissions
fa9e4066f08beec538e775443c5be79dd423fcabahrens * and limitations under the License.
fa9e4066f08beec538e775443c5be79dd423fcabahrens *
fa9e4066f08beec538e775443c5be79dd423fcabahrens * When distributing Covered Code, include this CDDL HEADER in each
fa9e4066f08beec538e775443c5be79dd423fcabahrens * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * If applicable, add the following below this CDDL HEADER, with the
fa9e4066f08beec538e775443c5be79dd423fcabahrens * fields enclosed by brackets "[]" replaced with your own identifying
fa9e4066f08beec538e775443c5be79dd423fcabahrens * information: Portions Copyright [yyyy] [name of copyright owner]
fa9e4066f08beec538e775443c5be79dd423fcabahrens *
fa9e4066f08beec538e775443c5be79dd423fcabahrens * CDDL HEADER END
fa9e4066f08beec538e775443c5be79dd423fcabahrens */
fa9e4066f08beec538e775443c5be79dd423fcabahrens/*
55da60b91d96984f12de050ce428373ea25c7f35Mark J Musante * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
beb562835cfbfcc73ae96a39ad1ef3e0446d299cShampavman * Use is subject to license terms.
3a5286a1cffceafcd8cf79c4156fad605129bf50Matthew Ahrens */
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens#pragma ident   "%Z%%M% %I% %E% SMI"
55da60b91d96984f12de050ce428373ea25c7f35Mark J Musante
55da60b91d96984f12de050ce428373ea25c7f35Mark J Musante#include <sys/types.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/sysmacros.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/disp.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/promif.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/clock.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/cpuvar.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/stack.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <vm/as.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <vm/hat.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/reboot.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/avintr.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/vtrace.h>
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens#include <sys/proc.h>
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens#include <sys/thread.h>
9966ca11f4a1481acce85f690fa59e4084050627Matthew Ahrens#include <sys/cpupart.h>
0a586cea3ceec7e5e50e7e54c745082a7a333ac2Mark Shellenbaum#include <sys/pset.h>
0a586cea3ceec7e5e50e7e54c745082a7a333ac2Mark Shellenbaum#include <sys/copyops.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/pg.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/disp.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/debug.h>
c55e05cb35da47582b7afd38734d2f0d9c6deb40Matthew Ahrens#include <sys/sunddi.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/x86_archext.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/privregs.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/machsystm.h>
fa9e4066f08beec538e775443c5be79dd423fcabahrens#include <sys/ontrap.h>
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens#include <sys/bootconf.h>
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens#include <sys/kdi_machimpl.h>
feef89cf5f5fee792c1a396bb0e48070935cf65aVictor Latushkin#include <sys/archsystm.h>
feef89cf5f5fee792c1a396bb0e48070935cf65aVictor Latushkin#include <sys/promif.h>
feef89cf5f5fee792c1a396bb0e48070935cf65aVictor Latushkin#include <sys/bootconf.h>
feef89cf5f5fee792c1a396bb0e48070935cf65aVictor Latushkin#include <sys/kobj.h>
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson#include <sys/kobj_lex.h>
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson#include <sys/pci_cfgspace.h>
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson/*
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson * some globals for patching the result of cpuid
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson * to solve problems w/ creative cpu vendors
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson */
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilsonextern uint32_t cpuid_feature_ecx_include;
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilsonextern uint32_t cpuid_feature_ecx_exclude;
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilsonextern uint32_t cpuid_feature_edx_include;
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilsonextern uint32_t cpuid_feature_edx_exclude;
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
fa9e4066f08beec538e775443c5be79dd423fcabahrens/*
fa9e4066f08beec538e775443c5be79dd423fcabahrens * Dummy spl priority masks
fa9e4066f08beec538e775443c5be79dd423fcabahrens */
fa9e4066f08beec538e775443c5be79dd423fcabahrensstatic unsigned char dummy_cpu_pri[MAXIPL + 1] = {
fa9e4066f08beec538e775443c5be79dd423fcabahrens    0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf,
fa9e4066f08beec538e775443c5be79dd423fcabahrens    0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf, 0xf
fa9e4066f08beec538e775443c5be79dd423fcabahrens};
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrensstatic uint32_t
fa9e4066f08beec538e775443c5be79dd423fcabahrensbootprop_getval(char *name)
fa9e4066f08beec538e775443c5be79dd423fcabahrens{
fa9e4066f08beec538e775443c5be79dd423fcabahrens    char prop[32];
fa9e4066f08beec538e775443c5be79dd423fcabahrens    u_longlong_t ll;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    extern struct bootops *bootops;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    if ((BOP_GETPROPLEN(bootops, name) > sizeof (prop)) ||
fa9e4066f08beec538e775443c5be79dd423fcabahrens        (BOP_GETPROP(bootops, name, prop) < 0) ||
fa9e4066f08beec538e775443c5be79dd423fcabahrens        (kobj_getvalue(prop, &ll) == -1))
fa9e4066f08beec538e775443c5be79dd423fcabahrens        return (0);
fa9e4066f08beec538e775443c5be79dd423fcabahrens    return ((uint32_t)ll);
fa9e4066f08beec538e775443c5be79dd423fcabahrens}
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens/*
fa9e4066f08beec538e775443c5be79dd423fcabahrens * Setup routine called right before main(). Interposing this function
fa9e4066f08beec538e775443c5be79dd423fcabahrens * before main() allows us to call it in a machine-independent fashion.
fa9e4066f08beec538e775443c5be79dd423fcabahrens */
fa9e4066f08beec538e775443c5be79dd423fcabahrensvoid
fa9e4066f08beec538e775443c5be79dd423fcabahrensmlsetup(struct regs *rp)
fa9e4066f08beec538e775443c5be79dd423fcabahrens{
fa9e4066f08beec538e775443c5be79dd423fcabahrens    extern struct classfuncs sys_classfuncs;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    extern disp_t cpu0_disp;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    extern char t0stack[];
fa9e4066f08beec538e775443c5be79dd423fcabahrens    int boot_ncpus;
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    ASSERT_STACK_ALIGNED();
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * initialize cpu_self
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    cpu[0]->cpu_self = cpu[0];
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens    /*
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens     * Set up dummy cpu_pri_data values till psm spl code is
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * installed.  This allows splx() to work on amd64.
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    cpu[0]->cpu_pri_data = dummy_cpu_pri;
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling    /*
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling     * check if we've got special bits to clear or set
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling     * when checking cpu features
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling     */
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling    cpuid_feature_ecx_include =
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling        bootprop_getval("cpuid_feature_ecx_include");
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling    cpuid_feature_ecx_exclude =
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling        bootprop_getval("cpuid_feature_ecx_exclude");
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    cpuid_feature_edx_include =
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson        bootprop_getval("cpuid_feature_edx_include");
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    cpuid_feature_edx_exclude =
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson        bootprop_getval("cpuid_feature_edx_exclude");
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    /*
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * The first lightweight pass (pass0) through the cpuid data
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * was done in locore before mlsetup was called.  Do the next
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * pass in C code.
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     *
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * The x86_feature bits are set here on the basis of the capabilities
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * of the boot CPU.  Note that if we choose to support CPUs that have
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * different feature sets (at which point we would almost certainly
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * want to set the feature bits to correspond to the feature
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * minimum) this value may be altered.
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     */
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    x86_feature = cpuid_pass1(cpu[0]);
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    /*
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * Initialize idt0, gdt0, ldt0_default, ktss0 and dftss.
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     */
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    init_desctbls();
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson#if defined(__i386)
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    /*
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * Some i386 processors do not implement the rdtsc instruction,
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * or at least they do not implement it correctly.
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     *
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * For those that do, patch in the rdtsc instructions in
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * various parts of the kernel right now while the text is
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * still writable.
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     */
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    if (x86_feature & X86_TSC)
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson        patch_tsc();
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson#endif  /* __i386 */
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    /*
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * While we're thinking about the TSC, let's set up %cr4 so that
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * userland can issue rdtsc, and initialize the TSC_AUX value
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * (the cpuid) for the rdtscp instruction on appropriately
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     * capable hardware.
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson     */
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    if (x86_feature & X86_TSC)
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson        setcr4(getcr4() & ~CR4_TSD);
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson
2e4c998613148111f2fc5371085331ffb39122ffGeorge Wilson    if (x86_feature & X86_TSCP)
fa9e4066f08beec538e775443c5be79dd423fcabahrens        (void) wrmsr(MSR_AMD_TSCAUX, 0);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    if (x86_feature & X86_DE)
fa9e4066f08beec538e775443c5be79dd423fcabahrens        setcr4(getcr4() | CR4_DE);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * initialize t0
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_stk = (caddr_t)rp - MINFRAME;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_stkbase = t0stack;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_pri = maxclsyspri - 3;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_schedflag = TS_LOAD | TS_DONT_SWAP;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_procp = &p0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_plockp = &p0lock.pl_lock;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_lwp = &lwp0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_forw = &t0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_back = &t0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_next = &t0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_prev = &t0;
8053a26377fa80614ba5221e12b86aab4e8a675eck    t0.t_cpu = cpu[0];
8053a26377fa80614ba5221e12b86aab4e8a675eck    t0.t_disp_queue = &cpu0_disp;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_bind_cpu = PBIND_NONE;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_bind_pset = PS_NONE;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_cpupart = &cp_default;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_clfuncs = &sys_classfuncs.thread;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_copyops = NULL;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    THREAD_ONPROC(&t0, CPU);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    lwp0.lwp_thread = &t0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    lwp0.lwp_regs = (void *)rp;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    lwp0.lwp_procp = &p0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    t0.t_tid = p0.p_lwpcnt = p0.p_lwprcnt = p0.p_lwpid = 1;
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_exec = NULL;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_stat = SRUN;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_flag = SSYS;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_tlist = &t0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_stksize = 2*PAGESIZE;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_stkpageszc = 0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_as = &kas;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_lockp = &p0lock;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_brkpageszc = 0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_t1_lgrpid = LGRP_NONE;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_tr_lgrpid = LGRP_NONE;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    sigorset(&p0.p_ignore, &ignoredefault);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_thread = &t0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    bzero(&cpu0_disp, sizeof (disp_t));
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_disp = &cpu0_disp;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_disp->disp_cpu = CPU;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_dispthread = &t0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_idle_thread = &t0;
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens    CPU->cpu_flags = CPU_READY | CPU_RUNNING | CPU_EXISTS | CPU_ENABLE;
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_dispatch_pri = t0.t_pri;
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_id = 0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    CPU->cpu_pri = 12;      /* initial PIL for the boot CPU */
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens     * The kernel doesn't use LDTs unless a process explicitly requests one.
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    p0.p_ldt_desc = zero_sdesc;
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * Initialize thread/cpu microstate accounting
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    init_mstate(&t0, LMS_SYSTEM);
fa9e4066f08beec538e775443c5be79dd423fcabahrens    init_cpu_mstate(CPU, CMS_SYSTEM);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * Initialize lists of available and active CPUs.
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens    cpu_list_init(CPU);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * Now that we have taken over the GDT, IDT and have initialized
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * active CPU list it's time to inform kmdb if present.
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    if (boothowto & RB_DEBUG)
fa9e4066f08beec538e775443c5be79dd423fcabahrens        kdi_idt_sync();
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * If requested (boot -d) drop into kmdb.
fa9e4066f08beec538e775443c5be79dd423fcabahrens     *
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * This must be done after cpu_list_init() on the 64-bit kernel
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * since taking a trap requires that we re-compute gsbase based
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * on the cpu list.
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    if (boothowto & RB_DEBUGENTER)
4223fc7cdcf5a51019f631eec2b4217ddf736451Mark Shellenbaum        kmdb_enter();
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    cpu_vm_data_init(CPU);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /* lgrp_init() needs PCI config space access */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    pci_cfgspace_init();
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens     * Initialize the lgrp framework
4223fc7cdcf5a51019f631eec2b4217ddf736451Mark Shellenbaum     */
4223fc7cdcf5a51019f631eec2b4217ddf736451Mark Shellenbaum    lgrp_init();
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    rp->r_fp = 0;   /* terminate kernel stack traces! */
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    prom_init("kernel", (void *)NULL);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    boot_ncpus = bootprop_getval("boot-ncpus");
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    if (boot_ncpus <= 0 || boot_ncpus > NCPU)
fa9e4066f08beec538e775443c5be79dd423fcabahrens        boot_ncpus = NCPU;
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    max_ncpus = boot_max_ncpus = boot_ncpus;
4223fc7cdcf5a51019f631eec2b4217ddf736451Mark Shellenbaum
fa9e4066f08beec538e775443c5be79dd423fcabahrens    if (boothowto & RB_HALT) {
fa9e4066f08beec538e775443c5be79dd423fcabahrens        prom_printf("unix: kernel halted by -h flag\n");
fa9e4066f08beec538e775443c5be79dd423fcabahrens        prom_enter_mon();
fa9e4066f08beec538e775443c5be79dd423fcabahrens    }
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    ASSERT_STACK_ALIGNED();
fa9e4066f08beec538e775443c5be79dd423fcabahrens
fa9e4066f08beec538e775443c5be79dd423fcabahrens    /*
fa9e4066f08beec538e775443c5be79dd423fcabahrens     * Fill out cpu_ucode_info.  Update microcode if necessary.
fa9e4066f08beec538e775443c5be79dd423fcabahrens     */
fa9e4066f08beec538e775443c5be79dd423fcabahrens    ucode_check(CPU);
fa9e4066f08beec538e775443c5be79dd423fcabahrens
28e4da25922bdfc5cba7ab29f47de911bbd78009Matthew Ahrens    if (workaround_errata(CPU) != 0)
fa9e4066f08beec538e775443c5be79dd423fcabahrens        panic("critical workaround(s) missing for boot cpu");
fa9e4066f08beec538e775443c5be79dd423fcabahrens}
fa9e4066f08beec538e775443c5be79dd423fcabahrens