ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * CDDL HEADER START
ae115bc77f6fcde83175c75b4206dc2e50747966mrj *
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * The contents of this file are subject to the terms of the
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Common Development and Distribution License (the "License").
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * You may not use this file except in compliance with the License.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj *
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * or http://www.opensolaris.org/os/licensing.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * See the License for the specific language governing permissions
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * and limitations under the License.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj *
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * When distributing Covered Code, include this CDDL HEADER in each
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * If applicable, add the following below this CDDL HEADER, with the
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * fields enclosed by brackets "[]" replaced with your own identifying
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * information: Portions Copyright [yyyy] [name of copyright owner]
ae115bc77f6fcde83175c75b4206dc2e50747966mrj *
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * CDDL HEADER END
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Floating point configuration.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#include <sys/types.h>
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#include <sys/regset.h>
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#include <sys/privregs.h>
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#include <sys/x86_archext.h>
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#include <sys/archsystm.h>
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#include <sys/fp.h>
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#include <sys/cmn_err.h>
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#define XMM_ALIGN 16
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * If fpu_exists is non-zero, fpu_probe will attempt to use any
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * hardware FPU (subject to other constraints, see below). If
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * fpu_exists is zero, fpu_probe will report that there is no
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * FPU even if there is one.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrjint fpu_exists = 1;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrjint fp_kind = FP_387;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla/*
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla * Mechanism to save FPU state.
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla */
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla#if defined(__amd64)
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvillaint fp_save_mech = FP_FXSAVE;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla#elif defined(__i386)
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvillaint fp_save_mech = FP_FNSAVE;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla#endif
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla
ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * The variable fpu_ignored is provided to allow other code to
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * determine whether emulation is being done because there is
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * no FPU or because of an override requested via /etc/system.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrjint fpu_ignored = 0;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Used by ppcopy and ppzero to determine whether or not to use the
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * SSE-based pagecopy and pagezero routines
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrjint use_sse_pagecopy = 0;
ae115bc77f6fcde83175c75b4206dc2e50747966mrjint use_sse_pagezero = 0;
ae115bc77f6fcde83175c75b4206dc2e50747966mrjint use_sse_copy = 0;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#if defined(__i386)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * The variable fpu_pentium_fdivbug is provided to allow other code to
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * determine whether the system contains a Pentium with the FDIV problem.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrjint fpu_pentium_fdivbug = 0;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#endif
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
843e19887f64dde75055cf8842fc4db2171eff45johnlev#if defined(__xpv)
843e19887f64dde75055cf8842fc4db2171eff45johnlev
843e19887f64dde75055cf8842fc4db2171eff45johnlev/*
843e19887f64dde75055cf8842fc4db2171eff45johnlev * Use of SSE or otherwise is forcibly configured for us by the hypervisor.
843e19887f64dde75055cf8842fc4db2171eff45johnlev */
843e19887f64dde75055cf8842fc4db2171eff45johnlev
843e19887f64dde75055cf8842fc4db2171eff45johnlev#define ENABLE_SSE()
843e19887f64dde75055cf8842fc4db2171eff45johnlev#define DISABLE_SSE()
843e19887f64dde75055cf8842fc4db2171eff45johnlev
843e19887f64dde75055cf8842fc4db2171eff45johnlev#else /* __xpv */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#define ENABLE_SSE() setcr4(CR4_ENABLE_SSE_FLAGS(getcr4()))
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#define DISABLE_SSE() setcr4(CR4_DISABLE_SSE_FLAGS(getcr4()))
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
843e19887f64dde75055cf8842fc4db2171eff45johnlev#endif /* __xpv */
843e19887f64dde75055cf8842fc4db2171eff45johnlev
ae115bc77f6fcde83175c75b4206dc2e50747966mrj/*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Try and figure out what kind of FP capabilities we have, and
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * set up the control registers accordingly.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrjvoid
ae115bc77f6fcde83175c75b4206dc2e50747966mrjfpu_probe(void)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj{
ae115bc77f6fcde83175c75b4206dc2e50747966mrj do {
ae115bc77f6fcde83175c75b4206dc2e50747966mrj if (fpu_initial_probe() != 0)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj continue;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj if (fpu_exists == 0) {
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fpu_ignored = 1;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj continue;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#if defined(__i386)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fpu_pentium_fdivbug = fpu_probe_pentium_fdivbug();
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * The test does some real floating point operations.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Reset it back to previous state.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj (void) fpu_initial_probe();
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj if (fpu_pentium_fdivbug != 0) {
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fpu_ignored = 1;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj continue;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#endif
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
843e19887f64dde75055cf8842fc4db2171eff45johnlev#ifndef __xpv
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Check and see if the fpu is present by looking
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * at the "extension type" bit. (While this used to
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * indicate a 387DX coprocessor in days gone by,
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * it's forced on by modern implementations for
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * compatibility.)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj if ((getcr0() & CR0_ET) == 0)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj continue;
843e19887f64dde75055cf8842fc4db2171eff45johnlev#endif
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#if defined(__amd64)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * SSE and SSE2 are required for the 64-bit ABI.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj *
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * If they're not present, we can in principal run
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * 32-bit userland, though 64-bit processes will be hosed.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj *
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * (Perhaps we should complain more about this case!)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_SSE) &&
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla is_x86_feature(x86_featureset, X86FSET_SSE2)) {
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fp_kind |= __FP_SSE;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj ENABLE_SSE();
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_AVX)) {
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla ASSERT(is_x86_feature(x86_featureset,
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla X86FSET_XSAVE));
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fp_kind |= __FP_AVX;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla }
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_XSAVE)) {
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fp_save_mech = FP_XSAVE;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fpsave_ctxt = xsave_ctxt;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla patch_xsave();
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#elif defined(__i386)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * SSE and SSE2 are both optional, and we patch kernel
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * code to exploit it when present.
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_SSE)) {
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fp_kind |= __FP_SSE;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla ENABLE_SSE();
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fp_save_mech = FP_FXSAVE;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fpsave_ctxt = fpxsave_ctxt;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_SSE2)) {
ae115bc77f6fcde83175c75b4206dc2e50747966mrj patch_sse2();
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla }
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_AVX)) {
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla ASSERT(is_x86_feature(x86_featureset,
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla X86FSET_XSAVE));
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fp_kind |= __FP_AVX;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla }
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_XSAVE)) {
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fp_save_mech = FP_XSAVE;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla fpsave_ctxt = xsave_ctxt;
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla patch_xsave();
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla } else {
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla patch_sse(); /* use fxrstor */
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj } else {
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla remove_x86_feature(x86_featureset, X86FSET_SSE2);
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla /*
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla * We will not likely to have a chip with AVX but not
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla * SSE. But to be safe we disable AVX if SSE is not
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla * enabled.
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla */
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla remove_x86_feature(x86_featureset, X86FSET_AVX);
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * (Just in case the BIOS decided we wanted SSE
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * enabled when we didn't. See 4965674.)
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj DISABLE_SSE();
ae115bc77f6fcde83175c75b4206dc2e50747966mrj }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj#endif
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla if (is_x86_feature(x86_featureset, X86FSET_SSE2)) {
ae115bc77f6fcde83175c75b4206dc2e50747966mrj use_sse_pagecopy = use_sse_pagezero = use_sse_copy = 1;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
7af88ac71631ebf259c6c4c22a9f649ddff3e270Kuriakose Kuruvilla if (fp_kind & __FP_SSE) {
ae115bc77f6fcde83175c75b4206dc2e50747966mrj struct fxsave_state *fx;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj uint8_t fxsave_state[sizeof (struct fxsave_state) +
ae115bc77f6fcde83175c75b4206dc2e50747966mrj XMM_ALIGN];
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Extract the mxcsr mask from our first fxsave
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fx = (void *)(((uintptr_t)(&fxsave_state[0]) +
ae115bc77f6fcde83175c75b4206dc2e50747966mrj XMM_ALIGN) & ~(XMM_ALIGN - 1ul));
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fx->fx_mxcsr_mask = 0;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fxsave_insn(fx);
ae115bc77f6fcde83175c75b4206dc2e50747966mrj if (fx->fx_mxcsr_mask != 0) {
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * Override default mask initialized in fpu.c
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj sse_mxcsr_mask = fx->fx_mxcsr_mask;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj }
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj setcr0(CR0_ENABLE_FPU_FLAGS(getcr0()));
ae115bc77f6fcde83175c75b4206dc2e50747966mrj return;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*CONSTANTCONDITION*/
ae115bc77f6fcde83175c75b4206dc2e50747966mrj } while (0);
ae115bc77f6fcde83175c75b4206dc2e50747966mrj
ae115bc77f6fcde83175c75b4206dc2e50747966mrj /*
ae115bc77f6fcde83175c75b4206dc2e50747966mrj * No FPU hardware present
ae115bc77f6fcde83175c75b4206dc2e50747966mrj */
ae115bc77f6fcde83175c75b4206dc2e50747966mrj setcr0(CR0_DISABLE_FPU_FLAGS(getcr0()));
ae115bc77f6fcde83175c75b4206dc2e50747966mrj DISABLE_SSE();
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fp_kind = FP_NO;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj fpu_exists = 0;
ae115bc77f6fcde83175c75b4206dc2e50747966mrj}