cpuid_subr.c revision e4b86885570d77af552e9cf94f142f4d744fb8c8
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Support functions that interpret CPUID and similar information.
* These should not be used from anywhere other than cpuid.c and
* cmi_hw.c - as such we will not list them in any header file
* such as x86_archext.h.
*
* In cpuid.c we process CPUID information for each cpu_t instance
* we're presented with, and stash this raw information and material
* derived from it in per-cpu_t structures.
*
* If we are virtualized then the CPUID information derived from CPUID
* instructions executed in the guest is based on whatever the hypervisor
* wanted to make things look like, and the cpu_t are not necessarily in 1:1
* or fixed correspondence with real processor execution resources. In cmi_hw.c
* we are interested in the native properties of a processor - for fault
* management (and potentially other, such as power management) purposes;
* it will tunnel through to real hardware information, and use the
* functionality provided in this file to process it.
*/
#include <sys/x86_archext.h>
/*
* AMD family 0xf and family 0x10 socket types.
* First index :
* 0 for family 0xf, revs B thru E
* 1 for family 0xf, revs F and G
* 2 for family 0x10, rev B
* Second index by (model & 0x3)
*/
/*
* Family 0xf revisions B through E
*/
#define A_SKTS_0 0
{
X86_SOCKET_754, /* 0b00 */
X86_SOCKET_940, /* 0b01 */
X86_SOCKET_754, /* 0b10 */
X86_SOCKET_939 /* 0b11 */
},
/*
* Family 0xf revisions F and G
*/
#define A_SKTS_1 1
{
X86_SOCKET_S1g1, /* 0b00 */
X86_SOCKET_F1207, /* 0b01 */
X86_SOCKET_UNKNOWN, /* 0b10 */
X86_SOCKET_AM2 /* 0b11 */
},
/*
* Family 0x10 revisions A and B
* It is not clear whether, as new sockets release, that
* model & 0x3 will id socket for this family
*/
#define A_SKTS_2 2
{
X86_SOCKET_F1207, /* 0b00 */
X86_SOCKET_F1207, /* 0b01 */
X86_SOCKET_F1207, /* 0b10 */
X86_SOCKET_F1207, /* 0b11 */
}
};
/*
* combination to chip "revision" and socket type.
*
* The first member of this array that matches a given family, extended model
* plus model range, and stepping range will be considered a match.
*/
static const struct amd_rev_mapent {
const char *rm_chiprevstr;
int rm_sktidx;
} amd_revmap[] = {
/*
* =============== AuthenticAMD Family 0xf ===============
*/
/*
* Rev B includes model 0x4 stepping 0 and model 0x5 stepping 0 and 1.
*/
/*
* Rev C0 includes model 0x4 stepping 8 and model 0x5 stepping 8
*/
/*
* Rev CG is the rest of extended model 0x0 - i.e., everything
* but the rev B and C0 combinations covered above.
*/
/*
* Rev D has extended model 0x1.
*/
/*
* Rev E has extended model 0x2.
* Extended model 0x3 is unused but available to grow into.
*/
/*
* Rev F has extended models 0x4 and 0x5.
*/
/*
* Rev G has extended model 0x6.
*/
/*
* =============== AuthenticAMD Family 0x10 ===============
*/
/*
* Rev A has model 0 and stepping 0/1/2 for DR-{A0,A1,A2}.
* Give all of model 0 stepping range to rev A.
*/
/*
* Rev B has model 2 and steppings 0/1/0xa/2 for DR-{B0,B1,BA,B2}.
* Give all of model 2 stepping range to rev B.
*/
};
static void
{
const struct amd_rev_mapent *rmp;
int found = 0;
int i;
/*
* Currently only AMD family 0xf and family 0x10 use these fields.
*/
return;
i++, rmp++) {
found = 1;
break;
}
}
if (found) {
if (chiprevstr_p != NULL)
}
}
{
switch (vendor) {
case X86_VENDOR_AMD:
break;
default:
break;
}
return (skt);
}
{
switch (vendor) {
case X86_VENDOR_AMD:
break;
default:
break;
}
return (chiprev);
}
const char *
{
const char *revstr = "Unknown";
switch (vendor) {
case X86_VENDOR_AMD:
break;
default:
break;
}
return (revstr);
}
/*
* CyrixInstead is a variable used by the Cyrix detection code
* in locore.
*/
const char CyrixInstead[] = X86_VENDORSTR_CYRIX;
/*
* Map the vendor string to a type code
*/
{
return (X86_VENDOR_Intel);
return (X86_VENDOR_AMD);
return (X86_VENDOR_TM);
return (X86_VENDOR_Cyrix);
return (X86_VENDOR_UMC);
return (X86_VENDOR_NexGen);
return (X86_VENDOR_Centaur);
return (X86_VENDOR_Rise);
return (X86_VENDOR_SiS);
return (X86_VENDOR_NSC);
else
return (X86_VENDOR_IntelClone);
}