cpuid_subr.c revision 7932179448259e425d93162dedd251930575d83e
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * CDDL HEADER START
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * The contents of this file are subject to the terms of the
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Common Development and Distribution License (the "License").
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * You may not use this file except in compliance with the License.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * See the License for the specific language governing permissions
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * and limitations under the License.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * When distributing Covered Code, include this CDDL HEADER in each
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * If applicable, add the following below this CDDL HEADER, with the
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * fields enclosed by brackets "[]" replaced with your own identifying
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * information: Portions Copyright [yyyy] [name of copyright owner]
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * CDDL HEADER END
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Use is subject to license terms.
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * Portions Copyright 2009 Advanced Micro Devices, Inc.
7932179448259e425d93162dedd251930575d83eJens Elkner * Copyright 2012 Jens Elkner <jel+illumos@cs.uni-magdeburg.de>
7932179448259e425d93162dedd251930575d83eJens Elkner * Copyright 2012 Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Support functions that interpret CPUID and similar information.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * These should not be used from anywhere other than cpuid.c and
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * cmi_hw.c - as such we will not list them in any header file
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * In cpuid.c we process CPUID information for each cpu_t instance
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * we're presented with, and stash this raw information and material
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * derived from it in per-cpu_t structures.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * If we are virtualized then the CPUID information derived from CPUID
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * instructions executed in the guest is based on whatever the hypervisor
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * wanted to make things look like, and the cpu_t are not necessarily in 1:1
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * or fixed correspondence with real processor execution resources. In cmi_hw.c
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * we are interested in the native properties of a processor - for fault
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * management (and potentially other, such as power management) purposes;
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * it will tunnel through to real hardware information, and use the
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * functionality provided in this file to process it.
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * AMD socket types.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * First index :
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * 0 for family 0xf, revs B thru E
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * 1 for family 0xf, revs F and G
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * 2 for family 0x10
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * 3 for family 0x11
7932179448259e425d93162dedd251930575d83eJens Elkner * 4 for family 0x12
7932179448259e425d93162dedd251930575d83eJens Elkner * 5 for family 0x14
7932179448259e425d93162dedd251930575d83eJens Elkner * 6 for family 0x15, models 00 - 0f
7932179448259e425d93162dedd251930575d83eJens Elkner * 7 for family 0x15, models 10 - 1f
7932179448259e425d93162dedd251930575d83eJens Elkner * Second index by (model & 0x3) for family 0fh,
7932179448259e425d93162dedd251930575d83eJens Elkner * CPUID pkg bits (Fn8000_0001_EBX[31:28]) for later families.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Family 0xf revisions B through E
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Family 0xf revisions F and G
7932179448259e425d93162dedd251930575d83eJens Elkner * Family 0x12
7932179448259e425d93162dedd251930575d83eJens Elkner * Family 0x14
7932179448259e425d93162dedd251930575d83eJens Elkner * Family 0x15 models 00 - 0f
7932179448259e425d93162dedd251930575d83eJens Elkner * Family 0x15 models 10 - 1f
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Table for mapping AMD Family 0xf and AMD Family 0x10 model/stepping
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * combination to chip "revision" and socket type.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * The first member of this array that matches a given family, extended model
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * plus model range, and stepping range will be considered a match.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Yestatic const struct amd_rev_mapent {
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * =============== AuthenticAMD Family 0xf ===============
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev B includes model 0x4 stepping 0 and model 0x5 stepping 0 and 1.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x04, 0x04, 0x0, 0x0, X86_CHIPREV_AMD_F_REV_B, "B", A_SKTS_0 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x05, 0x05, 0x0, 0x1, X86_CHIPREV_AMD_F_REV_B, "B", A_SKTS_0 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev C0 includes model 0x4 stepping 8 and model 0x5 stepping 8
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x04, 0x05, 0x8, 0x8, X86_CHIPREV_AMD_F_REV_C0, "C0", A_SKTS_0 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev CG is the rest of extended model 0x0 - i.e., everything
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * but the rev B and C0 combinations covered above.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x00, 0x0f, 0x0, 0xf, X86_CHIPREV_AMD_F_REV_CG, "CG", A_SKTS_0 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev D has extended model 0x1.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x10, 0x1f, 0x0, 0xf, X86_CHIPREV_AMD_F_REV_D, "D", A_SKTS_0 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev E has extended model 0x2.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Extended model 0x3 is unused but available to grow into.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x20, 0x3f, 0x0, 0xf, X86_CHIPREV_AMD_F_REV_E, "E", A_SKTS_0 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev F has extended models 0x4 and 0x5.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x40, 0x5f, 0x0, 0xf, X86_CHIPREV_AMD_F_REV_F, "F", A_SKTS_1 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev G has extended model 0x6.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0xf, 0x60, 0x6f, 0x0, 0xf, X86_CHIPREV_AMD_F_REV_G, "G", A_SKTS_1 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * =============== AuthenticAMD Family 0x10 ===============
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev A has model 0 and stepping 0/1/2 for DR-{A0,A1,A2}.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Give all of model 0 stepping range to rev A.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0x10, 0x00, 0x00, 0x0, 0x2, X86_CHIPREV_AMD_10_REV_A, "A", A_SKTS_2 },
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Rev B has model 2 and steppings 0/1/0xa/2 for DR-{B0,B1,BA,B2}.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Give all of model 2 stepping range to rev B.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye { 0x10, 0x02, 0x02, 0x0, 0xf, X86_CHIPREV_AMD_10_REV_B, "B", A_SKTS_2 },
64452efd23bde8f59916acb588864db270793fc0Kit Chow * Rev C has models 4-6 (depending on L3 cache configuration)
7932179448259e425d93162dedd251930575d83eJens Elkner * Give all of models 4-6 stepping range 0-2 to rev C2.
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x10, 0x4, 0x6, 0x0, 0x2, X86_CHIPREV_AMD_10_REV_C2, "C2", A_SKTS_2 },
7932179448259e425d93162dedd251930575d83eJens Elkner * Rev C has models 4-6 (depending on L3 cache configuration)
7932179448259e425d93162dedd251930575d83eJens Elkner * Give all of models 4-6 stepping range >= 3 to rev C3.
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x10, 0x4, 0x6, 0x3, 0xf, X86_CHIPREV_AMD_10_REV_C3, "C3", A_SKTS_2 },
7932179448259e425d93162dedd251930575d83eJens Elkner * Rev D has models 8 and 9
7932179448259e425d93162dedd251930575d83eJens Elkner * Give all of model 8 and 9 stepping 0 to rev D0.
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x10, 0x8, 0x9, 0x0, 0x0, X86_CHIPREV_AMD_10_REV_D0, "D0", A_SKTS_2 },
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * Rev D has models 8 and 9
7932179448259e425d93162dedd251930575d83eJens Elkner * Give all of model 8 and 9 stepping range >= 1 to rev D1.
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x10, 0x8, 0x9, 0x1, 0xf, X86_CHIPREV_AMD_10_REV_D1, "D1", A_SKTS_2 },
7932179448259e425d93162dedd251930575d83eJens Elkner * Rev E has models A and stepping 0
7932179448259e425d93162dedd251930575d83eJens Elkner * Give all of model A stepping range to rev E.
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x10, 0xA, 0xA, 0x0, 0xf, X86_CHIPREV_AMD_10_REV_E, "E", A_SKTS_2 },
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * =============== AuthenticAMD Family 0x11 ===============
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x11, 0x03, 0x03, 0x0, 0xf, X86_CHIPREV_AMD_11_REV_B, "B", A_SKTS_3 },
7932179448259e425d93162dedd251930575d83eJens Elkner * =============== AuthenticAMD Family 0x12 ===============
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x12, 0x01, 0x01, 0x0, 0xf, X86_CHIPREV_AMD_12_REV_B, "B", A_SKTS_4 },
7932179448259e425d93162dedd251930575d83eJens Elkner * =============== AuthenticAMD Family 0x14 ===============
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x14, 0x01, 0x01, 0x0, 0xf, X86_CHIPREV_AMD_14_REV_B, "B", A_SKTS_5 },
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x14, 0x02, 0x02, 0x0, 0xf, X86_CHIPREV_AMD_14_REV_C, "C", A_SKTS_5 },
7932179448259e425d93162dedd251930575d83eJens Elkner * =============== AuthenticAMD Family 0x15 ===============
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x15, 0x01, 0x01, 0x2, 0x2, X86_CHIPREV_AMD_15OR_REV_B2, "B2",
7932179448259e425d93162dedd251930575d83eJens Elkner { 0x15, 0x10, 0x10, 0x1, 0x1, X86_CHIPREV_AMD_15TN_REV_A1, "A1",
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Yesynth_amd_info(uint_t family, uint_t model, uint_t step,
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye uint32_t *skt_p, uint32_t *chiprev_p, const char **chiprevstr_p)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye for (i = 0, rmp = amd_revmap; i < sizeof (amd_revmap) / sizeof (*rmp);
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye model >= rmp->rm_modello && model <= rmp->rm_modelhi &&
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye step >= rmp->rm_steplo && step <= rmp->rm_stephi) {
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla /* PV guest */
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla if ((platform == HW_XEN_HVM) || (platform == HW_VMWARE)) {
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye *skt_p = amd_skts[rmp->rm_sktidx][model & 0x3];
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * Starting with family 10h, socket type is stored in
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * CPUID Fn8000_0001_EBX
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla /* PkgType bits */
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla /* Reserved bits */
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * Look at Ddr3Mode bit of DRAM Configuration
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla * High Register to decide whether this is
7932179448259e425d93162dedd251930575d83eJens Elkner * actually AM3 or S1g4.
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye_cpuid_skt(uint_t vendor, uint_t family, uint_t model, uint_t step)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye synth_amd_info(family, model, step, &skt, NULL, NULL);
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla_cpuid_sktstr(uint_t vendor, uint_t family, uint_t model, uint_t step)
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla synth_amd_info(family, model, step, &skt, NULL, NULL);
89e921d5e5050628462effb26c9db2cf1a87fdf4Kuriakose Kuruvilla while (sktmapp->skt_code != X86_SOCKET_UNKNOWN) {
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye_cpuid_chiprev(uint_t vendor, uint_t family, uint_t model, uint_t step)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye synth_amd_info(family, model, step, NULL, &chiprev, NULL);
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye_cpuid_chiprevstr(uint_t vendor, uint_t family, uint_t model, uint_t step)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye synth_amd_info(family, model, step, NULL, NULL, &revstr);
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * CyrixInstead is a variable used by the Cyrix detection code
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Yeconst char CyrixInstead[] = X86_VENDORSTR_CYRIX;
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye * Map the vendor string to a type code
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye_cpuid_vendorstr_to_vendorcode(char *vendorstr)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye if (strcmp(vendorstr, X86_VENDORSTR_Intel) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, X86_VENDORSTR_AMD) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, X86_VENDORSTR_TM) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, CyrixInstead) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, X86_VENDORSTR_UMC) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, X86_VENDORSTR_NexGen) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, X86_VENDORSTR_Centaur) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, X86_VENDORSTR_Rise) == 0)
e4b86885570d77af552e9cf94f142f4d744fb8c8Cheng Sean Ye else if (strcmp(vendorstr, X86_VENDORSTR_SiS) == 0)