2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * CDDL HEADER START
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * The contents of this file are subject to the terms of the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Common Development and Distribution License (the "License").
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * You may not use this file except in compliance with the License.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * See the License for the specific language governing permissions
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * and limitations under the License.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * When distributing Covered Code, include this CDDL HEADER in each
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * If applicable, add the following below this CDDL HEADER, with the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * fields enclosed by brackets "[]" replaced with your own identifying
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * information: Portions Copyright [yyyy] [name of copyright owner]
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * CDDL HEADER END
7417cfdecea1902cef03c0d61a72df97d945925dKuriakose Kuruvilla * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf#if !defined(__lint)
1b1c71b2a16b821c15117fe73e4c435706a6272bjan#endif /* DEBUG */
1b1c71b2a16b821c15117fe73e4c435706a6272bjan#define WC_LED 0x80 /* diagnostic led port ON motherboard */
1b1c71b2a16b821c15117fe73e4c435706a6272bjan * defined as offsets from the data register
1b1c71b2a16b821c15117fe73e4c435706a6272bjan#endif /* DEBUG */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * This file contains the low level routines involved in getting
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * into and out of ACPI S3, including those needed for restarting
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * the non-boot cpus.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Our assumptions:
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Our actions:
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf/*ARGSUSED*/
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf{ return 0; }
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf#else /* lint */
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend movq %gs:CPU_ID, %rax / save current cpu id
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf#endif /* __amd64 */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf#endif /* lint */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Our assumptions:
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - We are running in real mode.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - Interrupts are disabled.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Our actions:
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - We start using our GDT by loading correct values in the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * selector registers (cs=KCS_SEL, ds=es=ss=KDS_SEL, fs=KFS_SEL,
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * gs=KGS_SEL).
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - We change over to using our IDT.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - We load the default LDT into the hardware LDT register.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - We load the default TSS into the hardware task register.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - We restore registers
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * - We return to original caller (a la setjmp)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf#else /* lint */
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe * For the Sun Studio 10 assembler we needed to do a .code32 and
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe * mentally invert the meaning of the addr16 and data16 prefixes to
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe * get 32-bit access when generating code to be executed in 16-bit
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe * mode (sigh...)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe * This code, despite always being built with GNU as, has inherited
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe * the conceptual damage.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf/ using the following value blows up machines! - DO NOT USE
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Enable protected-mode, write protect, and alignment mask
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * %cr0 has already been initialsed to zero
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Do a jmp immediately after writing to cr0 when enabling protected
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * mode to clear the real mode prefetch queue (per Intel's docs)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * 16-bit protected mode is now active, so prepare to turn on long
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Add any initial cr4 bits
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Enable PAE mode (CR4.PAE)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Point cr3 to the 64-bit long mode page tables.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Note that these MUST exist in 32-bit space, as we don't have
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * a way to load %cr3 with a 64-bit base address for the page tables
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * until the CPU is actually executing in 64-bit long mode.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Set long mode enable in EFER (EFER.LME = 1)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Finally, turn on paging (CR0.PG = 1) to activate long mode.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * The instruction after enabling paging in CR0 MUST be a branch.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Long mode is now active but since we're still running with the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * original 16-bit CS we're actually in 16-bit compatability mode.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * We have to load an intermediate GDT and IDT here that we know are
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * in 32-bit space before we can use the kernel's GDT and IDT, which
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * may be in the 64-bit address space, and since we're in compatability
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * mode, we only have access to 16 and 32-bit instructions at the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Do a far transfer to 64-bit mode. Set the CS selector to a 64-bit
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * long mode selector (CS.L=1) in the temporary 32-bit GDT and jump
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * to the real mode platter address of wc_long_mode_64 as until the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * 64-bit CS is in place we don't have access to 64-bit instructions
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * and thus can't reference a 64-bit %rip.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Support routine to re-initialize VGA subsystem
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Support routine to re-initialize keyboard (which is USB - help!)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Support routine to re-initialize COM ports to something sane
1b1c71b2a16b821c15117fe73e4c435706a6272bjan * on debug kernels we need to initialize COM1 & COM2 here, so that
1b1c71b2a16b821c15117fe73e4c435706a6272bjan * we can get debug output before the asy driver has resumed
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM1+DLL), %edx / divisor latch lsb
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM1+DLH), %edx / divisor latch hsb
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(STOP1|BITS8), %al / 1 stop bit, 8bit word len
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(RTS|DTR), %al / data term ready & req to send
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM2+DLL), %edx / divisor latch lsb
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM2+DLH), %edx / divisor latch hsb
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(STOP1|BITS8), %al / 1 stop bit, 8bit word len
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(RTS|DTR), %al / data term ready & req to send
1b1c71b2a16b821c15117fe73e4c435706a6272bjan#endif /* DEBUG */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * We are now running in long mode with a 64-bit CS (EFER.LMA=1,
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * CS.L=1) so we now have access to 64-bit instructions.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * First, set the 64-bit GDT base.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Save the CPU number in %r11; get the value here since it's saved in
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * the real mode platter.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf/ the following is wrong! need to figure out MP systems
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Add rm_platter_pa to %rsp to point it to the same location as seen
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * from 64-bit mode.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Now do an lretq to load CS with the appropriate selector for the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * kernel's 64-bit GDT and to start executing 64-bit setup code at the
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * virtual address where boot originally loaded this code rather than
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * the copy in the real mode platter's rm_code array as we've been
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * doing so far.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf/ JAN this should produce 'i' but we get 'g' instead ???
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf/ JAN this should produce 'j' but we get 'g' instead ???
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Complete the balance of the setup we need to before executing
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * 64-bit kernel code (namely init rsp, TSS, LGDT, FS and GS).
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * restore the rest of the registers
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * restore the rest of the registers
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Before proceeding, enable usage of the page table NX bit if
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * that's how the page tables are set up.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf movq WC_CR4(%rbx), %rax / restore full cr4 (with Global Enable)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf/ restore %fsbase %gsbase %kgbase registers using wrmsr instruction
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend * if we are not running on the boot CPU restore stack contents by
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend * calling i_cpr_restore_stack(curthread, save_stack);
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend movq WC_RSP(%rbx), %rsp / restore stack pointer
bc4466305498eebc620bcefaac080629452b3156Guoli Shu * APIC initialization
4716fd887b81cd876928e6c03a0c6d0dcf362c90jan * skip iff function pointer is NULL
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf/ restore %rbx to the value it ahd before we called the functions above
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * can not use outb after this point, because doing so would mean using
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * %dx which would modify %rdx which is restored here
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf movq %rax, (%rsp) / return to caller of wc_save_context
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 A16 movl %cs:WC_DS(%ebx), %edx / %ds post prot/paging transit
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 andl $_BITNOT(CR4_PGE), %eax / don't set Global Enable yet
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf movl %eax, %cr4
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 movb $0xd6, %al
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb $WC_LED
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 A16 movl %cs:WC_CR3(%ebx), %eax / set PDPT
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf movl %eax, %cr3
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 movb $0xd7, %al
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb $WC_LED
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 A16 movl %cs:WC_CR0(%ebx), %eax / enable prot/paging, etc.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf movl %eax, %cr0
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 movb $0xd8, %al
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb $WC_LED
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 A16 movl %cs:WC_VIRTADDR(%ebx), %ebx / virtaddr of wc_cpu_t
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 movb $0xd9, %al
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb $WC_LED
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 movb $0xda, %al
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb $WC_LED
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf jmp flush / flush prefetch queue
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 pushl $KCS_SEL
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 pushl $kernel_wc_code
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf D16 lret / re-appear at kernel_wc_code
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Support routine to re-initialize VGA subsystem
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Support routine to re-initialize keyboard (which is USB - help!)
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf * Support routine to re-initialize COM ports to something sane for debug output
1b1c71b2a16b821c15117fe73e4c435706a6272bjan * on debug kernels we need to initialize COM1 & COM2 here, so that
1b1c71b2a16b821c15117fe73e4c435706a6272bjan * we can get debug output before the asy driver has resumed
1b1c71b2a16b821c15117fe73e4c435706a6272bjan/ select COM1
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM1+LCR), %edx
1b1c71b2a16b821c15117fe73e4c435706a6272bjan D16 movb $DLAB, %al / divisor latch
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM1+DLL), %edx / divisor latch lsb
1b1c71b2a16b821c15117fe73e4c435706a6272bjan D16 movb $B9600L, %al / divisor latch
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM1+DLH), %edx / divisor latch hsb
1b1c71b2a16b821c15117fe73e4c435706a6272bjan D16 movb $B9600H, %al / divisor latch
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM1+LCR), %edx / select COM1
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(STOP1|BITS8), %al / 1 stop bit, 8bit word len
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM1+MCR), %edx / select COM1
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(RTS|DTR), %al / 1 stop bit, 8bit word len
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
1b1c71b2a16b821c15117fe73e4c435706a6272bjan/ select COM2
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM2+LCR), %edx
1b1c71b2a16b821c15117fe73e4c435706a6272bjan D16 movb $DLAB, %al / divisor latch
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM2+DLL), %edx / divisor latch lsb
1b1c71b2a16b821c15117fe73e4c435706a6272bjan D16 movb $B9600L, %al / divisor latch
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM2+DLH), %edx / divisor latch hsb
1b1c71b2a16b821c15117fe73e4c435706a6272bjan D16 movb $B9600H, %al / divisor latch
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM2+LCR), %edx / select COM1
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(STOP1|BITS8), %al / 1 stop bit, 8bit word len
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movl $_CONST(COM2+MCR), %edx / select COM1
dad255286ee5ada77255c1f9f132ceee0bc314aaRichard Lowe D16 movb $_CONST(RTS|DTR), %al / 1 stop bit, 8bit word len
1b1c71b2a16b821c15117fe73e4c435706a6272bjan outb (%dx)
1b1c71b2a16b821c15117fe73e4c435706a6272bjan#endif /* DEBUG */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf .globl wc_rm_end
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf .globl kernel_wc_code
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyfkernel_wc_code:
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf / At this point we are with kernel's cs and proper eip.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf / We will be executing not from the copy in real mode platter,
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf / By this time GDT and IDT are loaded as is cr0, cr3 and cr4.
4716fd887b81cd876928e6c03a0c6d0dcf362c90jan * Before proceeding, enable usage of the page table NX bit if
4716fd887b81cd876928e6c03a0c6d0dcf362c90jan * that's how the page tables are set up.
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf movl WC_CR4(%ebx), %eax / restore full cr4 (with Global Enable)
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend movw WC_SS(%ebx), %ss / restore segment registers
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend * set the stack pointer to point into the identity mapped page
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend * temporarily, so we can make function calls
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend * if we are not running on the boot CPU restore stack contents by
3d995820f4ce8cd712d97f05aae6d30d9952d298Joseph A Townsend * calling i_cpr_restore_stack(curthread, save_stack);
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf movl WC_RETADDR(%ebx), %eax / return to caller of wc_save_context
4716fd887b81cd876928e6c03a0c6d0dcf362c90jan * APIC initialization, skip iff function pointer is NULL
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf#endif /* defined(__amd64) */
2df1fe9ca32bb227b9158c67f5c00b54c20b10fdrandyf#endif /* lint */