apic_regops.c revision f9c480cd662f42d54475b87370bc2f4811ec0679
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2008 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#include <sys/archsystm.h>
#include <sys/ddi_impldefs.h>
#include <sys/mach_intr.h>
#include <sys/sysmacros.h>
#include <sys/x86_archext.h>
#include <sys/privregs.h>
#include <sys/psm_common.h>
/* Function prototypes of local apic and x2apic */
static int get_local_apic_pri(void);
static int get_local_x2apic_pri(void);
/*
* According to the x2APIC specification:
*
* xAPIC global enable x2APIC enable Description
* (IA32_APIC_BASE[11]) (IA32_APIC_BASE[10])
* -----------------------------------------------------------
* 0 0 APIC is disabled
* 0 1 Invalid
* 1 0 APIC is enabled in xAPIC mode
* 1 1 APIC is enabled in x2APIC mode
* -----------------------------------------------------------
*/
int x2apic_enable = 1;
/* Uses MMIO (Memory Mapped IO) */
static apic_reg_ops_t local_apic_regs_ops = {
};
static apic_reg_ops_t x2apic_regs_ops = {
};
/* The default ops is local APIC (Memory Mapped IO) */
/*
* APIC register ops related data sturctures and functions.
*/
int apic_direct_EOI = 0; /* Directed EOI Support */
void apic_send_EOI();
#define X2APIC_CPUID_BIT 21
#define X2APIC_ENABLE_BIT 10
/*
* Local APIC Implementation
*/
static uint64_t
{
}
static void
{
}
static int
get_local_apic_pri(void)
{
#if defined(__amd64)
return ((int)getcr8());
#else
return (apicadr[APIC_TASK_REG]);
#endif
}
static void
{
#if defined(__amd64)
#else
#endif
}
static void
{
}
/*
* x2APIC Implementation.
*/
static uint64_t
{
uint64_t i;
return (i);
}
static void
{
if (msr != APIC_EOI_REG) {
} else {
tmp = 0;
}
}
static int
get_local_x2apic_pri(void)
{
}
static void
{
}
static void
{
}
/*ARGSUSED*/
void
{
}
void
{
short intr_index;
while (apic_irq) {
}
}
}
int
apic_detect_x2apic(void)
{
struct cpuid_regs cp;
if (x2apic_enable == 0)
return (0);
(void) __cpuid_insn(&cp);
}
void
apic_enable_x2apic(void)
{
/* change the mode and ops */
if (apic_mode != LOCAL_X2APIC) {
}
}
/*
* Generates an interprocessor interrupt to another CPU when x2APIC mode is
* enabled.
*/
void
{
int vector;
flag = intr_clear();
apic_ret();
if ((cpun == psm_get_cpu_id()))
else
}
void
{
}